JPH071845Y2 - Integrated circuit package - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial field of application] The present invention relates to an integrated circuit package, and more particularly to an integrated circuit package equipped with an integrated circuit chip for processing high speed or high frequency signals.

[Conventional technology]

Conventionally, a flat package or a chip carrier package has been widely used as a package for mounting an integrated circuit chip having a high degree of circuit integration and therefore a large number of terminals. In these packages, wiring for guiding the terminal electrodes of the chip to the external connection terminals is prepared in the substrate in which terminals for external connection such as leads and electrode pads are provided in the peripheral portion at a predetermined pitch. Each terminal electrode of the chip is connected to the wiring of the substrate by a wire bonding method or a wireless bonding method.

[Problems to be solved by the invention]

When the above-mentioned conventional integrated circuit package is used for high-speed signal processing, the transmission characteristics in the high frequency region deteriorate due to the influence of the wiring inside the substrate that exists between the external connection terminals of the package and the terminal electrodes of the chip, and However, there is a problem that the waveform distortion occurs. The package 1 will be described with reference to FIG.
When a signal is input from the outside to the input terminal on the chip 2 mounted on the board via the external terminal 3 connected to the transmission line 4, the terminating resistor 5 having a resistance value equal to the characteristic impedance of the transmission line is used. It is installed at a position closest to the external terminal 3 of 4. In the case of an integrated circuit package having a large number of external terminals and having a large shape, the wiring 6 inside the package becomes long in proportion to the shape of the package. On the other hand, the impedance considering the circuit inside the chip from the input terminal of the chip 2 is generally the terminating resistance R
Since the impedance is higher than that of, the external terminal 3 from the terminating resistor 5 to the input terminal on the chip 2, the package wiring pattern 6, the internal terminal 7, and the internal terminal 7 are connected to the input terminal on the chip 2. Of the wire 8 has a characteristic impedance different from that of the transmission line 4,
Further, it is provided after the terminating resistor in a state close to the open end. Therefore, the signal input to the transmission path 4 is applied to the chip 2 in a state where waveform distortion has occurred.

An object of the present invention is to solve the above problems and provide an integrated circuit package in which waveform distortion due to impedance mismatch in a wiring for guiding a high speed signal from an external connection terminal to a chip terminal does not occur. Especially.

[Means for solving problems]

The present invention connects an external terminal for external connection of a package, an internal terminal connected to an input terminal on an integrated circuit chip mounted at a predetermined position on a substrate of the package, and the external terminal and the internal terminal. In an integrated circuit package including a wiring pattern, the external terminal has a signal input terminal and a terminating resistor connecting terminal, and the signal input terminal and the terminating resistor connecting terminal are the terminals of the terminating resistor connecting terminal. The first wiring pattern having a characteristic impedance substantially equal to the characteristic impedance is connected, and the first wiring pattern and the internal terminal are connected by a second wiring pattern having a characteristic impedance larger than the characteristic impedance. Are connected by an integrated circuit pattern.

〔Example〕

 Next, the present invention will be described with reference to the drawings.

1 (a) and 1 (b) are a perspective view and a side view, respectively, showing an embodiment of the present invention. The electrode 4 provided in the peripheral portion of the package 1 is an electrode pad for external connection. Instead of this electrode pad, a lead for external connection may be provided. The terminal electrode of the chip 2 of the integrated circuit mounted in the central part of the package 1 is connected to the connection electrode 7 provided in the vicinity of the periphery of the chip 2 by the wire 3 (only a part is shown). The electrodes 4 and 7 are connected by a wiring pattern arranged in the laminated substrate. The chip 2 may be connected by wireless bonding instead of wire bonding.

The part which is partially broken shows the part of the wiring in the substrate for guiding the input signal from the outside to the input terminal of the circuit element of the chip 2.

The electrode 4a is an electrode for giving an input signal, and 4b is for connecting an external terminating resistor R. The electrodes 4a and 4b are connected to each other by a wiring 5a, and the wiring 5a is connected to a wiring 5b connected to the electrode 7. The electrode 7 is connected to the input terminal of the circuit element of the chip 2 by the wire 3. Wiring 5a
And 5b are each an insulating layer made of ceramic underneath
A conductor film 6 for grounding is provided with 10 interposed therebetween to form a microstrip. Here, the characteristic impedance of the wiring 5a is made equal to the termination resistance value connected to the electrode 4b, and the wiring
It is assumed that the characteristic impedance of 5b is large enough to ignore the characteristic impedance of the wiring 5a.

When the package 1 is mounted on a mother board (or a printed wiring board) and connected to an external circuit, the electrode 4 connected to the conductor film 6 is grounded and the termination electrode 4b is connected to a terminating resistor.

The impedance looking into the integrated circuit chip side from the contact points of the wirings 5a and 5b is the sum of the input impedances of the wiring 5b, the wire 3, and the circuit in the chip. As described above, the characteristic impedance of the wiring 5b is that of the wiring 5a. Since the characteristic impedance is large enough to be ignored, and the input impedance of the in-chip circuit is also generally large, it is possible to make the characteristic impedance of the wiring 5a large enough to be ignored as a whole. Therefore, the characteristic impedance looking into the inside from the electrode 4a is substantially equal to the characteristic impedance of the wiring 5a. That is, the input signal applied from the electrode 4a is supplied to the terminating resistor connected to the electrode 4b via the wiring 5a, but the wiring 5b having a characteristic impedance different from that of the wiring 5a.
Almost no waveform deterioration occurs. Therefore, the waveform of the signal supplied to the chip via the wiring 5b is not deteriorated.

From the electrical characteristics, it is desirable that there is no wiring 5b and that the wiring 5a is directly connected to the electrode 7. However, if it is necessary to make the package shape compact and to provide a large number of external connection terminals, the distance between the electrodes 4a and 4b should be reduced. It is indispensable to narrow and provide the wiring 5b. The wiring length of the wiring 5b can be shortened to a negligible level with respect to the wavelength of the high frequency component of the input signal.

As described above, by connecting the two external terminals with a predetermined characteristic impedance, and by connecting this wiring pattern and one internal terminal with another wiring pattern, the impedance up to the vicinity of the chip inside the package can be improved. It is possible to perform matched signal transmission, and it is possible to eliminate the occurrence of signal waveform distortion due to impedance mismatch in the wiring in the package, which is unavoidable in the conventional package without the wiring 5a for the termination resistor.

In the above description, the grounding conductor film 6 is provided below the wiring 5b with the insulating layer 10 interposed to form the microstrip, but the conductor film is not provided below the wiring 5b and the microstrip line is formed. There is also a way to increase the impedance without doing so.

2 and 3 are a top view and a side view, respectively, showing another configuration example of the wiring 5a in the present embodiment.

The wiring 5a does not have to be connected to the electrodes 4a and 4b adjacent to each other on the same side surface portion of the package 1 as shown in FIG. 1 (a), and as shown in FIG. 2, depending on the arrangement condition of the external circuit. It may be formed so as to be guided to two different side surface portions of the package 1, and it is clear that the same effect can be obtained.

Further, the wiring 5a does not need to be provided on the same surface in the laminated substrate as shown in FIG. 1 (b), and in order to facilitate the arrangement of the wiring pattern in the substrate, a common conductor film as shown in FIG. It is obvious that the same effect can be obtained by forming the microstrip by interposing the insulating layers 10 and 11 on different sides with respect to 6, respectively.

Further, when the package according to the present invention is used, as shown in FIG. 4, when it is desired to supply the same signal to n packages 1 to n through the transmission line 11, the packages are connected to the wiring pattern according to the present invention. It is possible to supply signals with impedance matching by connecting 21, 31, ... N1 transmission lines to the external terminals and connecting a resistance value equal to the characteristic impedance of the transmission line to the nth package. Become.

[Effect of device]

As described above, the present invention has an effect of realizing an integrated circuit package in which waveform distortion due to impedance mismatch in wiring for guiding high-speed signals from external connection terminals to chip terminals can be prevented. is there.

[Brief description of drawings]

1 (a) and 1 (b) are a perspective view and a side view showing an embodiment of the present invention, and FIG. 2 is a top view showing an embodiment of the present invention.
FIG. 4 is a side view showing an embodiment of the present invention, FIG. 4 is a plan view showing an application example of the present invention, and FIG. 5 is a plan view of a conventional integrated circuit package. 1 ... Package, 2 ... Chip, 3 ... Wire, 4,4
a, 4b, 7 …… electrodes, 5a, 5b …… wiring, 6 …… conductor film, 10,11
…… Insulating layer, R …… Resistance.

Claims (1)

[Scope of utility model registration request] 1. An external terminal for external connection of a package, an internal terminal connected to an input terminal on an integrated circuit chip mounted at a predetermined location on a substrate of the package, and the external terminal and the internal terminal connected to each other. In the integrated circuit package including a wiring pattern, the external terminal has a signal input terminal and a termination resistance connection terminal, and the signal input terminal and the termination resistance connection terminal are the termination resistance connection terminal. Connected by a first wiring pattern having a characteristic impedance substantially equal to that of the first wiring pattern, and the first wiring pattern and the internal terminal are connected by a second wiring pattern having a characteristic impedance larger than the characteristic impedance. An integrated circuit package characterized by the above.