JPH07175444A - Liquid crystal display system - Google Patents

Abstract

PURPOSE:To add the function of display rotation without using an additional device. CONSTITUTION:Liquid crystal displays 11 and 12 are constituted so as to cope with rotation, and also liquid crystal display drivers 7-10 are constituted so as to cope with rotation. Thus, screen rotated by 0 deg., 90 deg., 180 deg. and 270 deg. is selected by the selection of an operation mode. Also the screen rotated by 0 deg., 90 deg., 180 deg. and 270 deg. can be obtained by constituting a picture memory in a system so as to cope with the rotation. Therefore, according to this invention, the rotation display of 0 deg., 90 deg., 180 deg. and 270 deg. can be attained by a signal from the system. Also, by the addition of function, an undesired picture memory or the like need not be added, and a size, the increase in power consumption and a cost are evaded.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image display device used for an information processing device such as a computer and an information terminal.

[0002]

2. Description of the Related Art An information terminal equipped with an image display device has been miniaturized, and a user can carry it to another place and use it. FIG. 15 shows a portable information terminal 15
1 shows an example of No. 1. The mobile information terminal 151 in FIG. 15 has two image display units (151-1, 151-).
2). A person A is a scene where a person B facing the person B is explained using the image information displayed on the portable information terminal 151. In this situation, in some cases, the image information may be suitable for the person A or B, and the image inversion function is required.

Known examples of such image reversal are Japanese Patent Laid-Open Nos. 4-326152 and 4-32945.
There is No. 8. An example of the system disclosed in these is shown in FIG. In this example, the following liquid crystal display and video RAM are used.

One pixel of a conventional thin film transistor (TFT) liquid crystal display is shown in FIGS. Figure 11
Shows an equivalent circuit of 1 pixel, and FIG. 12 shows a pattern of 1 pixel. 11 and 12, a set of the scanning line 112 and the signal line 113 corresponding to one pixel and the thin film transistor 1 having one or two pixel switches at the intersections thereof.
11 was connected and further connected to the liquid crystal 114.

FIG. 13 shows the structure of a conventional dual port video RAM used as an image memory.
The conventional dual port video RAM is composed of a DRAM memory cell 50, an address decoder and the like, and its operation is as follows. Column latch 5 when writing data
1. The write addresses input to and latched in the row latch 52 are decoded by the column decoder 54 and the row decoder 53, respectively. The write address is DRAM
The position where data is written in the memory cell 50 is determined. The data is latched by the shared data latch 60, then transferred to the column I / O 55, and written at the writing position in the DRAM memory cell 50 defined by the above-described operation. At the time of data output, a row address is determined by the row latch 52, data of all column addresses on the row address is transferred to the data register A56 in parallel, and high-speed serial output is performed using the selector A57. Therefore, high-speed data output is possible only for the same row data, and high-speed data output for the same column data is not possible.

In the known example shown in FIG. 141, the conventional liquid crystal display drivers 7, 8, 9, 10 and the video R are used.
Since AM5 is used, high-speed and large-capacity frame memories 121 and 122 are required between them, and images are rotated in this memory.

Therefore, when the TFT liquid crystal display shown in FIGS. 11 and 12 is used, the image output data can be input only through the signal line 113, and 90 or 270 degrees of the screen can be displayed without changing the input order. Is impossible to rotate.

Further, in the dual port video RAM shown in FIG. 13, the output order of the image output data requiring high speed data output is constant, and as a result, the output image cannot be rotated.

Regarding the rotation function relating to the display unit, JP-A-4-490 is related. However, in Japanese Patent Laid-Open No. 4-490, for example, the format conversion of a horizontally written character string and a vertically written character string is called rotation, and the top and bottom of the character string as an image are not mixed.

[0010]

In the above-mentioned known example, in order to rotate the image including the top and bottom of the image on the liquid crystal display, an extra and high-speed image display memory is required, and the device is It has not been possible to improve the drawbacks of the portable terminal such as an increase in size and an increase in power consumption. In addition, the provision of a new memory has a drawback that the device becomes expensive.

The object of the present invention is to solve these problems.
It is to provide a portable liquid crystal display system having a function of rotating an image of 0, 90, 180, and 270 degrees.

[0012]

In order to achieve the above object, the present invention provides a display means composed of a plurality of liquid crystal pixels, and a plurality of driving means for controlling the liquid crystal pixels to display an image on the display means. A liquid crystal display device is constituted by means and image data control means for supplying image data to be displayed on the display means and information indicating the scanning direction on the display means to the plurality of drive means. In particular, an active matrix liquid crystal display is used as the display means.

Further, the driving means is configured to operate as either a scanning line driver or a signal line driver.

Further, it has means for controlling the order of reading the image data from the memory for temporarily storing the image data.

[0015]

With the above structure, the scanning direction of the display means can be arbitrarily determined.

The driving means drives either the scanning line or the signal line of the display means in accordance with the information indicating whether the signal to be output is the scanning signal or the image data. Even if specified arbitrarily, the driving unit can display an image without confusing the scanning direction and the image data supply direction. That is, it is possible to select a screen rotated by 0, 90, 180, or 270 degrees by selecting the operation mode.

Further, by configuring the image memory in the system to support rotation, 0, 90, 180,
It becomes possible to obtain a screen rotated by 270 degrees.

[0018]

Embodiment 1 A first embodiment of the present invention will be described with reference to FIGS.
An example will be described. FIG. 1 is a diagram showing an example of the overall configuration of a liquid crystal display system according to the present invention. In Figure 1,
Liquid crystal display system 1, CPU2, ROM
3, RAM 4, output buffer 13, output port 14, I
C card interface 15, IC card connector 1
6, an input buffer 17, an input port 18, a communication interface 19, a communication port 20, etc., which are interconnected by a system bus 21. further,
The liquid crystal display system 1 includes a video RAM 5, a liquid crystal display controller 6, and a rotation controller 9.
6, liquid crystal display A driver B7, liquid crystal display B driver B8, liquid crystal display A driver A9,
A liquid crystal display B driver A10, a liquid crystal display A11, and a liquid crystal display B12.

The CPU 2 is connected via the system bus 21.
The programs stored in the ROM 3 and the RAM 4 are operated. The program controls the operation of the system shown in FIG. Further, the CPU 2 transfers information with the liquid crystal display display system 1, the output buffer 13, the IC card interface 15, the input buffer 17, and the communication interface 19 via the system bus 21. The output buffer 13 outputs information to an external device (not shown) through the output port 14. Input buffer 1
Information is input from an external device (not shown) through the input port 16 through 7. An IC card (not shown) is connected to the IC card connector 16 and connected to the system bus 21 through the IC card interface. An external communication device (not shown) can be connected to the communication interface 19 and the communication port 20.

The liquid crystal display display system 1 uses the liquid crystal displays 11, 12 and the liquid crystal display drivers 7, 8, 9, 10 and the rotation controller 96 or the video RAM 5 which will be described below to display the upper and lower sides of the image at 0, 90, 180. It is displayed rotated by 270 degrees.

The structure of one pixel of the liquid crystal display used in this embodiment will be described with reference to FIGS. 4 and 5. FIG. 4 shows an equivalent circuit of one pixel, and FIG. 5 shows a pattern. One pixel includes a first pixel switch thin film transistor 22, a second pixel switch thin film transistor 23,
First scanning line 24, first signal line 25, second scanning line 2
6, a second signal line 27, and a liquid crystal 28. The first pixel switch thin film transistor 22, the first scanning line 24, and the first signal line 25 form a set, and the second pixel switch thin film transistor 23, the second scanning line 26, and the second signal line 27.
, And the liquid crystal 28
Is operated. For example, when operating the liquid crystal 28 using the first pixel switch thin film transistor 22,
A scanning signal to the scanning line 24 of
To drive the first pixel switch thin film transistor 22 to output a negative image potential to the second scanning line 26 and a ground potential to the second signal line 27. That is, only the first pixel switch thin film transistor 22 is driven. When the liquid crystal 28 is operated using the second pixel switch thin film transistor 23, only the second pixel switch thin film transistor 23 is driven. Depending on which of the first pixel switch thin film transistor 22 and the second pixel switch thin film transistor 23 is used to operate the liquid crystal 28, the vertical direction in FIG. 4 is the signal line (for example, 25) and the horizontal direction is the scanning line (for example, 24). Alternatively, the up-down direction may be the scanning line (eg 26) and the left-right direction may be the signal line (eg 27). Furthermore,
Either the row direction or the column direction of the liquid crystal display can be used to control the scanning lines or the signal lines.

2 and 3 also show an embodiment for realizing the same operation as the pixel structure shown in FIG. 4 and the pattern shown in FIG.

FIG. 6 is a diagram showing an example of a liquid crystal display driver used in this embodiment. One liquid crystal display driver includes a liquid crystal drive circuit 29 and a level shifter 3.
0, latch circuit (2) and bidirectional shift register 31, latch circuit (1) 32, latch address selector 33, I
It is composed of an / O selector. The present liquid crystal display driver can operate as both a so-called scanning line driver and a signal line driver.

First, a specific operation when the liquid crystal display driver shown in FIG. 6 is used as a scanning line driver will be described below. A low level signal (for example, 0V) is given to the mode signal 39 of the liquid crystal display driver,
When the operations of the latch circuit (1) 32 and the latch address selector 33 are stopped, the latch circuit (2) / bidirectional shift register 31 is driven as a bidirectional shift register.
In the bidirectional shift register 31, the vertical scanning start signal 22
1 is fetched while sequentially shifting according to the clock 1 (37). The scanning direction signal 40 is low level (for example, 0
V) and the case where the scanning direction signal 40 is at a high level (for example, 5 V), the shift directions in the bidirectional shift register 31 are opposite to each other.

The output signal of the bidirectional shift register 31 is input to the level shifter 30 set for the scanning line driver by the mode signal 39. The liquid crystal drive circuit 29 changes the voltage of the output signal of the level shift 30 according to the liquid crystal drive voltage 36 and outputs it as the scanning line output 34.

Next, a specific operation when the liquid crystal display driver shown in FIG. 6A is used as the signal line driver will be described. Since the latch circuit (2) and bidirectional shift register 31 is used as the latch circuit (2), a high level voltage (for example, 5V) is applied to the mode signal 39 of the present liquid crystal display driver. The latch address selector 33 determines the latch position of the data 38 input to the latch circuit (1) 32 according to the horizontal scanning start signal 222 and the clock 2 (41). Latch circuit (1) 3
After the data 38 is stored in all the data storage locations of 2, all the data is latched in the latch circuit (2) / bidirectional shift register 31, and subsequently the output of the latch circuit (2) / bidirectional shift register 31. Is input to the liquid crystal drive circuit 29 through the level shifter 30 set for the signal line driver by the mode signal 39, the voltage is changed according to the liquid crystal drive voltage 36, and the signal is output as the signal line output 35.

Further, in order to prepare a plurality of the present liquid crystal display drivers and cascade-connect them, the latch circuit (2) / bidirectional shift register 31 and the latch address selector 33 respectively have enable signals 45,
It has 47 input terminals and output terminals for carry signals 46 and 48. Those signals are controlled by the scanning direction signal 40 and the mode signal 39 via the I / O selector 44.

The I / O selector 44 includes four buffers 2
The enable signal 4 for the latch circuit (2) / bidirectional shift register 31 and the latch address selector 33 is composed of logic 01, 202, 203, 204.
5, 47, carry signals 46, 48, IO1 (42) and IO2 (43). The function will be described with reference to FIG. Scanning direction signal 4
When 0 is low level (for example, 0 V) and mode signal 39 is low level (for example, 0 V) (L / L), IO1
(42) is a latch circuit (2) and bidirectional shift register 3
Connected to enable signal B47 of 1 and IO2 (43)
A carry signal B48 output from the latch circuit (2) / bidirectional shift register 31 is connected to the. When the scanning direction signal 40 is low level (for example, 0V) and the mode signal 39 is high level (for example, 5V), IO1 (4
2) is the enable signal A of the latch address selector 33
The carry signal A46 output from the latch address selector 33 is connected to IO2 (43). The scanning direction signal 40 is at a high level (for example, 5V)
When the mode signal 39 is low level (for example, 0V), IO2 (43) is connected to the enable signal B47 of the latch circuit (2) and bidirectional shift register 31,
Carry signal B48 output from latch circuit (2) and bidirectional shift register 31 is connected to 1 (42). When the scanning direction signal 40 is high level (for example, 5 V) and the mode signal 39 is high level (for example, 5 V), IO2 (43) is connected to the enable signal A45 of the latch address selector 33, and IO1 (42) is latched. Carry signal A46 output from address selector 33 is connected.

As described above, the combination of the scanning direction signal 40 and the mode signal 39 causes IO1 (42) and IO2.
Since (43) can arbitrarily correspond to either the enable signal or the carry signal, the cascade connection of the present liquid crystal display driver is performed by connecting IO2 (43) in the preceding stage to IO1 (43).
By connecting to (42), cascade connection in both directions can be realized in both functions of the scanning line driver and the signal line driver.

As described above, the liquid crystal display driver according to the present embodiment, according to the two signals of the mode signal 39 and the scanning direction signal 40 inputted from the outside,
The liquid crystal display using the present liquid crystal driver is flexible because the two functions of the scanning line driver and the signal line driver can be selected, and the scanning direction can be selected even when a plurality of liquid crystal drivers are cascade-connected. The point is that it can operate.

FIG. 7 is a diagram showing a combination of the liquid crystal display and the liquid crystal display driver of this embodiment, and FIG. 8 is a diagram showing an example of a screen display using this embodiment. Further, FIGS. 4 and 5 are diagrams showing pixels used in the liquid crystal display of the present invention. These FIG. 4, FIG.
The operation of this embodiment will be further described with reference to FIGS. 7 and 8. FIG. 7A is a diagram showing a part of the liquid crystal display, and shows a connection state between the pixels of the liquid crystal display and the liquid crystal display driver. A first signal line A75, a second scanning line A76, a first signal line B77, a second scanning line B78, etc. are connected to the liquid crystal display driver A-a91. On the other hand, the liquid crystal display driver B-a94 has a first scanning line A71 and a second signal line A
72, the first scanning line B73, and the second signal line B74 are connected. The gate of the first pixel switch thin film transistor A79 and the gate of the first pixel switch thin film transistor B80 are connected to the first scan line A71. The gate of the first pixel switch thin film transistor C81 and the gate of the first pixel switch thin film transistor D82 are connected to the first scan line B73. Second
The scanning line A76 is connected to the gate of the second pixel switch thin film transistor A87 and the gate of the second pixel switch thin film transistor C89. The second scan line B78 has a second pixel switch thin film transistor B8.
8 gate and second pixel switch thin film transistor D9
0 gate is connected. In addition, the first signal line A
75 includes a first pixel switch thin film transistor A79.
Drain of the first pixel switch thin film transistor C8
1 is connected to the drain. First signal line B77
Is connected to the drain of the first pixel switch thin film transistor B80 and the drain of the first pixel switch thin film transistor D82. The drain of the second pixel switch thin film transistor A87 and the drain of the second pixel switch thin film transistor B88 are connected to the second signal line A72. In the second signal line B74,
The drain of the second pixel switch thin film transistor C89 and the drain of the second pixel switch thin film transistor D90 are connected. The sources of the pixel switch thin film transistors 79, 80, 81, 82, 87, 88, 89, 90 are connected to the liquid crystals 83, 84, 85, 86.

FIG. 7B is a schematic diagram of a liquid crystal display composed of three liquid crystal display drivers A and two liquid crystal display drivers B. Figure 7 (b)
As shown in, each of the liquid crystal display drivers is connected to the rotation controller 96. The liquid crystal display drivers (91, 93, 94, 95) arranged at both ends of each side of the liquid crystal display 106 and the rotation controller 96 are connected by an enable-carry signal (99, 102, 103, 105). Further, among the liquid crystal display drivers forming each side of the liquid crystal display 106, the adjacent liquid crystal display drivers are connected by the enable carry signal. For example, the liquid crystal display drivers 91 and 92 are enable-carry signals B100, the liquid crystal display drivers 92 and 93 are enable-carry signals C101, and the liquid crystal display drivers 94 and 95 are enable-carry signals F104. It is connected.

Next, details of the rotation controller 96 will be described with reference to FIG. FIG. 16A shows a specific configuration example of the rotation controller 96.
6 (b) is a table showing the signal processing in the rotation controller 96. As shown in FIG. 16A, the rotation controller 96 has externally supplied control signals 107 such as liquid crystal driving voltage, rotation status signals A and B, clock 1, data, clock 2, horizontal scanning start signal, and vertical scanning. A start signal is given. Depending on the rotation status signals A and B, the scanning direction signal, the mode signal,
The clocks 1 and 2 and the data are input to the liquid crystal display driver A (91, 92, 93) and the liquid crystal display driver B (94, 95) in FIG. 7B, respectively, and the enable-carry signal is shown in FIG. 7B. ) Enable-
Used for carry signals A99, D102, E103, G105. The rotation controller 96 is shown in FIG.
It operates like the table shown in FIG. For example, 0V is a low level (L) and 5V is a high level (H). The rotation status signal A in the control signal 107 is 0V
(L), when the rotation status signal B is 0V (L), liquid crystal display driver A-a91, liquid crystal display driver A-b92, liquid crystal display driver A-c
0V (L) scanning direction signal A, 0V to each of 93
The (L) mode signal A, the clock 1A, and the enable-carry signal A are output. On the other hand, liquid crystal display driver B-a94, liquid crystal display driver B-b95
0V (L) scanning direction signal B, 5V
The (H) mode signal B, the clock 2, the enable-carry signal G, and the data are output. Rotation status signal A
Is 0V (L) and B is 5V (H), liquid crystal display driver A-a91, liquid crystal display driver A-
0V to b92, LCD display driver A-c93
(L) scanning direction signal A, 5V (H) mode signal A,
Clock 2, enable-carry signal A, output data, and liquid crystal display driver B-a94, liquid crystal display driver B-b95, scan direction signal B of 5V (H), mode signal B of 0V (H), clock 1 , Enable-carry signal E is output. When the rotation status signal A is 5V (H) and B is 0V (L), the liquid crystal display driver A-a91, the liquid crystal display driver A-b92, and the liquid crystal display driver A-c93
The scanning direction signal A of 5V (H), the mode signal A of 5V (H), the clock 2, the enable-carry signal D, and the data are output, and 0V (is output to the liquid crystal display driver B-a94 and the liquid crystal display driver B-b95. L) scanning direction signal B, 0V (L) mode signal B, clock 1,
Enable-The carry signal G is output. When the rotation status signal A is 5 V (H) and B is 5 V (H), the liquid crystal display driver A-a91, the liquid crystal display driver A-b92, and the liquid crystal display driver A-c93
, A scanning direction signal A of 5V (H), a mode signal A of 0V (L), a clock 1 and an enable-carry signal D are output to the liquid crystal display driver B-a94 and the liquid crystal display driver B-b95 at 5V ( H) scanning direction signal B, 5V (H) mode signal B clock 2, enable-carry signal E, and data are output.

The operation of the liquid crystal display including the operation of the rotation controller 96 described above is shown in FIG.
This will be described with reference to (a) and (b), FIG. 8 and FIGS. During operation of the liquid crystal display, 0V is applied to the rotation status signal A to the rotation controller 96,
When 5V is applied to the rotation status signal B, the rotation controller 96 causes the liquid crystal display driver A
The scanning direction signal A, the mode signal A, the clock 2, the enable-carry signal A, and the data are output to (91, 92, 93), and the rotation controller 96 outputs the scanning direction to the liquid crystal display drivers B94 and 95. The signal B, the mode signal B, the clock 1, and the enable-carry signal E are output. In FIG. 7A, the liquid crystal display driver A-a91 is used as a signal line driver, and an image signal is output to the first signal line A75 and the first signal line B77, and the liquid crystal display driver B-a9 is output.
4 is used as a scanning line driver, and scanning line signals are output to the first scanning line A71 and the first scanning line B73. First, the liquid crystal display driver B-a94 sets the first scanning line A71 to a high potential state, the gates of the first pixel switch thin film transistor A79 and the first pixel switch thin film transistor B80 are set to the selected state, and the liquid crystal display driver A-a91 is displayed. The image data input serially is transferred to the first signal line A75 and the first signal line B77.
To output in order. LCD display driver A
When the data output to the horizontal row in -a91 is completed, the liquid crystal display driver A-a91 outputs the enable-carry signal B100 and activates the liquid crystal display driver A-b92. This liquid crystal display driver A-b92 also has a liquid crystal display driver A
-Perform the same operation as a91 and output the enable-carry signal C101. In this way, after the operation up to the liquid crystal display driver A-c93 is completed, the liquid crystal display driver B-a94 is used to drive the first scanning line A7.
1 in the constant potential state and the non-selected state, and then the first scanning line B
73 is brought to a high potential state, and image data is similarly output.
Repeating this, LCD display driver B-a94
When the operation of is completed, the enable-carry signal F10
4 is output and the liquid crystal display driver B-b95 is operated. When the operation of the liquid crystal display driver B-b95 ends, the operation for one screen ends. The output image at this time is as shown in the liquid crystal display A108 of FIG. In the operation described above, the rotation status signal A is set to 5V, B is set to 0V, the scanning direction signals 0V and 5V are reversed, and the enable-carry signals D and G are output from the rotation controller to the liquid crystal display driver. Display driver A91, 92,
The scanning directions of 93 and the liquid crystal display drivers B94 and 95 are opposite to each other, and the output image is as shown in the liquid crystal display A108 of FIG. 8C.

0V is applied to the rotation status signal A to the rotation controller 96 and 0V is applied to the rotation status signal B, and the rotation controller 96 supplies the scanning direction signal A, the mode signal A, the clock 1, to the liquid crystal display drivers A 91, 92, 93. Enable-output carry signal A, LCD display driver B94,
The scanning direction signal B, the mode signal B, the clock 2, the enable-carry signal G, and the data are output to 95.
In FIG. 7A, the liquid crystal display driver A-a9
1 is used as a scanning line driver, a scanning line signal is output to the second scanning line A76 and the second scanning line B78, and the liquid crystal display driver B-a94 is used as a signal line driver. The image signal is output to the second signal line B74. The scanning direction of the liquid crystal display drivers A91, 92, 93 and the order of operation are from left to right in FIG. 7B, and the scanning direction and the order of operation of the liquid crystal display drivers B94, 95 are shown in FIG.
(B) Since it goes from the bottom to the top, the output image is shown in (b) of FIG.
It becomes like the liquid crystal display A108. If the rotation status signal A is set to 5 V, B is set to 5 V, and the scanning directions are reversed, the liquid crystal display A1 shown in FIG.
The result is 08.

Although the example in which the liquid crystal display A108 of FIG. 8 is rotated has been described above, this may be applied to the liquid crystal display B109, a single screen display, or a display having three or more screens. Good.

Next, a second embodiment of the present invention will be described with reference to FIG. FIG. 9 shows a block diagram of the video RAM 5 in FIG. Video RAM of this embodiment
Is a DRAM memory cell 50, a column latch 51, a row latch 52, a row decoder 53, a column decoder 54,
Column I / O 55, data register A56, selector A
57, a selector C58, a selector D59, a data latch 60, a data register B61, a selector B62, and an output selector 63. When writing data to the DRAM memory cell 50, the operation is as follows. The input address is separated into a column and a row and latched by a column latch 51 and a row latch 52, respectively. The address latched in the column latch 51 is passed through the selector C58,
It is sent to the column decoder 54. On the other hand, the row latch 52
The address latched by is sent to the row decoder 55 through the selector C58. Data is data latch 60
Are stored in the DRAM memory cell 50 at a position designated by the row decoder 53 and the column decoder 54 through the column I / O 55 designated by the column decoder 54.

Next, the case of reading data from the DRAM memory cell 50 will be described. First, the case where there is no rotation will be described. The selector C58 sends the data of the column latch 51 to the column decoder 54 and the data of the row latch 52 to the row decoder 55 by a control signal input from the outside, and the selector D59 sets the selector A57 in the forward direction and sets the output selector 63 to the output selector 63. It is set to output the data from the selector A57. The column address input from the outside is the forward direction. A row in the DRAM memory cell 50 is selected by the address sent from the row latch 52 to the row decoder 53 and the data group is transferred to the data register A56. The data group transferred to the data register A56 is serially output through the selector E63 by the selector A57 set in the forward direction. As a result, the output image looks like the liquid crystal display A108 of FIG. FIG. 8 (c)
In order to output like the liquid crystal display A108, among the above operations, the column address input from the outside is reversed, and the selector D59 is selected by the control signal.
Therefore, the selector A57 may be set in the opposite direction and operated.

In order to rotate an image like the liquid crystal display A108 shown in FIG. 8B, the following operation is performed.
First, by the control signal input from the outside,
The selector C58 sends the data of the column latch 51 to the row decoder 55 and the data of the row latch 52 to the column decoder 54, the selector D59 sets the selector B62 in the forward direction, and the column I / O 55 sets the data of the column decoder 54 to the DRAM memory. The cell 50 is set to output, and the output selector 63 is set to output the data from the selector B62. The column address input from the outside is the reverse direction. A column in the DRAM memory cell 50 is selected by the address sent from the row latch 52 to the column decoder 54, and the data group is transferred to the data register B61. The data group transferred to the data register B61 is serially output through the output selector 63 by the selector B62 set in the forward direction.
As a result, the output image looks like the liquid crystal display A108 of FIG. In order to output as in the liquid crystal display A108 of FIG. 8D, among the above operations, the column address input from the outside is set to the forward direction, and the control signal causes the selector D59 to select the selector B.
62 may be set in the opposite direction and operated.

A third embodiment of the present invention will be described with reference to FIG. The video RAM of this embodiment includes a column decoder A65, a column I / O 55, row decoders A66 and D.
A RAM memory cell A64, a data register A56, a selector A57 and a row decoder B68, a row I / O69, a column decoder B70, a DRAM memory cell B67, a data register B61, a selector B62, and a pair of memory blocks and a column latch 51, a row latch 52, It comprises a data latch 60 and an output selector 63. When writing data to this video RAM, this video RAM operates as follows. The input address is divided into a column and a row and latched by a column latch 51 and a row latch 52, respectively. The address latched by the column latch 51 is sent to the column decoder A65 and the column decoder B70.
On the other hand, the address latched by the row latch 52 is sent to the row decoder A66 and the row decoder B68. Then, the data is latched by the data latch 60, passed through the column I / O 55 designated by the column decoder A65 and the row I / O 69 designated by the row decoder B68, and DR
The positions designated by the column decoder A65 and the row decoder A66 in the AM memory cell A64, and the row decoder B68 and the column decoder B70 in the DRAM memory cell B67.
It is stored in the position specified by.

Next, the operation of the video RAM of this embodiment when reading data from the video RAM of this embodiment will be described. The DRAM memory cell A64 side selects a certain row address in the DRAM memory cell A64 by the input row address and transfers the data group to the data register A56. The data group transferred to the data register A56 is output by the selector A57 to the output selector 6
Serial output through 3. On the other hand, the DRAM memory cell B67 side uses the DRA according to the input column address.
Select a column address in M memory cell B67,
The data group is transferred to the data register B61. The data group transferred to the data register B61 is the selector B
The output 62 is serially output by the output selector 63. Here, for example, when inputting image data, if the column address is set to the lower address and the row address is set to the upper address, the output on the side of the DRAM memory cell A64 becomes like the liquid crystal display A108 of FIG. The output on the memory cell B67 side is shown in FIG.
It becomes like liquid crystal display A108. On the other hand, when reading the image data, if the scanning directions of both the column and row addresses are reversed and the scanning directions of the selector A57 and the selector B62 are reversed, the DRAM memory cell A64 side, DRA
Both outputs of the M memory cell B67 side are shown in FIG.
The liquid crystal display A108 of FIG. 8 and the liquid crystal display A108 of FIG.

Although the embodiments of the present invention have been described above, these embodiments are the same as the liquid crystal display A10 shown in FIG.
Although the example in which 8 is rotated has been described, this may be applied to the liquid crystal display B109, a single-screen display, or a display having three or more screens.

[0043]

According to the present invention, the display can be rotated and displayed at 0, 90, 180 and 270 degrees by the signal from the system. In addition, it is not necessary to add an extra image memory or the like as the function is added, and there is no increase in size, power consumption, or price.

[Brief description of drawings]

FIG. 1 is a block configuration diagram of a liquid crystal display display system using the present invention.

FIG. 2 is an equivalent circuit diagram of a pixel structure of the liquid crystal display of the present invention.

FIG. 3 is a diagram showing a wiring pattern of a pixel structure of the liquid crystal display of the present invention.

FIG. 4 is an equivalent circuit diagram of a pixel structure of the liquid crystal display of the present invention.

FIG. 5 is a diagram showing a wiring pattern of a pixel structure of the liquid crystal display of the present invention.

FIG. 6 is an explanatory diagram of the configuration and operation of the liquid crystal display and driver of the present invention.

FIG. 7 is a diagram in which the liquid crystal display of the present invention and a liquid crystal display driver are combined.

FIG. 8 is a diagram showing a screen display example of the present invention.

FIG. 9 is a configuration diagram of a video RAM of the present invention.

FIG. 10 is a block diagram of a video RAM of the present invention.

FIG. 11 is an equivalent circuit diagram of a pixel structure of a conventional liquid crystal display.

FIG. 12 is a diagram showing a wiring pattern of a pixel structure of a conventional liquid crystal display.

FIG. 13 is a configuration diagram of a conventional dual port VRAM.

FIG. 14 is a block configuration diagram of a conventional liquid crystal display display system.

FIG. 15 shows a usage example of a mobile information terminal.

FIG. 16 is a configuration diagram of a rotation controller of the present invention.

[Explanation of symbols]

1 ... Liquid crystal display display system, 2 ... CPU, 3 ...
ROM, 4 ... RAM, 5 ... Video RAM, 6 ... Liquid crystal display controller, 7 ... Liquid crystal display 1 driver B, 8 ... Liquid crystal display 2 driver B, 9 ... Liquid crystal display 1 driver A, 10 ... Liquid crystal display 2 driver A, 11 ... Liquid crystal displays 1 and 12 ... Liquid crystal displays 2 and 13 ... Output buffer, 14 ... Output port,
15 ... IC card interface, 16 ... IC card connector, 17 ... Input buffer, 18 ... Input port, 19
... communication interface, 20 ... communication port, 21 ... system bus, 22 ... first pixel switch thin film transistor, 23 ... second pixel switch thin film transistor, 24
... first scanning line, 25 ... first signal line, 26 ... second scanning line, 27 ... second signal line, 28 ... liquid crystal, 29 ... liquid crystal drive circuit, 30 ... level shifter, 31 ... latch circuit ( 2)
Dual-direction shift register, 32 ... Latch circuit (1), 3
3 ... Latch address selector, 34 ... Scan line output, 35
... signal line output, 36 ... liquid crystal drive voltage, 37 ... clock 1, 38 ... data, 39 ... mode signal, 40 ... scanning direction signal, 41 ... clock 2, 42 ... I / O signal 1, 43 ...
I / O signal 2, 44 ... I / O selector, 45 ... Enable signal A, 46 ... Carry signal A, 47 ... Enable signal B, 48 ... Carry signal B, 50 ... DRAM memory cell, 51 ... Column latch, 52 ... Row latch, 53 ... Row decoder, 54 ... Column decoder, 55 ... Column I /
O, 56 ... Data register A, 57 ... Selector A, 58
... selector C, 59 ... selector D, 60 ... data latch, 61 ... data register B, 62 ... selector B, 63
... Output selector, 64 ... DRAM memory cell A, 65 ...
Column decoder A, 66 ... Row decoder A, 67 ... DR
AM memory cells B, 68 ... Row decoder B, 69 ... Row I / O, 70 ... Column decoder B, 71 ... First scanning line A, 72 ... Second signal line A, 73 ... First scanning line B , 7
4 ... 2nd signal line B, 75 ... 1st signal line A, 76 ... 2nd scanning line A, 77 ... 1st signal line B, 78 ... 2nd scanning line B, 79 ... 1st Pixel switch thin film transistor A, 80 ... First pixel switch thin film transistor B, 8
1 ... 1st pixel switch thin film transistor C, 82 ... 1st pixel switch thin film transistor D, 83 ... Liquid crystal A,
84 ... Liquid crystal B, 85 ... Liquid crystal C, 86 ... Liquid crystal D, 87 ... Second pixel switch thin film transistor A, 88 ... Second pixel switch thin film transistor B, 89 ... Second pixel switch thin film transistor C, 90 ... Second Pixel switch Thin film transistor D, 91 ... Liquid crystal display driver A
-A, 92 ... Liquid crystal display driver Ab, 93 ...
Liquid crystal display driver A-c, 94 ... Liquid crystal display driver B-a, 95 ... Liquid crystal display driver B-b, 96 ... Rotation controller, 97 ... Control signal A, 98 ... Control signal B, 99 ...
Enable-carry signal A, 100 ... enable-carry signal B, 101 ... enable-carry signal C,
102 ... Enable-carry signal D, 103 ... Enable-carry signal E, 104 ... Enable-carry signal F, 105 ... Enable-carry signal G, 106
... Liquid crystal display, 107 ... Control signal, 10
8 ... Liquid crystal display A, 109 ... Liquid crystal display B, 111 ... Pixel switch thin film transistor, 112 ...
Scanning line, 113 ... Signal line, 121 ... Liquid crystal display 1
Frame memory 122 ... Liquid crystal display 2 frame memory 201 ... Buffer 202 ... Buffer 203
... buffer, 204 ... buffer, 211 ... buffer, 2
12 ... Buffer, 213 ... Buffer, 214 ... Buffer, 215 ... Buffer, 216 ... Buffer, 221 ... Vertical scanning start signal, 222 ... Horizontal scanning start signal.

Claims (10)

[Claims] 1. A display means comprising a plurality of liquid crystal pixels, a plurality of drive means for controlling the liquid crystal pixels to display an image on the display means, and a display means for the plurality of drive means. A liquid crystal display device having image data to be displayed and image data control means for supplying information indicating a scanning direction on the display means. 2. The image data control means includes a memory for temporarily storing the image data, and a control means for reading the image data from the memory and supplying the image data to the plurality of driving means. The described liquid crystal display device. 3. The plurality of driving means, each driving means has the same structure, and according to the information indicating the scanning direction,
3. The liquid crystal display device according to claim 1, wherein either the scanning signal or the image data is selected and supplied to the plurality of liquid crystal pixels. 4. The display means is provided with two sets of a signal line and a scanning line for one liquid crystal pixel, a first switch provided at an intersection of the first set, and 4. The liquid crystal display device according to claim 1, wherein the liquid crystal pixel is provided at a connection point with a second switch provided at an intersection of the second set. 5. A display means comprising a plurality of liquid crystal pixels, a plurality of drive means for controlling the liquid crystal pixels to display an image on the display means, and a display means for the plurality of drive means. A liquid crystal display device comprising: image data control means for temporarily storing image data to be displayed in two storage elements having an orthogonal positional relationship and then supplying the image data to the driving means. 6. A plurality of scanning lines, a plurality of signal lines that cross the plurality of scanning lines and send a signal to be displayed, pixels provided at each intersection of the scanning lines and the signal lines, At least two pixel selection switches connected to the pixels,
A pixel structure of a liquid crystal display, comprising: a pixel selection switch for instructing driving of the pixel in accordance with a connection state to one pixel selection switch. 7. An external control circuit for controlling a liquid crystal display, and a liquid crystal display control signal, a liquid crystal display display data signal and a liquid crystal display driving voltage, which are connected to a terminal portion of the liquid crystal display. A liquid crystal display drive circuit for outputting a display data signal or a liquid crystal drive voltage to pixels constituting the liquid crystal display, wherein the display data signal or the liquid crystal drive voltage is generated in accordance with a control signal from the external control circuit. 2. A liquid crystal display drive circuit comprising: a means for selecting any one of the outputs and a means for outputting a signal indicating the input / output timing of the output display data signal or the liquid crystal drive voltage. 8. A liquid crystal display drive integrated circuit in which a plurality of the liquid crystal display drive circuits are prepared, and signals indicating the input / output timing of the liquid crystal drive voltage of adjacent liquid crystal display drive circuits are connected to each other. 9. A storage element for storing input image data in a predetermined row address and column address, and the storage element so that the row address and the column address in the storage element are orthogonal to each other. An image storage element comprising a first read storage element and a second read storage element for reading out and storing the stored image data. 10. The image storage element according to claim 9, wherein the image data is output from either one of the first read storage element and the second read storage element. .