JPH07174799A - Jitter measuring instrument - Google Patents

Abstract

PURPOSE:To detect jitter components by the input signal of only a signal to be measured including jitter without requiring a stable synchronized reference signal (clock) except a signal to be measured, in a time fluctuation measuring instrument according to time/voltage conversion system. CONSTITUTION:A reference signal (clock) for generating RAMP wave (saw-tooth wave) 3 is supplied through a PLL circuit 2 for attenuating jitter by utilizing input signal from a signal 1 to be measured, thus eliminating the need for another reference signal (clock) and measuring time fluctuation (jitter) with the input signal of only the signal 1 to be measured.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a jitter measuring apparatus having a built-in jitter attenuating circuit in the technical field of electronic measuring instruments.

[0002]

2. Description of the Related Art In a conventional jitter measuring apparatus, a stable and stable clock (= reference signal) serving as a reference is required in addition to a signal under measurement including jitter. FIG. 3 shows a block diagram of a conventional jitter measurement method. Further, FIG. 4 shows a timing chart in which the signal under measurement 1 is sampled 4 in the same measurement method, and also shows the concept of measuring the jitter component.

FIG. 3 shows the principle of a time fluctuation (= jitter) measuring device using a normal t / V (time / voltage) conversion method. By sampling 4 the slope portion of the RAMP wave (= sawtooth wave) 3 started 9 by the stable reference signal (= clock) 10 by the measured signal 1, the measured signal 1
The time fluctuation (= jitter) of is converted to voltage and
The measurement is performed using the / D converter 5 and the like. Figure 4 shows the calculation formula for grasping the jitter component converted into voltage.
Also shows.

[0004]

In the jitter measuring device according to the conventional method for measuring jitter, a synchronized and stable clock signal which is a reference signal is required in addition to the signal under measurement. Therefore, an object of the present invention is to realize a measurement method that can omit the clock signal and measure the jitter component of the signal under measurement by inputting only the signal under measurement.

[0005]

In order to solve the above problems, in the present invention, when the PLL circuit (= detailed view 14) shown in FIG. 1 is used, the high frequency component of the jitter contained in the signal under test 1 It is noted that is attenuated 13 and is not transmitted to the output. FIG. 2 is a conceptual diagram showing that the PLL circuit forms the reduced pass filter characteristic 11 for the time-varying component (= jitter) of the input signal 7 due to its loop time constant.

The PLL circuits 2 and 14 normally perform an operation of cutting high frequency region components. Therefore, the measured signal 1 is PLL
By passing the circuit 2 and 14, the high frequency component of the jitter contained in it is attenuated, so the PLL
The output signals of 2.14 can be used as a stable reference signal (= clock) 10 for the RAMP wave generation 3. In the same manner, since the signal to be measured 1 is input, the jitter is attenuated, the clock is internally generated, and the signal is input again as the trigger for the RAMP wave generation 3, so that synchronization is achieved. Therefore, it becomes possible to measure the jitter only with the signal under measurement 1.

[0007]

If the jitter of the lower frequency component is attenuated (that is, if the measurement is desired), the loop band 12 of the PLL circuits 2 and 14 may be set small (narrow).

[0008]

1 is a block diagram of a jitter measuring apparatus according to an embodiment of the present invention and a PLL (= Phase Locked Lo) therein.
is a block diagram showing details of the configuration of op) 2. (1) When the signal under test 1 is input, the signal is P
It is input to the LL2 and the sampling unit 4. (2) The signal under measurement 1 input to the PLL 2 is output as a trigger signal to the RAMP wave (= sawtooth wave) generating section 3 as a clock 6 with jitter attenuated. (3) Next, the slope portion of the RAMP wave 3 formed by the measured signal 1 in which the jitter is attenuated and started by the clock that is the reference signal is sampled 4 by the measured signal 1 to obtain the measured signal 1 of the measured signal 1. The time fluctuation (= jitter) can be converted into a voltage and measured by the A / D converter 5 in the subsequent stage. (4) Details of PLL2 Figure 14 is very general,
It is a part of the basic configuration of the present invention.

[0009]

Since the present invention is constructed as described above, it has the following effects. That is, by inputting the signal under measurement 1 including the jitter into the PLL2 circuit, the high frequency region component of the jitter included in the signal under measurement 1 is attenuated.
The output signal from the circuit 2 can be used as a synchronized and stable clock (= reference signal) 10. As a result, the reference signal 10
Even if the input is omitted, the jitter component can be measured only by the signal under measurement 1.

[Brief description of drawings]

FIG. 1 is a block diagram of a jitter measuring apparatus according to an embodiment of the present invention and a block diagram showing details of the configuration of a PLL circuit therein.

FIG. 2 is a conceptual diagram showing that the PLL circuit used in the present invention forms a low-pass filter characteristic for jitter.

FIG. 3 shows a block diagram of a jitter measuring apparatus according to a conventional measuring method.

FIG. 4 shows a timing chart in which a signal under measurement is sampled in a jitter measuring device and also shows a concept of measuring a jitter component.

[Explanation of symbols]

 1 Signal to be measured 2 PLL circuit 3 RAMP wave generation 4 Sampling 5 A / D conversion 6 Attenuated clock of jitter 7 Input signal 8 Output signal 9 Start 10 Reference signal (clock) 11 Low-frequency region pass filter characteristic 12 PLL loop Band 13 Area where high frequency component is not output 14 Detailed diagram of PLL2 15 Jitter component calculation formula

Claims (1)

[Claims] 1. A time-variation measuring apparatus using a time / voltage conversion method, wherein a PLL circuit (2) for inputting a signal under measurement (1) is provided and a sawtooth shape for inputting an output of the PLL circuit (2) as a trigger signal. A jitter measuring apparatus comprising a wave generator (3) and a sampling unit (4) for sampling the output of the sawtooth wave generator (3) by the signal under measurement (1).