JPH07168532A - Electron releasing element - Google Patents

Abstract

PURPOSE:To produce a display having the lessened unevenness of image display by using an array of electron releasing elements produced by providing the surfaces of emitter wiring layers with metallic films which are not etched by etching of insulating films and have an electrical conductivity. CONSTITUTION:This electron releasing element has the emitter wiring layers 11 on an insulating substrate 10, the insulating layers 13 on the emitter wiring layers 11, gate electrode 14 layers, plural small holes of a required size formed on the insulating layers 13 and the gate electrode 14 layers and emitter electrodes 17 having pointed front ends within these small holes. The metallic connecting layers 12 which are not etched by etching of the insulating layers 13 and can make electrical connection between the emitter electrodes 17 and the emitter wiring layers 11 are formed between the emitter wiring layers 11 and the emitter electrodes 17 in the bottom parts of the small holes. As a result, the distances between the emitter electrodes 17 having the pointed front ends and the gate electrodes 14 are made uniform over the entire surface of the large-area substrate 10 and the electron releasing element having uniform and stable quality over the entire surface of the substrate 10 is obtd.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electron emitting device used in a flat panel image display device or the like.

[0002]

2. Description of the Related Art Recently, a display device used for a television, a computer and the like has become indispensable as a man-machine interface due to the progress of information society.

With the expansion of display devices to various uses, the requirements for display quality and performance have become more severe. The current development trend is especially large size, high definition, and flatness, and liquid crystal displays are growing as flat displays because the conventional C
Compared to RT displays, it is smaller, lighter in weight, and thinner, which has led to new applications for display devices in narrow spaces such as airplanes, railroads, and cars.

Disadvantages of this liquid crystal display are that the viewing angle is narrow and the power consumption of the backlight is large. Therefore, development of a new thin self-luminous display device is desired. As an electron emission source used for the thin self-luminous display device, a cold cathode capable of lower power consumption than thermoelectrons has been actively developed.
In particular, the field emission type electron emission (radiation) element is
7 V / cm) is concentrated on the cold cathode so that the radius of curvature of the tip of the cathode is submicron or less. Such a field emission electron-emitting device has the following features. (1) The current density is high. (2) Low power consumption. (3) The fine processing technology, which is a recent LSI manufacturing technology, can be used.

Conventionally, this field emission type electron emission (radiation)
Several proposals have been made as elements and manufacturing methods. That is, Journal of Applied Physics (1968, Vol. 39, No. 7, p. 3504-3.
505) and JP-A-61-217883.

A typical structural example of this conventional electron-emitting device is shown in a sectional view of FIG. 9 and a schematic perspective view of FIG. In the figure, reference numeral 21 denotes an insulating substrate having a low-resistivity silicon wiring selectively doped with a high concentration of impurities, and a thermal oxide film is formed as an insulating layer 23 on the substrate 21.
3 has a small hole 25 formed by etching. In the small hole 25, a first conductive film 22 (emitter wiring pattern) made of a conductive material that is a high melting point metal such as molybdenum Mo and tungsten W and a low work function metal is formed as an electron emitting portion (emitter). . An electron emitting portion 26 having a sharp tip is formed on the first conductive film 22.
(Emitter electrode (cathode)), and on the insulating layer 23 (thermal oxide film or the like) outside the small hole 25, the second conductivity is formed by a thin film such as chromium Cr or molybdenum Mo that surrounds the emitter electrode and becomes a gate electrode. The film 24 (gate electrode) is formed.

In the conventional method for manufacturing an electron-emitting device, as shown in FIGS. 11 to 13, first, as shown in FIG. 11, a first conductive film 22 (emitter wiring) having an appropriate pattern is formed on an insulating substrate 21. Pattern), the insulating layer 23, and the second conductive film 24 are sequentially formed.

Next, as shown in FIG. 12, on the second conductive film 24, a resist pattern (etching mask pattern) composed of a plurality of minute patterns having a diameter of 1 to 2 μm arranged in an array by photolithography is formed. The second conductive film 24 and the insulating layer 23 are formed by anisotropic etching.
Then, a small hole 25 reaching the first conductive film 22 is formed.

Next, a direction in which the opening of the small hole 25 having a diameter of 1 to 2 μm is closed by using a lift-off metal such as copper Cu or aluminum Al by a rotary oblique deposition method on the second conductive film 24. Vapor is deposited in the direction of decreasing the diameter of the opening to reduce the opening diameter of the small hole 25 to about 0.2 to 0.
A small hole 25 with a 7 μm diameter reduced opening is formed.

Molybdenum Mo is formed just above the reduction opening.
When a metal having a high melting point and a low work function, such as tungsten or tungsten W, is vapor-deposited in a direction perpendicular to the insulating substrate 21, the tip side becomes gradually thin on the first conductive film 22 (emitter wiring pattern) in the small hole 25. At the same time as the pointed emitter electrode 26 is formed, the opening is made of molybdenum Mo.
It is blocked by vapor deposition of a vapor deposition material such as tungsten or tungsten W.

Finally, the copper Cu which formed the reduced opening.
By selectively etching away only aluminum and aluminum Al and opening the opening of the small hole 25 again to a diameter of 1 to 2 μm, the first conductive film 22 (emitter wiring) in the small hole 25 as shown in FIG. Has a sharp tip-shaped emitter electrode 26 (cathode) on the pattern) and has a second conductive film 24 sandwiching the insulating layer 23 on the opening of the small hole 25.
An array of electron-emitting devices having (gate electrode) is produced.

In the above-described conventional structure and manufacturing method of the electron-emitting device, when the small holes are formed, the insulating film SiO ₂ is anisotropically etched perpendicularly to the substrate by the plasma etching apparatus. In the display using the electron-emitting device thus manufactured, the unevenness of the small holes due to the anisotropic etching, which was not a problem when the screen size was relatively small such as about 3 inches, was 6 inches or more. In the case of a large area, it becomes a problem, and there has been a demand for improvement of a manufacturing method which does not cause uneven etching even in a large area. Also, the roughness of the bottom of the small holes due to etching has been a problem.

[0013]

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and its object is to:
That is, in the manufacture of the electron-emitting device, the insulating film SiO
₂ is anisotropically etched with a plasma etching device to create small holes, the depth of the small holes is made uniform over the entire surface of a large area substrate, and the height from the sharp tip to the bottom of the resulting emitter electrode is formed. It is an object of the present invention to provide an electron-emitting device that can be manufactured uniformly over the entire surface of a large-area substrate and the distance between the sharp tip of the emitter electrode and the edge of the gate electrode surrounding the emitter electrode can be uniform over the entire surface of the large-area substrate.

Further, when a small hole is formed in the insulating film SiO ₂ perpendicularly to the substrate by reactive ion etching, the surface of the emitter wiring layer low resistance Si exposed at the inner bottom of the small hole near the etching end point depending on the conditions. Was rough in the form of needles (when the depth of the small holes was about 1 μm, the unevenness was about 0.1 to 0.8 μm). Further, this unevenness is caused by the emitter wiring layer S.
There was a case where the surface of i was rough and a case where the insulating film SiO ₂ remained. Therefore, it was found that the quality of the emitter electrode film with a sharp tip formed thereafter was affected. That is, if the surface that is the nucleus of the film growth is rough and has irregularities, the film quality of the emitter electrode with a sharp tip formed on it will be less dense, and the tip will not be sharp and becomes a problem. It has been desired to improve the manufacturing method.

[0015]

Means provided by the present invention for solving the above-mentioned problems include: an emitter wiring layer on an insulating substrate; an insulating layer on the emitter wiring layer; a gate electrode layer; An electron-emitting device having a plurality of small holes of a required size formed in a layer and a gate electrode layer, and an emitter electrode having a sharp tip inside the small holes; The electron-emitting device is characterized in that a metal connection layer is formed between the emitter electrodes, which is not etched by the etching of the insulating layer and which can electrically connect between the emitter electrode and the emitter wiring layer.

Further, in the electron-emitting device, the diameter of the circular pattern of the metal connection layer is larger than the diameter of the bottom of the small holes and smaller than 1/2 of the pitch between the small holes.

Further, the volume resistivity of the metal connecting layer is 1
It is an electron-emitting device characterized by being a conductor of Ω · cm or less.

[0018]

According to the present invention, when a small hole is formed by etching the insulating film SiO ₂ perpendicularly to the substrate with a plasma etching apparatus, a portion of a large area of the substrate that has uneven etching rate and is etched quickly. Even if there is, the etching is completed at the metal connection layer, so that the etching time can be set according to the portion where the etching rate is slow. Therefore, small holes having a uniform depth can be formed over the entire surface of the large-sized substrate. Therefore, the height of the emitter electrode from the sharp tip to the bottom is uniform, and the distance between the emitter electrode and the gate electrode at the sharp tip can be made uniform over the entire surface of the large area substrate, and electron emission of uniform and stable quality over the entire surface of the substrate. The device is obtained. Further, it is possible to obtain an electron-emitting device having uniform electric characteristics with no problem even if the alignment between the small hole and the metal connection layer or the emitter electrode and the resistance layer is slightly deviated. Further, since the bottom of the small hole is not etched and is not roughened, it does not affect the film quality of the emitter electrode deposited thereon.

In particular, as in claim 2, the diameter of the circular pattern of the metal connection layer is larger than the diameter of the bottom of the small holes and is smaller than 1/2 of the pitch between the small holes. In the case of the electron-emitting device described, there is little variation in characteristics due to misalignment between the circular pattern and the small holes,
It is exceptionally good.

Further, in the electron-emitting device according to claim 1, wherein the metal connection layer is a conductor having a volume resistivity of 1 Ω · cm or less as in claim 3, variations in characteristics are caused. There are few, and it is outstanding especially.

[0021]

EXAMPLE A method for manufacturing an electron-emitting device according to the present invention will be described with reference to FIGS.
The manufacturing steps of the embodiment shown in FIG. 8 will be sequentially described below.

In the structure of the electron-emitting device according to the present invention, as shown in the sectional view of FIG. 2, for example, n-type or p-type impurities are highly concentrated in the insulating silicon substrate as a low resistance conductive layer of the emitter wiring layer. On the insulative substrate 10 with a conductive layer 11 which is doped (ion-implanted)
A circular pattern of the metal connection layer 12 made of r is arranged in a plurality of arrays, and an emitter electrode 17 having a sharp tip is formed on the array, and the circular pattern of the metal connection layer 12 serves as a bottom and surrounds it. The insulating layer 13 is formed as
The electron emitting device has a gate electrode 14 formed on the insulating layer 13. The size of the circular pattern of the metal connection layer 12 is larger than the circular bottom of the small holes of the insulating layer and smaller than 1/2 of the pitch between the adjacent small holes.

In the method of manufacturing the electron-emitting device according to the present invention, as shown in the step of FIG. 2, for example, n-type or p-type impurities are highly concentrated on the insulating silicon substrate as a low resistance conductive layer of the emitter wiring layer. Insulating Substrate 10 with Emitter Wiring Layer 11 as Doped (Ion Implanted)
As shown in the process of FIG. 3, a metal connection layer 12 made of chromium Cr is sputtered on the entire surface by about 0.1 μm, and is a novolac-based resist (or photoresist) with a diameter of about 1 μm and a film thickness of about 1 μm. A columnar pattern of about 1.2 μm arranged in a plurality of arrays is formed by photolithography.

Next, as shown in the step of FIG. 4, the metal connection layer 12 is patterned by plasma etching using CHCl ₃ gas using the resist as a mask. Then, as shown in the step of FIG. 5, an insulating layer 13 made of SiO ₂ is formed on the entire surface by sputtering to a thickness of about 1.2 μm, and then a gate electrode material 14 made of Mo is formed by sputtering on a thickness of about 0.3 μm. To do.

Next, as shown in the step of FIG. 6, a peeling layer 15 made of Al is further formed by vacuum vapor deposition to a film thickness of about 0.3 μm, and a novolac-based photoresist having a dry etch resistance is coated to form a metal. Exposure is performed by using a photomask aligned so as to be concentric with the connection layer 12, and the resist 16 is used as a mask to form a peeling layer 15 made of Al.
Is plasma etched using a CHCl ₃ etching gas.

Further, as shown in the step of FIG. 7, the insulating layer 13 made of SiO ₂ is etched perpendicularly to the substrate surface using C ₂ F ₆ as an etching gas until the surface of the metal connecting layer 12 is exposed. And form small holes. At this time, since there is a metal connection layer, it is possible to perform etching for a sufficient time, and since it is possible to set the time to a place where the progress of etching is slow over the entire surface of the substrate, keep the depth of the small holes constant. Is possible. In particular, when the relationship between the diameter R of the small hole and the depth d of the small hole is R ≦ d, the etching rate unevenness is likely to occur due to the subtle difference in the etching surface state, and the metal connection layer is required.

Next, the resist 16 is removed with a stripping solution, and further washed with oxygen plasma by ashing, and as shown in the process of FIG. 8, Mo is vacuum-deposited perpendicularly to the substrate to form a pointed emitter electrode. To form. At this time, the Mo film is also deposited on the gate electrode 15. Next, the peeling layer 15 made of Al is removed by wet etching. At that time, the Mo film deposited on the peeling layer 15 is also removed,
By so-called lift-off, the emitter electrode 17 having a sharp tip is exposed as shown in FIG.

The insulating substrate has an insulating property such as silicon and glass and has a thickness of 0.5 to 3 mm as a supporting base material. The emitter wiring layer is n-type or p-type
In addition to silicon in which a type impurity is ion-implanted, a metal or the like may be used. The metal connection layer is made of Cr, Mo, T
Metals such as a, Nb and the like can be used, and the thickness thereof may be 0.1 to 0.3 μm, and the manufacturing method thereof can be sputtering or other means such as vapor deposition. As the resist, a means such as a novolac-based resist or a photoresist can be used.

In the patterning process, the resist is used as a mask to perform patterning by plasma etching using CHCl ₃ gas. For the next insulating layer, SiO ₂ or the like can be used, and sputtering, vapor deposition, CVD, or the like can be used as a manufacturing method, and the thickness thereof is 0.5 to 2 μm. In addition to Mo, Cr, W, Nb, or the like can be used for the gate electrode, and sputtering, vapor deposition, or the like can be used as a manufacturing method, and the film thickness is 0.2 to 0.7 μm. For the release layer, Cu or the like can be used in addition to Al, and vacuum deposition, plating, sputtering or the like can be used as a manufacturing method, and the film thickness is 0.2 to 1 μm. In the next patterning step, patterning is performed by plasma etching using BCl ₃ gas using this resist as a mask. In the next patterning step, patterning is performed by plasma etching using a gas such as C ₂ F ₆ , CF ₄ or SF ₆ using this resist as a mask.

As the stripping solution, each metal etching solution or the like can be used, and as the cleaning, ashing cleaning with oxygen plasma can be used.

[0031]

As described above, according to the present invention, in the structure of the electron-emitting device, the insulating film is not etched by the etching of the insulating film and the surface is not roughened by the etching so that the unevenness of the small hole is not caused by the etching unevenness of the insulating film. Further, by providing a metal film having electrical conductivity on the emitter wiring layer, it is possible to form an emitter electrode having a sharp tip on the entire surface of the large-area substrate in a uniform size. As a result, a display with less unevenness in image display could be produced using the produced array of electron-emitting devices.

[0032]

[Brief description of drawings]

FIG. 1 is a completed sectional view of a method for manufacturing an electron-emitting device of the present invention.

2A and 2B are cross-sectional views of the electron-emitting device of FIG.

3A and 3B are cross-sectional views of the electron-emitting device of FIG. 1 in the middle of manufacturing by the manufacturing method.

FIG. 4 is a sectional view of the electron-emitting device of FIG. 1 in the process of manufacturing by the manufacturing method.

5A and 5B are cross-sectional views of the electron-emitting device of FIG. 1 during manufacturing by the method of manufacturing the same.

6A and 6B are cross-sectional views of the electron-emitting device of FIG. 1 during manufacturing by the method of manufacturing the same.

7A and 7B are cross-sectional views of the electron-emitting device of FIG. 1 in the middle of manufacturing by the manufacturing method.

8A and 8B are cross-sectional views of the electron-emitting device of FIG. 1 in the middle of manufacturing by the manufacturing method.

FIG. 9 is a sectional view of a structure of a conventional electron-emitting device.

FIG. 10 is a perspective view of a structure of a conventional electron-emitting device.

FIG. 11 is a cross-sectional view of a manufacturing process of a conventional electron-emitting device.

FIG. 12 is a cross-sectional view showing the same manufacturing process of the electron-emitting device as in FIG. 11.

FIG. 13 is a cross-sectional view showing the same manufacturing process as in the electron-emitting device shown in FIG.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 ... Substrate 11 ... Emitter wiring layer 12 ... Metal connection layer 13 ... Insulating layer 14 ... Gate electrode 15 ... Release layer 16 ... Resist 17 ... Emitter electrode 18 ... Emitter electrode material 21 ... Insulating substrate 22 ... Emitter wiring conductive layer (first 1 conductive layer) 23 ... Insulating layer 24 ... Gate electrode conductive layer (second conductive layer) 25 ... Small hole 26 ... Emitter electrode

Claims (3)

[Claims] 1. An emitter wiring layer on an insulating substrate, an insulating layer on the emitter wiring layer, a gate electrode layer, and a plurality of small holes of a required size formed in the insulating layer and the gate electrode layer. In an electron-emitting device including an emitter electrode having a sharp tip in the small hole, the insulating layer is not etched between the emitter wiring layer and the emitter electrode at the bottom of the small hole, and the emitter electrode An electron-emitting device characterized in that a metal connection layer capable of making an electrical connection with an emitter wiring layer is formed. 2. The diameter of the circular pattern of the metal connecting layer is
It is larger than the diameter of the bottom of the small holes and is 1 / the pitch of the small holes.
The electron-emitting device according to claim 1, which is smaller than 2. 3. The volume resistivity of the metal connecting layer is 1 Ω · cm.
The electron-emitting device according to claim 1, which is the following conductor.