JPH07168368A - Formation of resist pattern and thin-film metallic pattern - Google Patents

Formation of resist pattern and thin-film metallic pattern

Info

Publication number
JPH07168368A
JPH07168368A JP5314696A JP31469693A JPH07168368A JP H07168368 A JPH07168368 A JP H07168368A JP 5314696 A JP5314696 A JP 5314696A JP 31469693 A JP31469693 A JP 31469693A JP H07168368 A JPH07168368 A JP H07168368A
Authority
JP
Japan
Prior art keywords
resist
forming
pattern
resist pattern
thin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5314696A
Other languages
Japanese (ja)
Inventor
Isamu Odaka
勇 小高
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP5314696A priority Critical patent/JPH07168368A/en
Publication of JPH07168368A publication Critical patent/JPH07168368A/en
Pending legal-status Critical Current

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  • Drying Of Semiconductors (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)

Abstract

PURPOSE:To provide a method for forming resist patterns of stencil shapes having heat resistance and a method for forming good thin-film metallic patterns which do not generate burrs by a lift-off method with the resist patterns as a mask. CONSTITUTION:This method for forming the thin-film metallic patterns includes a stage for forming a resist 2 on a semiconductor substrate 1, then subjecting the resist to desired pattern exposing and org. solvent treatment to form a hardly soluble layer on the front layer part of the resist 2, a stage for developing the sectional shapes of the resist patterns to the stencil shapes having eaves formed wider in the apertures of the substrate surface than the apertures of the front layer part of the resist, a stage for irradiating the resist patterns having the stencil shapes with far UV rays 6 to impart heat resistance thereto and a stage for depositing a thin metallic film by evaporation with these resist patterns as a mask, then removing the resist patterns, thereby forming the thin-film metallic patterns on the semiconductor substrate 1. As a result, the deformation of the resist patterns having the stencil shapes does not arise even if there is a temp. rise by the vapor deposition of the thin-film metal and, therefore, the good thin-film metallic patterns free from the burrs are obtd.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、リフトオフ法により半
導体基板上に薄膜金属パターンを形成する方法に係り、
特にレジストパターンの断面形状をオーバハング状のス
テンシル形状に加工した後、レジストパターンに耐熱性
を与え、該レジストパターンをマスクとしてバリの無い
良好な薄膜金属パターンを形成する方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a thin film metal pattern on a semiconductor substrate by a lift-off method,
In particular, the present invention relates to a method for forming a good thin film metal pattern without burrs by applying heat resistance to a resist pattern after processing a resist pattern into a stencil shape having an overhang shape and using the resist pattern as a mask.

【0002】[0002]

【従来の技術】半導体基板上に薄膜金属や金属配線を形
成する一方法としてリフトオフ法がある。この方法で
は、蒸着したい薄膜金属等のリフトオフを容易にするた
めにレジストの断面形状をオーバハング状に加工するス
テンシル形成が必要である。このステンシル形状の庇の
長さが不十分な場合には、リフトオフ後の薄膜金属の切
断が不完全となりやすく薄膜金属の端部にバリが生じる
という問題がある。このようにリフトオフ法では、ステ
ンシルの断面形状がリフトオフ後の薄膜金属パターンの
品質を大きく左右することになる。リフトオフ用のステ
ンシルの形成方法としては、有機溶媒処理が報告されて
いる〔M.Hatzakis:Single-Step Optical Lift-Off Pro
cess,IBM J.Res.Develop.vol.24,No.4,(1980),p.45
2〕。ここでは、半導体基板上に所定のレジストを形成
し、パターン露光をする前、あるいはパターン露光をし
た後、クロロベンゼンやブロムベンゼン等の有機溶媒を
使用したレジストの有機溶媒浸漬法が最も優れた方法で
あるとされている。この有機溶媒浸漬処理によってレジ
スト表層部に生じた変性層(難溶可性層)と、その下部
の非変性層(溶可性層)の露光部および未露光の各部分
の現像速度差によってオーバハング部が形成されるもの
と考えられている。図3は、半導体基板1上にレジスト
2を形成し、所望のパターン露光、ブロムベンゼンの浸
漬処理を施した後、現像処理を行い、ステンシル形状の
レジストパターンを形成した場合の一例を示す。図から
も明らかなようにオーバハング3のステンシルが形成さ
れている。このステンシル形状は、レジストのプリベー
ク温度を低くし、ブロムベンゼン等の有機溶媒の浸漬時
間を長くする程、オーバハングの大きい庇が得られる。
図4は、良好な形状のステンシルが形成されているレジ
ストパターンの上から、膜厚の大きい薄膜金属〔例えば
膜厚が1〜2ミクロンの金(Au)膜〕4を蒸着した場
合のレジストパターンの断面形状を示す。厚い薄膜金属
4を形成するためには、長時間真空中において蒸着する
必要があり、このとき蒸着金属を溶解するための熱源
や、蒸着された金属の持つ潜熱の影響により、半導体基
板の温度上昇が生じ、良好な形状のステンシルが形成さ
れていたレジストパターンが変形して、有機溶媒(一般
にはアセトン等を用いる)によってリフトオフ処理を行
っても、図に示すように薄膜金属4の切断が不完全とな
り、薄膜金属4の端部にバリ5などが生じるか、もしく
はリフトオフ処理ができなくなるという問題があった。
2. Description of the Related Art A lift-off method is known as a method for forming a thin film metal or metal wiring on a semiconductor substrate. In this method, it is necessary to form a stencil for processing the resist cross-section into an overhang shape in order to facilitate lift-off of thin film metal or the like to be vapor-deposited. If the length of the stencil-shaped eaves is insufficient, the cutting of the thin-film metal after lift-off is likely to be incomplete, and there is a problem in that burrs are formed at the ends of the thin-film metal. Thus, in the lift-off method, the cross-sectional shape of the stencil greatly affects the quality of the thin film metal pattern after lift-off. Organic solvent treatment has been reported as a method of forming a stencil for lift-off [M. Hatzakis: Single-Step Optical Lift-Off Pro
cess, IBM J.Res.Develop.vol.24, No.4, (1980), p.45
2]. Here, a predetermined resist is formed on a semiconductor substrate, and an organic solvent dipping method of a resist using an organic solvent such as chlorobenzene or brombenzene is the best method before pattern exposure or after pattern exposure. It is said that there is. Overhang due to the difference in development speed between the exposed and unexposed areas of the modified layer (poorly soluble layer) formed on the surface layer of the resist and the non-modified layer (soluble layer) below It is believed that parts are formed. FIG. 3 shows an example of a case where a resist 2 is formed on a semiconductor substrate 1, a desired pattern exposure and brombenzene immersion treatment are performed, and then a development treatment is performed to form a stencil-shaped resist pattern. As is clear from the figure, the stencil of the overhang 3 is formed. With this stencil shape, the eaves with a large overhang can be obtained by lowering the resist pre-bake temperature and prolonging the immersion time of the organic solvent such as brombenzene.
FIG. 4 is a resist pattern in which a thin film metal (for example, a gold (Au) film having a thickness of 1 to 2 microns) 4 is vapor-deposited on a resist pattern on which a stencil having a good shape is formed. The cross-sectional shape of is shown. In order to form the thick thin film metal 4, it is necessary to evaporate in a vacuum for a long time. At this time, the temperature of the semiconductor substrate rises due to the heat source for melting the evaporating metal and the latent heat of the evaporated metal. Occurs, the resist pattern on which the stencil having a good shape is formed is deformed, and even if lift-off treatment is performed with an organic solvent (generally, acetone or the like), the thin metal film 4 is not cut as shown in the figure. There is a problem that the thin film metal 4 is completely formed with burrs 5 or the like at the end of the thin film metal 4, or the lift-off process cannot be performed.

【0003】[0003]

【発明が解決しようとする課題】本発明の目的は、上述
した従来技術における問題点を解消し、リフトオフ法に
より半導体基板上に薄膜金属パターンを形成する方法に
おいて、レジストパターンの断面形状を良好なオーバハ
ング状のステンシル形状に加工し、かつ耐熱性のあるレ
ジストパターンの形成方法と、上記耐熱性のあるレジス
トパターンをマスクとして用いて薄膜金属を形成し、リ
フトオフ法によりレジストを除去してもバリの生じない
良好な薄膜金属パターンが得られる薄膜金属パターンの
形成方法を提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned problems in the prior art and to improve the cross-sectional shape of a resist pattern in a method of forming a thin film metal pattern on a semiconductor substrate by a lift-off method. A method of forming a heat-resistant resist pattern that is processed into an overhang stencil shape, and a thin-film metal is formed by using the above heat-resistant resist pattern as a mask. It is an object of the present invention to provide a method for forming a thin film metal pattern that can obtain a good thin film metal pattern that does not occur.

【0004】[0004]

【課題を解決するための手段】上記本発明の目的を達成
するために、半導体基板上にリフトオフ法によって薄膜
金属パターンを形成する方法において、薄膜金属を蒸着
した熱の影響によってレジストパターンの形状が変化し
ないように、遠紫外線をレジストパターン表面に全面照
射することにより、レジストパターンに耐熱性を付与す
る工程を加えるものである。このようにレジストパター
ンに耐熱性を与えることにより、これをマスクとして薄
膜金属を蒸着しても、蒸着時における熱によってレジス
トパターンが変形することがないので、リフトオフ法に
よりレジストパターンを除去してもバリ等の生成がな
く、極めて良好な薄膜金属パターンが得られる。本発明
の具体的構成は、半導体基板上に所定のレジストを形成
した後、所望のパターン露光と有機溶媒処理を行って上
記レジストの表層部に難溶可性層を形成する工程と、レ
ジストパターンの断面形状を、レジスト表層部の開口部
よりも基板面の開口部を広くしたステンシル形状に現像
する工程と、上記ステンシル形状のレジストパターンに
遠紫外線を照射して耐熱性を付与する工程を少なくとも
含むレジストパターンの形成方法である。さらに本発明
は、上記の方法によって作製したステンシル形状のレジ
ストパターンをマスクとして、Au、Pt、Ni、Zn
等の薄膜金属を蒸着した後、上記レジストパターンを除
去して半導体基板上に薄膜金属パターンを形成する工程
を少なくとも含む薄膜金属パターンの形成方法である。
In order to achieve the above object of the present invention, in a method of forming a thin film metal pattern on a semiconductor substrate by a lift-off method, the shape of the resist pattern is changed by the effect of heat of vapor deposition of the thin film metal. A step of imparting heat resistance to the resist pattern is added by irradiating the surface of the resist pattern with deep ultraviolet rays so as not to change. By imparting heat resistance to the resist pattern in this way, even if a thin film metal is vapor-deposited using this as a mask, the resist pattern will not be deformed by the heat during vapor deposition, so even if the resist pattern is removed by the lift-off method. An extremely good thin film metal pattern can be obtained without generation of burrs or the like. The specific constitution of the present invention is, after forming a predetermined resist on a semiconductor substrate, performing a desired pattern exposure and an organic solvent treatment to form a hardly soluble layer on the surface layer of the resist, and a resist pattern. At least a step of developing a cross-sectional shape into a stencil shape in which the opening of the substrate surface is wider than the opening of the resist surface layer, and a step of irradiating the stencil-shaped resist pattern with deep ultraviolet rays to provide heat resistance. It is a method of forming a resist pattern including. Furthermore, the present invention uses Au, Pt, Ni, Zn as a mask with the stencil-shaped resist pattern produced by the above method.
Is a method for forming a thin film metal pattern, which includes at least a step of depositing a thin film metal such as the above and then removing the resist pattern to form a thin film metal pattern on a semiconductor substrate.

【0005】[0005]

【作用】ステンシル形状のレジストパターンの表面層が
硬化して耐熱性を持つことになるため、薄膜金属を蒸着
したときに温度が上昇してもステンシル形状のレジスト
パターンが変形することがないので、リフトオフ法によ
りレジストパターンを除去してもバリの無い良好な薄膜
金属パターンを半導体基板上に形成することができる。
[Function] Since the surface layer of the stencil-shaped resist pattern is hardened and has heat resistance, the stencil-shaped resist pattern is not deformed even when the temperature rises when the thin film metal is vapor-deposited. Even if the resist pattern is removed by the lift-off method, a good thin film metal pattern without burrs can be formed on the semiconductor substrate.

【0006】[0006]

【実施例】以下、本発明においてパターン露光後に有機
溶媒処理を行った場合の実施例を挙げ、図面を用いてさ
らに詳細に説明する。図1は、本実施例におけるレジス
トパターンの形成方法を示す説明図である。図におい
て、半導体基板1上に、プリベーク温度70℃で、ポジ
型レジスト(例えば、シプレイ社のS1400シリー
ズ)2を形成し、縮小投影露光装置(例えば、ニコン社
のNSRシリーズ)でパターン露光、ブロムベンゼンに
よる有機溶媒処理(10分間)、現像処理(3分間)を
行った後に、波長が約200nm以下の遠紫外線6を照
射(1〜5分間)した時のレジストパターンの形状を示
すもので、良好なオーバハング3状の庇が形成されてい
る。なお、遠紫外線6を照射することによるレジストパ
ターン形状の変形はほとんど見られなかった。図2は、
薄膜金属4として1.5μmの膜厚の金(Au)膜を蒸
着したときのレジストパターンの形状を示す。従来のよ
うに、薄膜金属の蒸着によってレジストパターンが変形
する現象は見られず、リフトオフ処理を行っても、バリ
5のない極めて良好な形状の薄膜金属4が半導体基板1
上に形成することができた。
EXAMPLES Examples of the case where an organic solvent treatment is carried out after pattern exposure in the present invention will be described below in more detail with reference to the drawings. FIG. 1 is an explanatory diagram showing a method for forming a resist pattern in this embodiment. In the figure, a positive resist (for example, S1400 series manufactured by Shipley) 2 is formed on a semiconductor substrate 1 at a pre-baking temperature of 70 ° C., and pattern exposure is performed by using a reduction projection exposure apparatus (for example, NSR series manufactured by Nikon), and a bromine exposure It shows the shape of the resist pattern when irradiated with deep ultraviolet rays 6 having a wavelength of about 200 nm or less (1 to 5 minutes) after organic solvent treatment with benzene (10 minutes) and development treatment (3 minutes). Good overhangs 3 eaves are formed. It should be noted that almost no deformation of the resist pattern shape due to irradiation with the deep ultraviolet rays 6 was observed. Figure 2
The shape of the resist pattern when a gold (Au) film having a film thickness of 1.5 μm is deposited as the thin film metal 4 is shown. There is no phenomenon that the resist pattern is deformed by vapor deposition of a thin film metal as in the prior art, and even if the lift-off process is performed, the thin film metal 4 having an extremely good shape without the burr 5 is obtained as the semiconductor substrate 1.
Could be formed on.

【0007】[0007]

【発明の効果】以上、詳細に説明したように、本発明の
レジストパターンおよび薄膜金属パターンの形成方法に
よれば、レジスト表層部にブロムベンゼン等の有機溶媒
の難溶可性層を形成することにより、良好なステンシル
形状のレジストパターンを得た後に、遠紫外線を照射す
ることによりレジストパターンの耐熱性の向上をはかる
ことができ、薄膜金属の蒸着による温度上昇があっても
ステンシル形状のレジストパターンの変形が生じないの
で、バリの無い良好な薄膜金属パターンを得ることがで
きる。
As described above in detail, according to the method for forming a resist pattern and a thin film metal pattern of the present invention, a hardly soluble layer of an organic solvent such as brombenzene is formed on the surface layer of the resist. With this, after obtaining a good stencil-shaped resist pattern, it is possible to improve the heat resistance of the resist pattern by irradiating deep ultraviolet rays, and even if the temperature rises due to the deposition of thin-film metal, the stencil-shaped resist pattern Since no deformation occurs, it is possible to obtain a good thin film metal pattern without burrs.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の実施例で例示したステンシル形状のレ
ジストパターンの形成方法を示す説明図。
FIG. 1 is an explanatory diagram showing a method of forming a stencil-shaped resist pattern exemplified in an embodiment of the present invention.

【図2】本発明の実施例で例示したステンシル形状のレ
ジストパターンをマスクとして薄膜金属パターンの形成
方法を示す説明図。
FIG. 2 is an explanatory view showing a method for forming a thin film metal pattern using the stencil-shaped resist pattern exemplified in the embodiment of the present invention as a mask.

【図3】従来のステンシル形状のレジストパターンを示
す模式図。
FIG. 3 is a schematic diagram showing a conventional stencil-shaped resist pattern.

【図4】従来のステンシル形状のレジストパターンをマ
スクとして薄膜金属パターンを形成した場合のレジスト
パターンの変形を示す模式図。
FIG. 4 is a schematic view showing the deformation of a resist pattern when a thin film metal pattern is formed using a conventional stencil-shaped resist pattern as a mask.

【符号の説明】[Explanation of symbols]

1半導体基板 2レジスト 3オーバハング 4薄膜金属 5バリ 6遠紫外線 1 Semiconductor Substrate 2 Resist 3 Overhang 4 Thin Film Metal 5 Burr 6 Far UV

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 FI 技術表示箇所 H01L 21/027 21/3065 ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 6 Identification code Office reference number FI technical display location H01L 21/027 21/3065

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】半導体基板上にレジストを形成した後、所
望のパターン露光と有機溶媒処理を行って上記レジスト
の表層部に難溶可性層を形成する工程と、レジストパタ
ーンの断面形状を、レジスト表層部の開口部よりも基板
面の開口部を広くしたステンシル形状のレジストパター
ンに現像する工程と、上記ステンシル形状のレジストパ
ターンに遠紫外線を照射して耐熱性を付与する工程を含
むことを特徴とするレジストパターンの形成方法。
1. A step of forming a hardly soluble layer on the surface layer of the resist by performing desired pattern exposure and organic solvent treatment after forming a resist on a semiconductor substrate, and a cross-sectional shape of the resist pattern, A step of developing into a stencil-shaped resist pattern in which the opening of the substrate surface is wider than the opening of the resist surface layer, and a step of irradiating the stencil-shaped resist pattern with deep ultraviolet rays to impart heat resistance, A method for forming a characteristic resist pattern.
【請求項2】請求項1記載の方法によって作製したステ
ンシル形状のレジストパターンをマスクとして、薄膜金
属を蒸着した後、上記レジストパターンを除去して半導
体基板上に薄膜金属パターンを形成する工程を含むこと
を特徴とする薄膜金属パターンの形成方法。
2. A step of depositing a thin film metal using the stencil-shaped resist pattern produced by the method according to claim 1 as a mask, and then removing the resist pattern to form a thin film metal pattern on a semiconductor substrate. A method of forming a thin film metal pattern, comprising:
JP5314696A 1993-12-15 1993-12-15 Formation of resist pattern and thin-film metallic pattern Pending JPH07168368A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5314696A JPH07168368A (en) 1993-12-15 1993-12-15 Formation of resist pattern and thin-film metallic pattern

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5314696A JPH07168368A (en) 1993-12-15 1993-12-15 Formation of resist pattern and thin-film metallic pattern

Publications (1)

Publication Number Publication Date
JPH07168368A true JPH07168368A (en) 1995-07-04

Family

ID=18056455

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5314696A Pending JPH07168368A (en) 1993-12-15 1993-12-15 Formation of resist pattern and thin-film metallic pattern

Country Status (1)

Country Link
JP (1) JPH07168368A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0939436A2 (en) * 1998-02-27 1999-09-01 Lucent Technologies Inc. Manufacture of flip-chip devices
WO2008016061A1 (en) 2006-08-02 2008-02-07 Asahi Glass Co., Ltd. Electronic circuit device and method for fabricating the same
US7790358B2 (en) 2003-11-11 2010-09-07 Asahi Glass Company, Limited Pattern formation method, electronic circuit manufactured by the same, and electronic device using the same
JP2011040656A (en) * 2009-08-17 2011-02-24 Nippon Telegr & Teleph Corp <Ntt> Method of forming microstructure

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0939436A2 (en) * 1998-02-27 1999-09-01 Lucent Technologies Inc. Manufacture of flip-chip devices
EP0939436A3 (en) * 1998-02-27 2000-11-02 Lucent Technologies Inc. Manufacture of flip-chip devices
KR100682284B1 (en) * 1998-02-27 2007-02-15 루센트 테크놀러지스 인크 Manufacture of flip-chip devices
US7790358B2 (en) 2003-11-11 2010-09-07 Asahi Glass Company, Limited Pattern formation method, electronic circuit manufactured by the same, and electronic device using the same
WO2008016061A1 (en) 2006-08-02 2008-02-07 Asahi Glass Co., Ltd. Electronic circuit device and method for fabricating the same
US8418359B2 (en) 2006-08-02 2013-04-16 Asahi Glass Company, Limited Method for manufacturing circuit pattern-provided substrate
JP2011040656A (en) * 2009-08-17 2011-02-24 Nippon Telegr & Teleph Corp <Ntt> Method of forming microstructure

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