JPH07161932A - Semiconductor device - Google Patents

Abstract

PURPOSE:To form a capacitor of a large capacitance value by embedding a plurality of first conductors in holes or grooves formed by etching opposite parts each other, directly under each one, and by providing a plurality of second conductors connected to the first conductors. CONSTITUTION:A first aluminum wiring layer 23 is formed on a polysilicon layer 21 with an insulation film 22 between, and a second aluminum wiring layer 25 is formed on the first wiring layer 23 with an insulation film 24 between. Etching holes 26, 27 are formed directly under the first aluminum wiring layer 23 of the insulation films 22, 24, and conductors 28, 29 are embedded in the inside. The conductor 28 connects the polysilicon layer 21 and the first aluminum wiring layer 23, and the conductor 29 connects the first aluminum wiring layer 23 and the second aluminum wiring layer 25. Thereby, a high- precision capacitor of large capacitance can be formed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device equipped with a capacitor.

[0002]

2. Description of the Related Art Conventionally, when a capacitor is mounted in a semiconductor device, two or more conductors (polysilicon layer) such as a polysilicon layer and a first aluminum wiring layer and a first aluminum wiring layer and a second aluminum wiring layer are used. including)
Were formed so as to face each other vertically.

However, as semiconductor devices have become more highly integrated in recent years, wiring designs have become finer, and the ratio of the height of wiring to the width of wiring tends to increase. Becomes more intense, and many steps (CVD, etching, etc.) are required to flatten the surface, which makes it difficult to control the thickness of the interlayer insulating film and tends to increase variations in the thickness. For this reason, there has been a problem that the capacitance is too large in a conventional capacitor formed by vertically opposing two or more conductors.

[0004]

From this, it is considered to use a conductor, which is less influenced by the thickness of the interlayer insulating film and horizontally opposed to the same layer, as a capacitor,
It has been proposed to increase the capacitance value per unit area by wiring a conductor in the same layer in a comb-like shape (see Japanese Patent Laid-Open No. 61-263251).

However, when the conductors formed in the same layer are used as a capacitor, there is a problem that the capacitance value per unit area is inevitably reduced as compared with a capacitor in which conductors of two or more layers are vertically opposed. It has also been proposed to form a capacitor having a large capacitance by combining both conductors that are horizontally opposed in the same layer and conductors that are vertically opposed to each other in two or more layers (Japanese Patent Laid-Open No. 4-268756). As described above, there is a problem that variations in the thickness of the interlayer insulating film are exerted on the portions vertically opposed to each other with the interlayer insulating film sandwiched therebetween, resulting in large variations in capacitance.

Further, in this case, if the layout rules of the upper and lower wirings (spaces between conductors in this case) are different, in order to stack the conductors on the upper and lower sides, it is necessary to perform wiring in a layer having the largest wiring space. However, there is also a problem that a capacitor having a low capacitance between conductors in the same layer is obtained. A method is also known in which two layers of polysilicon layers are formed vertically by a special process to obtain a high-precision and large-capacity capacitor, but this goes against the requirement of flattening and increases the manufacturing cost. There is a problem of connection.

In view of the above circumstances, the present invention is highly accurate and
An object of the present invention is to provide a semiconductor device in which a capacitor having a larger capacitance value is formed as compared with a conventional capacitor using a conductor wired in the same layer.

[0008]

According to a first semiconductor device of the present invention that achieves the above object, a plurality of first conductors formed in the same layer and extending to face each other, and a first conductor, respectively. And a capacitor having a first conductor and a plurality of second conductors continuous with each other, which are buried in holes or grooves whose opposite portions are directly etched. .

A second semiconductor device of the present invention which achieves the above object, comprises a plurality of first conductors formed in a first layer and extending to face each other, and the first layer. A plurality of second conductors extending in opposition to each other, which are formed in a second layer sandwiching an insulating film formed on the first layer therebetween, and immediately below each of the second conductors, and A plurality of third conductors, which are connected to both the first conductor and the second conductor, are embedded in holes or grooves formed by etching the portions of the first conductors that are directly above and facing each other. A capacitor having a conductor is provided.

Further, the third semiconductor device of the present invention is provided with a capacitor having a plurality of conductors formed in the same layer and extending in opposition to each other while repeatedly changing their widths into a fitting shape. It is characterized by. Further, a fourth semiconductor device of the present invention is provided between a plurality of first conductors formed in the first layer and facing each other and extending in a predetermined first direction, and the first layer. Second sandwiching the insulating film
A second predetermined layer formed on the layer
And a capacitor having a plurality of second conductors extending in the direction.

[0011]

Since the first semiconductor device of the present invention has a shape in which portions facing each other immediately below the first conductors wired in the same layer are etched and filled with the conductors. Capacitors are formed so that the portions buried in the etching holes are opposed to each other in the horizontal direction, so that the capacitance value can be increased while suppressing the variation in the capacitance value of the wiring in the same layer.

The second semiconductor device of the present invention is
Since the upper and lower wirings are connected by the conductor filled in the etching hole, the influence of the thickness of the interlayer insulating film does not appear, and the capacitor between the conductors in each of the plurality of layers,
Capacitors between the conductors filled in the etching holes are added, so that the capacitance value can be increased while suppressing the variation in the capacitance value as in the case of the first semiconductor device.

Further, according to the third semiconductor device of the present invention, since the plurality of conductors formed in the same layer extend in opposition to each other while repeatedly changing their widths into a fitting shape, the same wiring layer is formed. The variation of the capacitance value is suppressed from the point of being the internal capacitor, and the capacitance value is improved at the point that the opposing length is increased. Further, by combining this third semiconductor device with the first or second semiconductor device described above, it is possible to form a capacitor having a larger capacitance value while suppressing variations.

Further, the above-mentioned fourth semiconductor device of the present invention is
Since the layers are wired so that they extend in different directions, the areas of the conductors that vertically oppose each other with the interlayer insulating film sandwiched between them are suppressed, and the effect of the interlayer insulating film is suppressed. Since the capacitor is formed in the capacitor, the capacitance value per unit area is improved.

[0015]

EXAMPLES Examples of the present invention will be described below. FIG. 1 is a vertical cross-sectional view of a portion of a semiconductor device according to a first embodiment of the present invention, in which a capacitor is formed, in a direction crossing a conductor wiring. Immediately below the plurality of conductors 12 wired in the same layer on the insulating film 11, holes 14 that are etched and backfilled with the conductors 13 are provided. In the capacitance C ₁ between the bodies 12, the hole 14
The capacitance C ₂ between the conductors 13 inside is added to form a highly accurate and high capacitance capacitor.

FIG. 2 is a vertical cross-sectional view of a portion of a semiconductor device according to a second embodiment of the present invention, in which a capacitor is formed, in a direction crossing conductor wiring. A first aluminum wiring layer 23 is formed on the polysilicon layer 21 with an insulating film 22 sandwiched therebetween, and a second aluminum wiring layer 25 is formed on the first aluminum wiring layer 23 with an insulating film 24 sandwiched therebetween. Has been done. Etching holes 26 and 27 are formed in the insulating films 22 and 24 immediately below the first aluminum wiring layer 25 and the second aluminum wiring layer 25, respectively, and conductors ( Aluminum aluminum) 28 and 29 are embedded. The conductor 28 connects the polysilicon layer 21 and the first aluminum wiring layer 23, and the conductor 29 connects the first aluminum wiring layer 23 and the second aluminum wiring layer 25.

With such wiring, the polysilicon layer 2
1, the capacitances between the first aluminum wiring layers 23 and the second aluminum wiring layers 25 are added, and the capacitances between the conductors 28 inside the etching holes 26 and the conductors 29 inside the etching holes 27 are added. Is
It is a capacitor with a large capacitance value. Further, in the case of such a structure, the capacitance between the conductors in the same layer is basically dominant, and the depths a and b of the etching holes 26 and 27 are easily controlled, so that the capacitance is controlled. Easy,
A capacitor having a highly accurate capacitance is formed.

FIG. 3 is a plan view of the second aluminum wiring layer in the portion where the capacitor of the semiconductor device of the second embodiment of the present invention shown in FIG. 2 is formed. When a contact hole is used as an etching hole in the above-described first embodiment (FIG. 1) and second embodiment (FIG. 2) and the contact hole is only allowed to have a square shape, the second embodiment is shown in FIG. As described above, the contact holes 26 connecting the polysilicon layer and the first aluminum wiring layer 23 to each other, the first aluminum wiring layer 23 and the second aluminum wiring layer 2 are connected to each other.
The contact holes 27 connecting 5 and 5 are formed at positions facing each other. As a result, as described above,
Each conductor 28, 2 inside each contact hole 26, 27
Capacity between 9 is added.

FIG. 4 is a plan view of a portion where a capacitor is formed in the semiconductor device of the third embodiment of the present invention. Here, the conductor 31, which is wired in the first aluminum wiring layer,
32 extend to the left and right in the drawing so as to face each other, and the width thereof is repeatedly changed to a shape in which they are fitted to each other. When using a polysilicon layer with high resistance for a capacitor,
It is necessary to establish electrical continuity between the conductors 31 and 32 wired in the first aluminum wiring layer sandwiching the insulating film on the polysilicon layer and the polysilicon layer through the contact holes 33 and 34. By forming the conductors 31 and 32 of the first aluminum wiring layer at this time as shown in the drawing, the facing area between the conductors 31 and 32 is increased,
The capacitance of the capacitor increases accordingly.

FIG. 5 shows the conductors 41 and 42 of the first aluminum wiring layer and the conductors 51 and 52 of the second aluminum wiring layer in the portion where the capacitor of the semiconductor device of the fourth embodiment of the present invention is formed. It is the figure shown. A capacitor is formed between the conductors 41, 42 in the first aluminum wiring layer, and a conductor 51, 42 in the second aluminum wiring layer is formed.
Capacitors are formed between the two 52, and both aluminum wiring layers are formed in the respective minimum spaces, so that the capacitors have a large capacity per unit area. Although there is a capacitance between the first aluminum wiring layer and the second aluminum wiring layer, the conductors 41 and 42 of the first aluminum wiring layer and the conductors 51 and 52 of the second aluminum wiring layer intersect each other. The area of the vertically overlapping portions is reduced, and accordingly, the influence of the interlayer insulating film formed between the first aluminum wiring layer and the second aluminum wiring layer is reduced accordingly. To be done.

[0021]

As described above, according to the semiconductor device of the present invention, a capacitor having a high precision and a large capacitance is basically formed by using the capacitance between conductors in the same wiring layer.

[Brief description of drawings]

FIG. 1 is a vertical cross-sectional view of a portion of a semiconductor device according to a first embodiment of the present invention, in which a capacitor is formed, in a direction crossing a wiring of a conductor.

FIG. 2 is a vertical cross-sectional view of a portion of a semiconductor device according to a second embodiment of the present invention, in which a capacitor is formed, in a direction crossing a conductor wiring.

FIG. 3 is a plan view of a second aluminum wiring layer in a portion where a capacitor of the semiconductor device of the second embodiment of the present invention shown in FIG. 2 is formed.

FIG. 4 is a plan view of a portion of a semiconductor device according to a third embodiment of the present invention in which a capacitor is formed.

FIG. 5 is a diagram showing a conductor of a first aluminum wiring layer and a conductor of a second aluminum wiring layer in a portion where a capacitor is formed in a semiconductor device of a fourth embodiment of the present invention.

[Explanation of symbols]

11,22,24 Insulating film 12,23,25,31,32,41,42,51,5
2 conductor (aluminum wiring layer) 21 conductor (polysilicon layer) 14, 26, 27, 33, 34 etching hole (contact hole)

Claims (4)

[Claims] 1. A plurality of first conductors formed in the same layer and extending to face each other, and portions directly below each of the first conductors, which face each other, are embedded in an etched hole or groove. A semiconductor device comprising a capacitor having the first conductor and a plurality of second conductors that are continuous with each other. 2. An insulating film formed on the first layer between a plurality of first conductors formed on the first layer and extending to face each other. A plurality of second conductors formed in the second layer sandwiching the two conductors and extending to face each other, and directly below each of the second conductors and directly above each of the first conductors, facing each other. A capacitor having a plurality of third conductors connected to both the first conductor and the second conductor, the capacitor being embedded in a hole or groove formed by etching. A semiconductor device characterized by: 3. A semiconductor device comprising: a capacitor having a plurality of conductors formed in the same layer, the conductors extending in a mutually fitting shape and repeatedly changing in width. 4. A second insulating film sandwiched between a plurality of first conductors formed in the first layer and facing each other and extending in a predetermined first direction, and an insulating film sandwiched between the first layer and the first layer. And a plurality of second conductors extending in a predetermined second direction intersecting the first direction, the capacitor being formed in the layer of 1.