JPH07154356A - Synchronizing data signal transmitter/receiver - Google Patents

Abstract

PURPOSE:To transmit the envelope of X.50 frame of residual bits except the leading bit out of a prescribed bit envelope to a first channel when further multiplexing and transmitting the X.50 frame composed of a bearer channel. CONSTITUTION:S bits of bearer channels #1-#4 of the X.50 frame from a low speed part 1.1 of the first channel are separated by an S bit separation part 11 and the results are stored in an S bit transmission register 12. Seven bits resulting from the S bit separation are selected by a selector 13 and at a bearer channel #5, S bits inside the register 12 are collectively selected by the selector 13. At a frame transmission part 14, a framing bit F is adde to the leading bit of each bearer channel and transmitted to a multiplexing part.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a synchronous data signal transmitter / receiver, and more particularly to an X.X. The present invention relates to a transmission / reception device for a 50-frame format synchronous data signal.

[0002]

2. Description of the Related Art CCITT-X. In FIG.
The 8-bit envelope as shown in FIG. 6 is specified, and it is also specified that a plurality of 8-bit envelopes are used to form 20 multiframes as shown in FIG. Furthermore, the respective configurations of the bearer channels # 1 to # 5 in the 20 multiframes are defined as shown in FIG.

The first bit of the 8-bit envelope shown in FIG. It is a framing bit f for 50 frames, and the eighth bit is a status bit S. Then, a total of 6 bits of the remaining 2nd to 7th bits are used as information bits.

The actual speed of information is called the user rate, and the speed after envelopment is called the bearer rate. In the multiplexing of this 8-bit envelope, it is once multiplexed to 12.8 Kbps, and further it is multiplexed to 5 (multiplicity 5) to obtain 64 Kbps.

After the multiplexing, the X. A 20 multiframe configuration at 50 is as shown in FIG. 6, and bearer channel #
1 to # 5 are interleaved and multiplexed with each other.
And this X. The bit configuration of each of bearer channels # 1 to # 5 in 20 multiframes at 50 is as shown in FIG.

Such an X. When 50 frames are set as one channel unit and further multiplexed by n channels (n is an integer of 2 or more) to form a multiplexed frame structure for n-channel transmission, a transmission / reception block structure as shown in FIG. 7 can be considered.

That is, the X. 50 frames, n low speed parts 1.1 to 1. n are generated respectively, and these are multiplexed as channels (CH) 1 to n in the multiplexing unit 1 to form a multiplex frame structure for n-channel transmission and sent to the high speed transmission line 3.

A signal having a multiplex frame structure for n-channel transmission from the high-speed transmission path is sent to the individual X. The low-speed parts 1.1 to 1. Reception processing is performed at n.

[0009]

As described above, with the configuration shown in FIG. In order to multiplex 50 frames (n channels) into a multiplex frame, the frame structure is as shown in FIG. 8, and for the frame synchronization, the first bit of channel 1 is always a framing bit for n channel transmission. F is required.

Therefore, the remaining time slot of channel 1 is 7 bits (corresponding to the transmission capacity of 48 Kbps) and 8 bits (corresponding to the transmission capacity of 64 Kbps) of X. It becomes impossible to have a 50-frame structure. As a result, the configuration shown in FIG. 7 has a drawback in that it is impossible to multiplex bearer channels and transmit a synchronous data signal.

Therefore, the present invention has been made to solve the above-mentioned drawbacks of the prior art. 48Kb sync data in 50 frame format
Another object of the present invention is to provide a synchronous data signal transmitting / receiving apparatus capable of transmitting / receiving synchronous data in a multi-frame format by making it possible to transmit even on a ps channel.

[0012]

A synchronous data signal transmitting apparatus according to the present invention comprises a plurality of predetermined bit envelopes from a low-speed stage, and an X.264 signal conforming to the CCITT-X recommendation. Fifty
Separation means for selectively separating the status bits in the envelope using a frame as input, storage means for temporarily storing the separated status bits, and a residue from which the status bits have been deleted via the separation means. The selection means for selectively deriving the bit and the status bit stored in the storage means, and the frame information for frame synchronization added to the head bits of all envelopes of the selection output of the selection means, while the X information is added. ． Transmission means for transmitting in a 50-frame structure; and means for controlling the selection means so that all of the status bits stored in the storage means are inserted into a specific envelope part of the plurality of envelopes. Is characterized by.

The synchronous data signal receiving apparatus according to the present invention comprises:
CCITT-consisting of multiple envelopes of predetermined bits
X. Fifty frames are multiplexed as n first to nth channels, and in the first channel only, frame information for frame synchronization is inserted in the first bit of each constituent envelope, and status bits are inserted in a specific envelope part. A receiving device for receiving a synchronization data signal, wherein:
Each X. Separation means for separating 50 frames, storage means for receiving and storing information of envelopes other than the specific envelope of the separated first channel, and status bit storage for receiving and storing status bits of the specific envelope Means and the contents stored in the storage means. It is characterized by including means for reproducing 50 frames.

[0014]

Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a schematic block diagram of the present invention, and the same portions as those in FIG. 7 are designated by the same reference numerals. Multiplicity 5
Low-speed unit having (bearer channels # 1 to # 5) 1.
1-1. n is the X.V. of the first to nth channels. The generation of 50 frames is similar to the example of FIG. 7, but of the five bearer channels # 1 to # 5 that are input to the low speed unit 1.1 corresponding to the first channel, for example, the bearer channel # 5. For, the 8-bit time slot (8-bit envelope) containing no information is to be input.

The X.V. signal output from the low speed section 1.1 corresponding to the first channel. For 50 frame format data,
In the transmitter 4, each of the four bearer channels # 1 to # 4 is 8
Bit information (f bits, 6 information bits and S
Only S bits of (bit) are separated and extracted and superimposed on a time slot having only 7 bits (see FIG. 3A). In addition, the bearer channels # 1 to # 4 separated and extracted
Each S bit of is inserted into the time slot of the empty bearer channel # 5 (see FIG. 3B).

Thereafter, the framing bit F for frame synchronization is inserted in the head bit of each bearer channel, and the X. Data of 50 frame format is transmitted.

For the other 2 to n channels, the low speed sections 1.2 to 1. 5 bearer channels as X.n.
It is sent to the multiplexing unit 1 as it is in the form of 50 frames. In this way, the synchronizing data signal of the n-channel multiplex frame format shown in FIG. 8 can be transmitted from the multiplexing unit 1 to the high-speed transmission line 3.

The synchronous data signal in the n-channel multiplex frame format from the high-speed transmission line 3 is transferred to the X. It is separated into each channel data of 50 frame format. 2nd to nth
Channel data directly corresponds to the low speed section 1.2-1. n bearer channels and are separated into 5 bearer channels.

The data of the first channel is input to the receiving unit 5 and subjected to the reverse processing of the transmitting unit 4, and the bearer channels # 1 to # 5 are separated.

The X. Details of the transmission unit 4 and the reception unit 5 that process the transmission / reception signal of 50 frames will be described with reference to FIG.

As for the first channel, as described above,
X. 7 bit. Since it is necessary to transmit 50 frames, information excluding S bits is used in the four time slots of bearer channels # 1 to # 4, and S bits of bearer channels # 1 to # 4 are used in the time slot of bearer channel # 5. X., respectively. Generate 50 frame format.

Therefore, in the transmission unit 4, an S-bit separation unit 11 for selectively extracting and separating all S bits of the bearer channels # 1 to # 4, and temporarily storing the separated S bits. The S-bit transmission register 12, the selector 13 for selectively deriving the output of the S-bit separation unit 11 and the output of the S-bit transmission register 12, and the selector output as an n-channel multiplex frame format for phrasing. A frame transmission unit 14 for adding and transmitting an F bit;
Timing generation unit 15 for controlling these units 11 to 14
And are provided.

The 8-bit envelope signal from the low-speed section 1.1 is sent to the selector 13 by the S-bit separating section 11 with a total of 7 bits including f bits and information bits. Also, the separated S bits are sent to the S bit transmission register 12,
S bits for several frames are temporarily stored.

The selector 13 selectively derives either the 7-bit signal from the S-bit separation unit 11 or the 7-bit signal from the S-bit transmission register according to the timing from the timing generation unit 15 and outputs the frame. Transmitter 1
It sends to 4.

The frame transmitter 14 adds the 7-bit signal from the selector 13 after the framing bit F for n-channel multiplex transmission, and outputs it as an 8-bit signal to the multiplexer 1.

The configuration of bearer channels # 1 to # 4 in 20 multiframes in this n-channel multiplex transmission multiplex frame is as shown in FIG.
The configuration of 5 is as shown in FIG.

In the timing generator 15, 64 Kbps
3 and a clock signal corresponding to 0.4 Kbps (corresponding to the frame rate of the frame format for n-channel multiplex transmission) from each of the bearer channels shown in FIGS. 3 (A) and 3 (B). F bit, f at bit position
Various timing signals are generated so that bits, information bits and S bits are inserted respectively.

Since the signal of the first channel separated by the separation unit 2 includes F bits for n-channel multiplex transmission, in the reception unit 5, first, the F bit deletion unit 16 sets the 8 bits. The leading F bit is deleted. Then, the remaining 7-bit signal is sent to the reception memory 17 and the S-bit reception register 18, respectively.

The receiving memory 17 temporarily writes and stores the 7-bit signal from the F-bit deleting section 16. Further, the S-bit reception register 18 receives and temporarily stores only a frame in which only S bits are inserted. The S-bit adding unit 19 reproduces the 8-bit envelope signal from the read output of the receiving memory 17 and the output of the S-bit receiving register 18, and sends it to the low speed unit 1.1.

At this time, bearer channel # 5 contains no information and is an empty time slot. This is because the bearer channel # 5 is intensively used for transmission of S bits of the other bearer channels # 1 to # 4. Although the bearer channel # 5 is used for S-bit transmission of the first channel, other bearer channels # 1
~ # 4 may be used.

The timing generator 20 is 64 Kbp.
The operation timing of each unit 16 to 19 is generated from a clock corresponding to s and a clock corresponding to 0.4 Kbps.

[0033]

As described above, according to the present invention, the X.X. Fifty frames, X. By intensively transmitting S bits in 50 frames using a specific bearer channel, it is possible to transmit even by using a bearer channel even a channel in which only 7 bits can be used.

In this case, the X. Since 50 frames can be used as they are and there is no need to use a dedicated frame, the system cost can be reduced.

[Brief description of drawings]

FIG. 1 is a block diagram showing an outline of the present invention.

FIG. 2 is a block diagram of an embodiment of the present invention.

FIG. 3A is a diagram showing a configuration of bearer channels # 1 to # 4 in 20 multiframes in a multiplex frame for n-channel multiplex transmission according to an embodiment of the present invention, and FIG. 3B is the same bearer channel # 5. It is a figure which shows the structure of.

[FIG. 4] X. of the CCITT-X series recommendation. It is a figure which shows the 8-bit envelope based on 50.

FIG. 5: X. It is a figure which shows the structure of each bearer channel # 1- # 5 in 20 multi-frames of 50 frames.

FIG. FIG. 5 is a diagram showing a 20-multiframe configuration in 50.

FIG. 7: X. It is a system block diagram for demonstrating the case where n-channel multiplex transmission of 50 frames is carried out.

FIG. 8 is a diagram showing a frame structure for n-channel multiplex transmission.

[Explanation of symbols]

 1. Multiplexing section 1.1 to 1. n Low-speed section 2 Separation section 3 High-speed transmission line 4 Transmission section 5 Reception section 11 S-bit separation section 12 S-bit transmission register 13 Selector 14 Frame transmission section 15, 20 Timing generation section 16 F-bit deletion section 17 Reception memory 18 S-bit reception Register 19 S bit addition section

Claims (3)

[Claims] 1. An X.V. format consisting of a plurality of predetermined bit envelopes from a low speed stage and compliant with CCITT-X recommendation. With 50 frames as input, separation means for selectively separating the status bits in the envelope, storage means for temporarily storing the separated status bits, and the status bits deleted via the separation means. Selecting means for selectively deriving the residual bit and the status bit stored in the storing means; and adding frame information for frame synchronization to each head bit of all envelopes of the selected output of the selecting means. X. Transmission means for transmitting in a 50-frame structure; and means for controlling the selection means so that all of the status bits stored in the storage means are inserted into a specific envelope part of the plurality of envelopes. A synchronous data signal transmitting device characterized by: 2. The low-speed stage is provided for n channels, and the synchronous data signal transmitting apparatus is provided with an X.X signal from the low-speed stage of the first channel. 50 frames as an input, and each X.X. from the low speed stage of the second to nth channels. 50 frames and X.50 from the synchronous data signal transmitter. The transmitting apparatus according to claim 1, further comprising a multiplexing unit that multiplexes 50 frames. 3. An X.264 format that complies with the CCITT-X recommendation and consists of a plurality of envelopes of predetermined bits. 50 frames n
Each of the first to nth channels is multiplexed, and only in the first channel is a multiplexed synchronization data signal in which frame information for frame synchronization is inserted in the first bit of each constituent envelope and status bits are inserted in a specific envelope part. A receiving device for receiving the X.X. of each of the first to nth channels based on the frame synchronization information. Separation means for separating 50 frames, storage means for receiving and storing information of envelopes other than the specific envelope of the separated first channel, and status bit storage for receiving and storing status bits of the specific envelope Means and the contents stored in the storage means. A synchronizing data signal receiving apparatus comprising means for reproducing 50 frames.