JPH07153936A - Semiconductor device - Google Patents

Abstract

PURPOSE:To obtain charges corresponding to signal charges in a charge supplied region by supplying the charge supplied region with charges from a charge supply section through a charge transfer region modulated by the signal charges. CONSTITUTION:The potential of a Pch on the rear side stores holes generated by photoelectric conversion in a photo-detector section 2 in the hole storage region 2P of a photo-detector 2a. Electrons generated by photoelectric conversion are discharged in the photo-detector section 2 of an Nch on the surface side, and the potential of the electron transfer region 2N of the photo-detector 2a is deepened in response to the quantity of holes stored in the hole storage region 2P. The potential of the electron storage region 3N of a register 3 for transferring electrons and an electron supply source 1N is shallowed. Electrons in the electron supply source 1N flow into the electron storage region 3N by quantity corresponding to the quantity of holes through the electron transfer region 2N, and stored in the electron storage region 3N. The quantity of electrons stored in the electron storage region 3N at that time corresponds to the quantity of holes acquired by photoelectric conversion in the photo-detector 2a, and can be used as signal charges.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device suitable for use in, for example, a solid-state image pickup device.

[0002]

2. Description of the Related Art Generally, in a solid-state image pickup device, a signal charge transfer method is used for reading signal charges from a light receiving part to a transfer part by supplying a high voltage to the transfer part. It was

In view of the above point, the present invention proposes a novel semiconductor device capable of reading signal charges.

[0004]

As shown in FIGS. 1 and 2, for example, the semiconductor device of the present invention includes a charge supply section 1N for supplying charges and a charge supply section 1N for supplying charges via a charge transfer region 2N. And a signal charge storage region 2P that stores a signal charge having a polarity opposite to that of the charge and that modulates the potential of the charge transfer region 2N according to the amount of the signal charge. The amount of charges corresponding to the signal charges accumulated in the signal charge accumulating region 2P is supplied from the charge supplying unit 1N to the charge receiving region 3N.

Further, in the semiconductor device of the present invention, as shown in FIG. 1 and FIG. 2, for example, the charge supply section 1N has a charge supply source 1 capable of assuming at least two states of a first potential and a second potential. Is.

The semiconductor device of the present invention is shown in FIG.
As shown in FIG. 13, in the above-described semiconductor device, the charge supply portion is provided between the charge supply source 1P to which a predetermined potential is applied and the charge supply source 1P and the charge transfer region 3N _1. It has a charge pumping unit 4N ₂ for pumping a predetermined amount of charge from the supply source 1P, and a potential barrier 4N ₁ provided between the charge pumping unit 4N _{2 and} the charge supply source 1P.

Further, the semiconductor device of the present invention is, for example, as shown in FIGS. 1 and 2, in the above-mentioned semiconductor device, the first charge transfer for transferring the charges supplied to the charge receiving region 3N in the first direction. The charge-supplied region 3N has an element and is commonly used as the unit bit of the first charge transfer element.

The semiconductor device of the present invention is shown in FIGS.
As shown in FIG. 3, in the above-described semiconductor device, the charges of the opposite polarity accumulated in the signal charge accumulating region 4P ₂ provided in parallel with the first charge transfer element are opposite to the first direction or the direction opposite to the first direction. A second charge transfer device for transferring in the direction,
The signal charge storage region 4P ₂ is shared with the unit bit of the second charge transfer element.

The semiconductor device of the present invention is, for example, as shown in FIGS. 1 and 2, in the above-described semiconductor device, a plurality of bits of the first charge transfer element are respectively provided with a signal charge storage region 2P, a charge transfer region 2N and a charge supply region. The unit 1N is provided.

As shown in FIG. 1, for example, the semiconductor device of the present invention is provided with a plurality of light receiving portions 2 in the above semiconductor device, and the signal charge storage portion 2P stores the charges generated by photoelectric conversion in the light receiving portion 2. It was done like this.

[0011]

According to the present invention, the electric charge from the electric charge supplying portion is supplied to the electric charge supplied area via the electric charge transfer area modulated by the signal electric charge. You can get a charge.

Further, according to the present invention, electrons and holes corresponding to signal charges can be simultaneously transferred.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the semiconductor device of the present invention will be described below with reference to the drawings. FIG. 1 is a part of a line sensor according to this example, and FIG. 1 shows an example of a carrier inflow system,
In FIG. 1, reference numeral 1 denotes an electron supply source provided so as to be continuous in one direction (horizontal direction in the drawing) on an N-type silicon substrate 5, and a hole accumulating portion 2 is provided along the electron supply source 1.
a and the pixel separation section 6 are sequentially and repeatedly arranged to form the light receiving element section 2, and the hole accumulating section 2a is formed along the light receiving element section 2 on the side opposite to the electron supply source 1 side of the light receiving element section 2. A register 3 for repeated electron transfer of the transfer section 3b connected to the continuous electron storage section 3a and the pixel separation section 6 is formed.

FIG. 2 is a sectional view taken along the line AA of FIG.
Referring to FIG. 2, the electron supply source 1 has an N ⁺ region 1N formed on an N type silicon substrate 5, and an electrode 1M made of a polycrystalline silicon layer, aluminum or the like is provided on the upper surface of the N ⁺ region 1N, and the electrode 1M is connected to a terminal. 1G is derived.

The light receiving element 2a, which is the hole storage portion of the light receiving element portion 2, forms a hole storage region 2P of a P type silicon layer on the N type silicon substrate 5 and also forms a hole storage region of the P type silicon layer. forming an electron transfer area 2N by N-type silicon layer of ^- N on 2P. This electron transfer area 2
Aluminum on the insulating film such as SiO ₂ layer 2S,
A metal electrode 2M such as a polycrystalline silicon layer is formed, and the electrode 2M, the insulating film 2S, and the electron transfer region 2 of the N-type silicon layer are formed.
The hole accumulating region 2P of the N, P type silicon layer constitutes the light receiving element 2a of MOS structure. 2G is a gate terminal derived from the electrode 2M.

The potential in the depth direction of the light receiving element 2a is minimum in the N-type silicon layer (Nch) of the electron transfer region 2N as shown by the curve in FIG. 11, and the hole accumulation region 2P.
11 is the maximum in the P-type silicon layer (Pch) of FIG.
As is clearer, electrons can be stored and transferred by the front Nch, and holes can be stored and transferred by the rear Pch.

Further, the electron storage portion 3a of the electron transfer register 3 forms a P-type region 3P of a P-type silicon layer formed adjacent to the hole storage region 2P on the N-type silicon substrate 5, and the P-type region 3P is formed. An electron storage region 3N, which is a region to be supplied with electrons by an N-type silicon layer, is formed on the mold region 3P.

A metal electrode 3M such as aluminum or a polycrystalline silicon layer is formed on the electron storage region 3N of the N-type silicon layer via an insulating film, for example, a SiO ₂ layer 3S.
M, the insulating film 3S, the electron storage region 3N of the N-type silicon layer,
The P-type region 3P constitutes an electron storage unit 3a having a MOS structure. 3G is a gate terminal derived from the electrode 3M.

The potential of the electron storage portion 3a in the depth direction is as shown by the curve in FIG. 11, and is minimum in the N-type silicon layer of the electron storage region 3N and maximum in the P-type region 3P. As is clearer, electrons can be stored and transferred by the front Nch, and holes can be stored and transferred by the rear Pch.

The operation of the line sensor shown in FIGS. 1 and 2 will be described below. Due to the configuration not shown in the line sensor shown in FIGS. 1 and 2, electrons generated by photoelectric conversion are unnecessary in the light receiving element section 2. Therefore, the holes are always discharged, and all the holes are discharged after the electrons are detected from the holes in the light receiving element 2a.

In this example, the register 3 for electronic transfer is used.
During the transfer operation, the light receiving element section 2 continues to accumulate holes generated by photoelectric conversion in the hole accumulation region 2P. The potential relationship in the sectional view taken along the line AA during the transfer operation of the electronic transfer register 3 is as shown in, for example, FIG.
3B has a potential as shown in FIG. 3B, and holes generated by photoelectric conversion in the light receiving element portion 2 are stored in the hole storage region 2P of the light receiving element 2a.

At this time, in the Nch light-receiving element portion 2 on the front side, electrons generated by photoelectric conversion are discharged, and the potential of the electron transfer area 2N of the light-receiving element 2a at this time is as shown in FIG. 3A. The depth increases from the broken line to the solid line in accordance with the amount of holes accumulated in.

When the transfer period ends and the detection generation period starts, the potential relationship of the sectional view along the line AA is as shown in FIG. 4, and the potential of the front Nch is as shown in FIG. 4A. , Electronic transfer register 3
The electron storage region 3N and the electron supply source 1N become shallow in potential, and the electrons of the electron supply source 1N flow into the electron storage region 3N through the electron transfer region 2N in an amount corresponding to the number of holes, and Transfer register 3
The data is stored in this electron storage region 3N which constitutes the unit bit of. At this time, the amount of electrons accumulated and maintained in the electron accumulation region 3N corresponds to the amount of holes obtained by photoelectric conversion in the light receiving element 2a and becomes a signal charge.

As shown in FIG. 4B, the potential relationship of the Pch on the back side is the P-type region 3 of the register 3 for electron transfer.
P becomes shallower from the broken line to the solid line by an amount corresponding to the amount of electrons stored in the electron storage region 3N of the front Nch. The holes in the hole accumulation region 2P of the light receiving element 2a are accumulated and maintained during this detection generation period, and then all the holes are discharged. A line signal can be obtained by transferring the electrons accumulated in the electron accumulation region 3N by the electron transfer register 3.

According to this embodiment, the electrons from the electron supply source 1N are supplied to the electron storage region 3N through the electron transfer region 2N whose potential is modulated by the holes generated by photoelectric conversion in the light receiving element 2a. Therefore, electrons corresponding to holes (signal charges) generated by photoelectric conversion in the light receiving element 2a can be obtained in the electron storage region 3N.
In this case, it is possible to obtain electrons in the electron storage region 3N at a relatively low voltage.

Further, in this case, the amount of electrons to be accumulated can be changed depending on the size of the electron accumulation region 3N, and amplification transfer can be performed.

Next, an example of the carrier discharge system of the line sensor according to this embodiment will be described with reference to FIGS. In this example, the light receiving element section 2 in which the pixel separating section 6 and the hole accumulating section 2a are sequentially and repeatedly arranged in one direction (horizontal direction in FIG. 5) is formed on the N-type silicon substrate 5.

Along the light receiving element section 2, the pixel separating section 6
A register 3 for repeated electron transfer of the continuous transfer section 3b and the continuous electron storage section 3a to the hole storage section 2a is formed. In this case, at the beginning in this example (the right end in FIG. 5)
The electron supply source 1 is formed in succession to the pixel separation unit 6 and the electrons from the electron supply source 1 are supplied to the transfer unit 3b at the beginning (right end in FIG. 5) of the register 3.

The electron supply source 1 is, for example, one in which an N ⁺ region is formed on an N type silicon substrate 5 as shown in FIG. 2 and a metal electrode such as aluminum or a polycrystalline silicon layer is provided on the upper surface thereof.

FIG. 6 is a sectional view taken along the line AA of FIG.
Referring to FIG. 6, the light receiving element 2 of the light receiving element section 2 will be described.
The light receiving element 2a, which is the hole accumulating portion of a, forms the hole accumulating region 2P of the P-type silicon layer on the N-type silicon substrate 5, and N ⁻ of N ⁻ is formed on the hole accumulating region 2P of the P-type silicon layer. An electron transfer region 2N is formed by the silicon layer. An insulating film such as SiO ₂ is formed on the electron transfer region 2N.
A metal electrode 2M such as aluminum or a polycrystalline silicon layer is formed through the layer 2S, and the electrode 2M, the insulating film 2S, the hole accumulation region 2N of the N-type silicon layer, and the hole accumulation region 2P of the P-type silicon layer are formed. A light-receiving element 2a having a MOS structure is constituted by.
2G is a gate terminal derived from the electrode 2M.

The potential in the depth direction of the light receiving element 2a is as shown by the curve in FIG.
Type silicon layer (Nch), which is the minimum, and the hole accumulation region 2
This is the maximum in the P type silicon layer (Pch) of P.
As is clear from No. 1, electrons can be stored and transferred in the front Nch, and holes can be stored and transferred in the back Pch.

The electron storage portion 3a of the register 3 for electron transfer is an N-type silicon layer formed on the N-type silicon substrate 5 by a P-type silicon layer formed adjacent to the hole storage area 2P. To form an electron storage region 3N which is an electron supply region.

A metal electrode 3M such as aluminum or a polycrystalline silicon layer is formed on the electron storage region 3N of the N-type silicon layer via an insulating film, for example, the SiO ₂ layer 3S.
M, the insulating film 3S, the electron storage region 3N of the N-type silicon layer,
The P-type region 3P constitutes an electron storage unit 3a having a MOS structure. 3G is a gate terminal derived from the electrode 3M.

The potential of the electron storage portion 3a in the depth direction is as shown by the curve in FIG. 11, and is minimum in the N-type silicon layer of the electron storage region 3N and maximum in the P-type region 3P. As is clearer, electrons can be stored and transferred in the front Nch, and holes can be stored and transferred in the rear Pch.

The operation of the line sensor shown in FIGS. 5 and 6 will be described below with reference to FIGS. 7 to 10. The light receiving element section 2 has a configuration not shown in the line sensor shown in FIGS. Since electrons generated by photoelectric conversion are unnecessary, they are always discharged, and in the light receiving element 2a, all holes are discharged after detecting and generating electrons from holes.

In this example, during the transfer operation of the electronic transfer register 3, the light receiving element section 2 continues to accumulate holes generated by photoelectric conversion in the hole accumulation region 2P. The potential relationship of the sectional view taken along the line AA during the transfer operation of the electronic transfer register 3 is as shown in FIG. 7, for example.
As shown in FIG. 7B, the potential of h stores holes generated by photoelectric conversion in the light receiving element portion 2 in the hole storage region 2P of the light receiving element 2a.

At this time, in the Nch light-receiving element portion 2 on the front side, electrons generated by photoelectric conversion are discharged, and the potential of the electron transfer region 2N of the light-receiving element 2a at this time is the hole accumulation region 2P as shown in FIG. 7A. The depth increases from the broken line to the solid line in accordance with the amount of holes accumulated in.

The potential relationship of the sectional view taken along the line AA when the transfer operation of the signal charges of the electronic transfer register 3 is completed is as shown in FIG. 8, for example, and the potential of the Nch on the front side is shown in FIG. 8A. As described above, a predetermined amount of electrons from the electron supply source 1 is accumulated and maintained in the electron accumulation region 3N that constitutes the unit bit of the register 3 for electron transfer. At this time, the potential of the electron transfer region 2N of the light receiving element 2a becomes deeper from the broken line to the solid line according to the amount of holes accumulated in the hole accumulation region 2P, as shown in FIG. 8A.

As shown in FIG. 8B, the potential of Pch on the back side accumulates and maintains holes generated by photoelectric conversion in the hole accumulation region 2P of the light receiving element 2a, and the P-type region 3P accumulates in the electron accumulation region 3N. Due to the effect of the generated electrons, it becomes shallower from the broken line to the solid line.

Next, at the time of detection generation operation, a predetermined first voltage is supplied to the gate terminal 3G to make the potential of the electron storage portion 3a shallow as shown in FIG. 9 (potential relation of AA line sectional view). At this time, the potential relationship of the Nch on the front side is as shown in FIG. 9A, and at this time, the electron accumulation region 3
The electron transfer region 2N in which the electrons accumulated in N are modulated according to the amount of holes accumulated in the hole accumulation region 2P
Exhaust through.

In this case, the amount of electrons remaining in the electron storage region 3N is obtained by photoelectric conversion by the light receiving element 2a, and the hole storage region 2
The signal charge corresponds to the amount of holes accumulated in P.

At this time, the potential of Pch on the back side is as shown in FIG. 9B, the P-type region 3P becomes shallow, and holes obtained by photoelectric conversion are accumulated and maintained in the hole accumulation region 2P of the light receiving element 2a. ing.

At the end of this detection generation operation, the gate terminal 3G
Is supplied with a predetermined second voltage to deepen the potential of the electron accumulating portion 3a as shown in FIG. 10 (potential relation of the sectional view taken along the line AA). At this time, the potential relationship of the Nch on the front side is as shown in FIG. 10A, and the electrons, which are the signal charges, are accumulated and maintained in the electron accumulation region 3N. At this time, in the electron transfer region 2N, all the holes in the hole accumulation region 2P of the light receiving element 2a are discharged, so that potential modulation is eliminated.

Further, the potential relationship of the Pch on the back side at this time is as shown in FIG. 10B, and the P-type region 3P becomes shallower from the broken line to the solid line by the electron due to the signal charge on the front side, and the light receiving element 2a. All the holes accumulated in the hole accumulation region 2P are discharged. Next, the line signal can be obtained by transferring the electrons as the signal charges accumulated in the electron accumulation region 3N to the electron transfer register 3 as the transfer operation.

According to this example, a predetermined amount of electrons from the electron supply source 1 is supplied to each of the electron storage regions 3N, and the potential is modulated by the holes generated by photoelectric conversion in the light receiving element 2a by the predetermined amount of electrons. Since the electron is discharged through the electron transfer area 2N,
Electrons corresponding to holes (signal charges) generated by photoelectric conversion in the light receiving element 2a can be left in N.

According to this example, it is possible to obtain the same effects as those of the examples of FIGS. Further, according to this example, the signal charge, that is, the dynamic range of the read signal can be controlled by a predetermined amount of electrons accumulated in the electron accumulation region 3N.

Another embodiment of the present invention will be described with reference to FIGS. 12 and 13, for example, as shown in FIG. 14, the horizontal register of the CCD image pickup device has a two-stage structure, which is a horizontal register for hole transfer and a horizontal register for electron transfer.

12 and 13, reference numeral 1P denotes a hole supply source provided so as to be continuous in one direction (horizontal direction in FIG. 12) on the N-type silicon substrate 5. Along hole accumulating portion 4a and element separating portion 4
A hole detection / generation unit 4 in which b is sequentially and repeatedly arranged is provided.
In this case, the hole input gate 4c is formed between the hole supply source 1P and the hole accumulating portion 4a.

Along the hole detection / generation section 4, the electron storage section 3a is connected to the hole storage section 4a, the transfer section 3b _{2 is connected to} the element separation section 4b, and the electron storage section 3a _{2 is connected} to the element separation section 4b. And a hole accumulation section 7a ₁ continuous with the electron accumulation section 3a along with the electron transfer register 3E formed by sequentially repeating the transfer section 3b ₁ with the element isolation section 4b. A transfer unit 7b ₂ continuous to the transfer unit 3b ₂ , a hole storage unit 7a ₂ continuous to the electron storage unit 3a ₂ , and a transfer unit 7b ₁ continuous to the transfer unit 3b ₁ are provided with a register 3H for sequentially repeating hole transfer. Form.

In this case, the electron transfer register 3E and the hole transfer register 3H have different potentials.
For example, the light receiving area 11 of the CCD image pickup device as shown in FIG.
The signal charges of the electrons transferred by the vertical transfer register are accumulated in the electron accumulating portion 3a through the hole accumulating portion 7a ₁ and the holes from the hole accumulating portion 4a are accumulated in the electron accumulating portion 3a.
It is configured so as to accumulate in the hole accumulating portion 7a ₁ through a.

FIG. 13 is a sectional view taken along line BB of FIG. The hole supply source 1P will be described with reference to FIG.
Forms a P-type region on the N-type silicon substrate 5, forms a P ⁺ region on the P-type region, and forms aluminum on the upper surface thereof.
An electrode 1M made of a polycrystalline silicon layer or the like is provided, and a terminal 1G is derived from this electrode 1M.

The hole input gate 4c of the hole detecting / generating unit 4 in the sectional view taken along the line BB forms a P-type region 4P ₁ having a second P concentration on the N-type silicon substrate 5, and this P-type region is formed. Four
A second N-concentration N-type region 4N ₁ is formed on P ₁ , and a metal electrode 4M such as aluminum or a polycrystalline silicon layer is formed on the N-type region 4N ₁ via an insulating film such as a SiO ₂ layer 4S. Then, the electrode 4M, the insulating film 4S, the N-type region 4N ₁ and the P-type region 4P ₁ form a hole input gate 4c having a MOS structure. 4G is a gate terminal derived from the electrode 4M.

The potential in the depth direction of the hole input gate 4c is as shown by the curve in FIG. 11, and the N-type region 4N ₁
(Nch) has a minimum value, and P-type region 4P ₁ (Pch) has a maximum value. As is apparent from FIG.
Electrons can be stored and transferred by h, and holes can be stored and transferred by Pch on the back side.

The hole accumulating portion 4a of the hole detecting and generating portion 4 forms a hole accumulating region 4P ₂ of a P type silicon layer having a second P concentration on the N type silicon substrate 5, and the P A second N ⁻ on the hole storage region 4P ₂ made of a silicon type layer.
Forming a N-type region 4N ₂ concentration, on the N-type region 4N ₂ via an insulating film such as SiO ₂ layer 4S forming a metal electrode 4M, the electrode 4M, insulating film 4S, N-type region 4N _2,
The hole storage region 4P _{2 of the} P-type silicon layer constitutes the hole storage unit 4a of MOS structure.

The potential of the hole accumulating portion 4a in the depth direction is as shown by the curve in FIG. 11, and the N-type region 4N ₂ (N
ch), which is the minimum, and is the hole accumulation region 4 of the P-type silicon layer.
It is maximum at P ₂ (Pch), and as is clear from FIG. 11, electrons can be accumulated and transferred by the front Nch, and holes can be accumulated and transferred by this rear Pch.

The electron storage portion 3a of the electron transfer register 3E is a hole transfer layer formed of a P-type silicon layer having a first P concentration and formed on the N-type silicon substrate 5 adjacent to the hole storage region 4P _2. A region 3P ₁ is formed, and an electron storage region 3N ₁ which is a region to be supplied with electrons by an N ⁺ type N-type silicon layer is formed on the hole transfer region 3P ₁ .

Electron storage region 3N ₁ of this N-type silicon layer
A metal electrode 3M such as aluminum or a polycrystalline silicon layer is formed on the insulating film, for example, a SiO ₂ layer 3S, and the electrode 3
Electron storage region 3 of M, insulating film 3S, and N-type silicon layer
The N ₁ and P type regions 3P ₁ form an electron storage unit 3a having a MOS structure. 3G is a gate terminal derived from the electrode 3M.

The potential of the electron storage portion 3a in the depth direction is as shown by the curve in FIG. 11, and the electron storage region 3N ₁
Of the N-type silicon layer is minimum and that of the P-type region 3P ₁ is maximum. As is clear from FIG. 11, electrons can be stored and transferred in the front Nch, and holes can be stored and transferred in the rear Pch.

The hole accumulating portion 7a ₁ of the hole transfer register 3H is adjacent to the P-type region 3P ₁ on the N-type silicon substrate 5 and is formed of a P-type silicon layer having a first P concentration. The storage region 3P ₂ is formed, and the N-type region 3N ₂ made of an N-type silicon layer is formed on the hole storage region 3P _{2 of the} P-type silicon layer.

An insulating film such as Si is formed on the N-type region 3N _2.
A metal electrode 3M such as an aluminum or polycrystalline silicon layer is formed through the O ₂ layer 3S, and the electrode 3M, the insulating film 3S, the N-type region 3N ₂ and the hole accumulation region 3P ₂ of the P-type silicon layer form a MOS. The hole accumulating portion 7a ₁ of the constitution is constituted.

The potential of the hole accumulating portion 7a _{1 in} the depth direction is as shown by the curve in FIG. 11, the minimum in the N-type region 3N ₂ and the maximum in the P-type silicon layer in the hole accumulating region 3P _2. is there. As is clear from FIG. 11, the Nch on the surface
Can accumulate and transfer electrons, and holes can be accumulated and transferred by Pch on the back side.

In this case, the potential relationship of the sectional view taken along the line BB in FIG. 12 is as shown in FIG. 15, FIG. 15A shows the potential of the Nch on the front side, and FIG. 15B shows the potential on the back side. As is apparent from FIG. 15, the potential relationship between the hole transfer register 3H and the electron transfer register 3E is made to have a step.

FIG. 16 shows a sectional view taken along the line CC of FIG. Referring to FIG. 16, the electron storage section 3a ₂ of the register 3E for electron transfer and the hole storage section 7a ₂ of the register 3H for hole transfer are shown in FIG.
3 has the same configuration as the electron storage unit 3a of the electron transfer register 3E and the hole storage unit 7a _{1 of the} hole transfer register 3H. The difference from FIG. 13 in FIG. 16 is the hole detection generation unit. No. 4 element isolation part 4b.

In the sectional view taken along the line CC of FIG. 12, the element isolation portion 4b is formed on the N-type silicon substrate 5 with a second P concentration of P.
A type region 4P is formed, an N-type region 4N having a second N concentration is formed on the P-type region 4P, and aluminum, polycrystal or the like is formed on the N-type region 4N via an insulating film such as a SiO ₂ layer 4S. A metal electrode 4M such as a silicon layer is formed, and the electrode 4M, the insulating film 4S, the N-type region 4N, and the P-type region 4P form an element isolation portion 4b having a MOS structure.

The potential relationship in the depth direction of the element isolation portion 4b is also as shown by the curve in FIG. The potential relationship of Nch on the front side in this CC cross-sectional view is as shown in FIG. 17A, and the potential relationship of Pch on the back side is as shown in FIG. 17B.

FIG. 18 shows a sectional view taken along the line DD of FIG.
You To explain FIG. 18, in FIG.
Is the electronic storage unit 3 of the electronic transfer register 3E of FIG.
a₂And the hole accumulating portion 7a of the hole transfer register 3H.₂
Transfer unit 3b₂And 7b ₂It is a structure that. this
This will be explained next.

The transfer section 3 of the register 3E for electronic transfer
b ₂ (same for the transfer portion 3b ₁ ) is a P-type region 3P _{3 made of} a P-type silicon layer having a first P concentration on the N-type silicon substrate 5.
And an N-type region 3N ₃ of an N-type silicon layer is formed on the P-type region 3P ₃ , and an aluminum film or a polycrystalline silicon layer is formed on the N-type region 3N ₃ via an insulating film, for example, a SiO ₂ layer 3S. A metal electrode 3M, etc. is formed, and this electrode 3M, the insulating film 3S, the N-type region 3N ₃ and the P-type region 3P _{3 are used} to form a MO.
The transfer unit 3b ₂ having the S configuration is configured.

This transfer unit 3b ₂ (same for transfer unit 3b ₁ )
The potential in the depth direction is as shown by the curve in FIG. 11, and is minimum in the N-type region 3N ₃ and maximum in the P-type region 3P ₃ , and electrons are accumulated in the Nch on the surface as is clear from FIG. , And the holes can be accumulated and transferred by Pch on the back side.

Transfer unit 7 of register 3H for hole transfer
b ₂ (the same applies to the transfer portion 7 b ₁ ) forms a P-type region 3P ₄ made of a P-type silicon layer having a first P concentration on the N-type silicon substrate 5 and also has an N ⁻ concentration of N ⁻ concentration on the P-type region 3P ₄ . An N-type region 3N ₄ made of an N-type silicon layer is formed, and an insulating film such as a SiO ₂ layer 3S is formed on the N-type region 3N ₄ ,
Form a metal electrode 3M such as aluminum or polycrystalline silicon layer,
The electrode 3M, the insulating film 3S, the N-type region 3N ₄ and the P-type region 3P ₄ form a transfer portion 7b ₂ having a MOS structure.

This transfer unit 7b ₂ (same for transfer unit 7b ₁ )
The potential in the depth direction is as shown by the curve in FIG. 11, and is minimum in the N-type region 3N ₄ and maximum in the P-type region 3P ₄ , and as is clear from FIG.
Can accumulate and transfer electrons, and holes can be accumulated and transferred by Pch on the back side.

Nch on the front side in the sectional view taken along the line D-D
19A is as shown in FIG. 19A, and the potential relation of Pch on the back side is as shown in FIG. 19B.

Next, FIG. 12, FIG. 13, FIG. 16 and FIG.
To explain the operation of the example, the register 3E for electronic transfer will be described.
The transfer operation of the hole transfer register 3H and the hole transfer register 3H will be described later. During this transfer operation, the potential relationship between the Nch on the front side and the Pch on the back side of the cross-sectional view taken along the line BB of FIG.
0A and B, and the potential relationship between the Nch on the front side and the Pch on the back side of this CC sectional view is shown in FIG.
1A and 1B, and the potential relationship between the Nch on the front side and the Pch on the back side of this DD sectional view is as shown in FIGS. 22A and 22B.

At this time, the gate signal supplied to the gate terminal 4G of the hole detecting and generating unit 4 is the low level signal "0", but the hole detecting unit 4 detects that the holes from the hole supply source 1P are positive. The holes are accumulated in the hole accumulation region 4P ₂ through the hole input gate 4c, and at this time, as shown in FIG. 20A, the holes in the hole accumulation region 4P _{2 make} the potential of the Nch on the front side deeper than the broken line to the solid line.

When the transfer operation is completed and the detection generation operation is started from this state, the gate signal supplied to the gate terminal 4G of the hole detection generation unit 4 is the high level signal "1". At this time, Nc on the front side of the sectional view taken along the line BB of FIG.
The potential relationship between h and Pch on the back side is as shown in FIGS. 23A and 23B, and Nc on the front side of the cross-sectional view taken along the line C-C.
The potential relationship between h and the Pch on the back side is as shown in FIGS. 24A and 24B, and Nc on the front side of this DD line cross-sectional view is shown.
The potential relationship between h and the Pch on the back side is as shown in FIGS. 25A and 25B.

In this case, first, for example, the signal charge of electrons transferred by the vertical register of the light receiving area 11 of the CCD image pickup device is transferred to the hole accumulating portion 7a _{1 of the} hole transfer register 3H.
Through the register 3 for electronic transfer as shown in FIG. 23A.
The electron storage region 3N ₁ of the E electron storage unit 3a stores and maintains the electron.

At this time, as shown in FIG. 23B, the potential of the P-type region 3P ₁ which constitutes the hole transfer portion of the Pch on the back side becomes shallower from the broken line to the solid line by the amount corresponding to this signal charge, and The holes accumulated in the hole accumulation region 4P ₂ of the hole accumulation unit 4a of the detection generation unit 4 flow out by an amount corresponding to the shallowing due to the signal charge, and the flowed holes flow through the hole accumulation unit 7a ₁ . As shown in FIG. 25B, the charges are accumulated in the P-type region 3P ₄ of the adjacent transfer portion 7b ₂ having a higher potential. In this case, the amount of holes accumulated in the P-type region 3P ₄ corresponds to the signal charge.

When the detection / generation operation is terminated and the register 3E for electron transfer and the register 3H for hole transfer are set to the transfer state from this state, electrons and holes as signal charges can be transferred at the same time. . To explain this transfer, in the examples of FIGS. 12, 13, 16 and 18, the electrode 3M of the electron storage section 3a of the electron transfer register 3E and the hole storage section 7a _{1 of the} hole transfer register 3H are described. And the electrode 3M of the transfer section 3b ₁ of the register 3E for electron transfer and the transfer section 7b of the register 3H for hole transfer.
A _first electrode and a common, by connecting this like electrodes together to derive the gate terminal 3G _1.

Further, the electrode of the electron storage unit 3a ₂ of the electron transfer register 3E and the electrode of the hole storage unit 7a ₂ of the hole transfer register 3H are made common and the transfer unit of the electron transfer register 3E is used. The electrode 3b _{2 and} the electrode of the transfer portion 7b ₂ of the hole transfer register 3H are commonly used to connect the equal electrodes to each other to derive the gate terminal 3G ₂ .

In this example, the gate terminals 3G ₁ and 3G ₂ are used to perform two-phase driving. In this case, as shown in FIG. 14, the electron transfer register 3E and the hole transfer register 3H transfer electrons and holes in opposite directions. Therefore, when a positive phase signal is obtained at the output terminal 12a of the output circuit 12 provided on the output side of the electronic transfer register 3E, the output terminal of the output circuit 13 provided on the output side of the hole transfer register 3H. An inverted signal obtained by inverting one horizontal period, which can be used as a rear-view mirror signal of an automobile, is obtained at 13a.

Further, the electrode of the electron transfer register 3E and the electrode of the hole transfer register 3H shown in FIGS. 12, 13, 16 and 18 are separated from each other, and the wiring is crossed from each electrode to cross the gate. If the terminal is taken out, as shown in FIG. 26, the electron and the hole can be simultaneously transferred in the same direction by the electron transfer register 3E and the hole transfer register 3H, and the outputs of the registers 3E and 3H. If the signals are added by the output adder circuit 14, an added output signal having an increased output level can be obtained at the output terminal 14a.

In this case, for example, if the length of the electronic transfer register 3E is two horizontal periods, the output terminal 1 of the output circuit 13 provided on the output side of the hole transfer register 3E.
A normal video signal is obtained at 3a, and a video signal delayed by one horizontal period is simultaneously obtained at the output terminal 12a of the output circuit 12 provided on the output side of the register 3E for electronic transfer.

In the light receiving area 11 of the CCD image pickup device, electrons and holes are generated by photoelectric conversion in the sensor,
For example, in a frame transfer type image sensor using a 4-phase drive vertical transfer register, the electrons and holes accumulated in the sensor can be transferred in the same direction, but at the stage of transferring from the vertical transfer unit to the horizontal transfer unit, the holes are transferred. Could not be transferred due to the potential relationship. Therefore, only electrons have been conventionally used as signal components.

Therefore, in this example, as horizontal transfer registers, as shown in FIG. 14, a register 3E for electronic transfer and a register 3H for hole transfer are provided as shown in FIGS. 12, 13, 16 and 18. As shown by a broken line b in FIG. 28, the potential of Pch in the depth direction of the hole transfer register 3H is shown by a solid line a in the depth direction P of the vertical transfer portion.
As compared with the potential of ch, the potential is made shallow and the hole supply source 1p is unnecessary. Others are the same as above.

In this example, during the detection generation operation, the electrons from the vertical transfer unit are transferred and stored in the electron storage unit 3a of the register 3E for electron transfer, and the holes from the vertical transfer unit are used for hole transfer. It is transferred and accumulated in the register 3H. In the subsequent transfer operation, electrons and holes are simultaneously transferred as described above, and the same effect as described above is obtained.

The present invention is not limited to the above-described embodiments, and it goes without saying that various other configurations can be adopted without departing from the gist of the present invention.

[0086]

According to the present invention, the electric charge from the electric charge supplying portion is supplied to the electric charge receiving area through the electric charge transfer area modulated by the signal electric charge, so that the electric charge supplying area is supplied with the signal electric charge. You can get an electric charge. In this case, it is possible to obtain electric charges in this charge-supplied supply region at a relatively low voltage.

According to the present invention, the amount of charges accumulated can be changed depending on the size of the charge-supplied supply region, and amplification transfer can be performed.

Further, according to the present invention, there is an advantage that the dynamic range of the signal charge, that is, the read signal can be controlled by the amount of charge that can be accumulated in the charge receiving region.

Further, according to the present invention, there is an advantage that both electrons and holes corresponding to signal charges can be transferred at the same time.

[Brief description of drawings]

FIG. 1 is a plan view showing an embodiment of a semiconductor device of the present invention.

FIG. 2 is a sectional view taken along the line AA of FIG.

FIG. 3 is a diagram used for explaining FIG.

FIG. 4 is a diagram for explaining FIG.

FIG. 5 is a plan view showing another embodiment of the semiconductor device of the present invention.

6 is a cross-sectional view taken along the line AA of FIG.

FIG. 7 is a diagram used to explain FIG.

FIG. 8 is a diagram used for explaining FIG.

9 is a diagram used to explain FIG. 5. FIG.

10 is a diagram for explaining FIG. 5; FIG.

FIG. 11 is a diagram used for explaining the present invention.

FIG. 12 is a plan view showing another embodiment of the semiconductor device of the present invention.

13 is a sectional view taken along line BB of FIG.

FIG. 14 is a configuration diagram showing an example of a CCD image pickup device.

FIG. 15 is a diagram for explaining FIG. 12;

16 is a cross-sectional view taken along the line CC of FIG.

FIG. 17 is a diagram for explaining FIG. 12;

18 is a cross-sectional view taken along the line DD of FIG.

FIG. 19 is a diagram for explaining FIG. 12;

FIG. 20 is a diagram for explaining FIG. 12;

21 is a diagram for explaining FIG. 12; FIG.

22 is a diagram for explaining FIG. 12; FIG.

23 is a diagram for explaining FIG. 12; FIG.

FIG. 24 is a diagram for explaining FIG. 12;

FIG. 25 is a diagram for explaining FIG. 12;

FIG. 26 is a configuration diagram showing an example of a CCD image pickup device.

FIG. 27 is a configuration diagram showing an example of a CCD image pickup device.

FIG. 28 is a diagram which is used for describing another embodiment of the present invention.

[Explanation of symbols]

1 electron supply source 1P hole supply source 2 light receiving element section 2a light receiving element 2P hole accumulation area 2N electron transfer area 2S, 3S, 4S insulating film 2M, 3M, 4M metal electrode 3, 3E electron transfer register 3a, 3a ₂ Electron Storage Sections 3b, 3b ₁ , 3b ₂ Transfer Section 3H Hole Transfer Register 3N Electron Storage Area 4 Hole Detection Generation Section 4a Hole Storage Section 4b Element Separation Section 4c Hole Input Gate 5 N-Type Silicon Substrate 6 Pixel separation unit 7a ₁ and 7a ₂ Hole storage unit 7b ₁ and 7b ₂ Transfer unit

Claims (7)

[Claims] 1. A charge supply unit for supplying a charge, a charge-supplied region to which the charge is supplied from the charge supply unit via a charge transfer region, a signal charge having a polarity opposite to that of the charge, and the signal. A signal charge storage region that modulates the potential of the charge transfer region in accordance with the amount of charge, and the charge supply unit supplies the amount of charge corresponding to the signal charge stored in the signal charge storage region to the charge A semiconductor device characterized by supplying to a supply region. 2. The semiconductor device according to claim 1, wherein the charge supply unit has a charge supply source capable of assuming at least two states of a first potential and a second potential. 3. The semiconductor device according to claim 1, wherein the charge supply unit is provided between a charge supply source given a predetermined potential and the charge supply source and the charge transfer region, and the charge supply unit is provided. A semiconductor device comprising: a charge pumping unit that pumps a predetermined amount of charge from a source; and a potential barrier provided between the charge pumping unit and the charge supply source. 4. The semiconductor device according to claim 1, further comprising a first charge transfer element that transfers charges supplied to the charge receiving region in a first direction. The semiconductor device is characterized in that the region is shared with the unit bit of the first charge transfer element. 5. The semiconductor device according to claim 4, wherein charges having opposite polarities, which are provided in the first charge transfer element and are accumulated in the signal charge accumulation region, are used as the first direction or the first direction. Has a second charge transfer element for transferring in the opposite direction, and the signal charge storage region is common to the unit bit of the second charge transfer element. 6. The semiconductor device according to claim 4, wherein a plurality of bits of the first charge transfer element are provided with the signal charge storage region, the charge transfer region, and the charge supply unit, respectively. Characteristic semiconductor device. 7. The semiconductor device according to claim 6, wherein a plurality of light receiving parts are provided, and the charge storage part stores charges generated by photoelectric conversion in the light receiving part.