JPH0715131A - Mounting method of electronic component - Google Patents
Mounting method of electronic componentInfo
- Publication number
- JPH0715131A JPH0715131A JP15041593A JP15041593A JPH0715131A JP H0715131 A JPH0715131 A JP H0715131A JP 15041593 A JP15041593 A JP 15041593A JP 15041593 A JP15041593 A JP 15041593A JP H0715131 A JPH0715131 A JP H0715131A
- Authority
- JP
- Japan
- Prior art keywords
- solder
- mounting
- cream solder
- cream
- electronic component
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3421—Leaded components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3457—Solder materials or compositions; Methods of application thereof
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、印刷配線板へのリフロ
ーソルダリングによる電子部品の表面実装方法に関する
ものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a surface mounting method for electronic parts by reflow soldering on a printed wiring board.
【0002】[0002]
【従来の技術】一般に、電子部品の表面実装として、印
刷配線板上の銅材料などからなるパッドにはんだクリー
ムを印刷し、電子部品の端子又は電極がパッド上のはん
だクリームに対応するよう印刷配線板に電子部品を搭載
した後、リフロー加熱して実装している。このような実
装方式において、図4は従来の印刷配線板を示す平面
図、図5は従来の電子部品の実装状態を示す平面図であ
る。これらの図において、1は印刷配線板、2a及び2
bは印刷配線板上に銅はくをエッチングして形成された
パッド、3a及び3bは各々パッド2a及び2b上にほ
ぼ同大でメタルマスク印刷により形成されたクリームは
んだ、4はパッド2aに対応するよう搭載される狭い端
子ピッチでフラットパッケージタイプの狭ピッチIC、
5はパッド2aに対応するよう搭載される広い端子ピッ
チでフラットパッケージタイプの広ピッチIC、6は狭
ピッチIC4および広ピッチIC5から所定間隔を隔て
て突出する端子、7はパッド2bに対応するよう搭載さ
れる小形チップ部品、8はパッド2bに対応するよう搭
載される大形チップ部品、9は小形チップ部品7及び大
形チップ部品8の両端に配置された電極、10はリフロ
ー加熱によりパッド2a同志間に橋絡形成されたはんだ
ブリッジである。図6(A)〜(C)は従来のIC実装
方法における未はんだ不良発生メカニズムを示す一連の
断面説明図、図7(A)、(B)は従来のチップ部品リ
フロー後の実装状態を示す断面図である。これらの図に
おいて、11a及び11bはリフロー加熱により結晶形
成されたはんだである。2. Description of the Related Art Generally, as surface mounting of electronic parts, solder cream is printed on a pad made of a copper material or the like on a printed wiring board so that terminals or electrodes of the electronic part correspond to the solder cream on the pad. After mounting the electronic components on the board, it is mounted by reflow heating. In such a mounting method, FIG. 4 is a plan view showing a conventional printed wiring board, and FIG. 5 is a plan view showing a mounting state of a conventional electronic component. In these figures, 1 is a printed wiring board, 2a and 2
b is a pad formed by etching a copper foil on a printed wiring board, 3a and 3b are substantially the same size on the pads 2a and 2b respectively, and cream solder formed by metal mask printing, and 4 is a pad 2a Narrow pitch IC of flat package type with narrow terminal pitch,
5 is a wide pitch IC of a flat package type with a wide terminal pitch to be mounted corresponding to the pad 2a, 6 is a terminal protruding from the narrow pitch IC 4 and the wide pitch IC 5 at a predetermined interval, and 7 is corresponding to the pad 2b. Small chip component to be mounted, 8 is a large chip component mounted so as to correspond to the pad 2b, 9 is electrodes arranged at both ends of the small chip component 7 and the large chip component 8, and 10 is a pad 2a by reflow heating. It is a solder bridge formed between the comrades. 6 (A) to 6 (C) are a series of cross-sectional explanatory views showing a mechanism of unsolder failure occurrence in a conventional IC mounting method, and FIGS. 7 (A) and 7 (B) show a mounting state after a conventional chip component reflow. FIG. In these figures, 11a and 11b are solders which are crystallized by reflow heating.
【0003】次に作用について説明する。一般に、IC
製造時の誤差及び運搬過程の外力により、端子6の下先
端部の高さが不揃いになり、段差を生ずるが、同一IC
内の全端子におけるその最大値を、通称コプラナリティ
と称する。図6において、狭ピッチIC4及び広ピッチ
IC搭載前に、(A)のように、両ICとも各々コプラ
ナリティa及びbを有しており、通常、狭ピッチIC4
より広ピッチICの方が製造誤差が大きいため、コプラ
ナリティについてもa<bであることが一般的である。
両ICを(B)のように、部品搭載機により各々対応す
るパッド2a上に載置すると、各々ICの自重又は部品
搭載機の搭載圧により、端子6はクリームはんだ3a中
に突入し、最も下方に位置する端子6の下先端部がほぼ
パッド2aに当接した状態で安定する。この時、クリー
ムはんだ3aの印刷厚さcが狭ピッチIC4のコプラナ
リティaより大きく、広ピッチIC5のコプラナリティ
bより小さければ、同図(B)のように、狭ピッチIC
4について最も上方に位置する端子6を含む全端子がク
リームはんだ3aと接触するが、広ピッチIC5につい
ては、クリームはんだ3aの印刷厚さcより上方に位置
する端子6はクリームはんだ3aと接触しない。これら
をリフロー加熱すると、クリームはんだ3aはブレンド
されていたフラックス成分や溶剤を蒸発飛散するため、
体積を減じてはんだを溶融形成する。この時、IC搭載
後(B)でクリームはんだ3aと接触していた狭ピッチ
IC4の全端子6については、クリームはんだ3aの粘
着力によりリフロー加熱中もクリームはんだ3aと接触
を保つため、(C)のように、端子6とパッド2aの間
に正常なフィレット状のはんだ11aを形成するが、I
C搭載後(B)でクリームはんだ3aと接触していなか
った広ピッチIC5の端子6については、対応するクリ
ームはんだ3aは表面張力によりパッド2a上にのみ広
がり、端子6と離間したままではんだ11aを形成する
ので未はんだとなる。未はんだを無くするために、クリ
ームはんだ3aの印刷厚さcを狭ピッチIC4のコプラ
ナリティa及び広ピッチIC5のコプラナリティbより
大きくすると、はんだ供給量が多くなり、狭ピッチIC
4については端子ピッチが狭いため、印刷時及びIC搭
載時のパッド2aからのクリームはんだはみ出しなどに
起因する図5のようなはんだブリッジ10を生じ易い。Next, the operation will be described. Generally, IC
Due to manufacturing errors and external forces during the transportation process, the heights of the lower tips of the terminals 6 become uneven, resulting in step differences.
The maximum value of all terminals in the above is commonly called coplanarity. In FIG. 6, before mounting the narrow pitch IC 4 and the wide pitch IC, both ICs have coplanarity a and b, respectively, as shown in FIG.
Since a wider pitch IC has a larger manufacturing error, the coplanarity is generally a <b.
When both ICs are placed on the corresponding pads 2a by the component mounting machine as shown in (B), the terminals 6 rush into the cream solder 3a due to the weight of each IC or the mounting pressure of the component mounting machine, The lower tip portion of the terminal 6 located below is stabilized in a state of being substantially in contact with the pad 2a. At this time, if the printed thickness c of the cream solder 3a is larger than the coplanarity a of the narrow pitch IC 4 and smaller than the coplanarity b of the wide pitch IC 5, as shown in FIG.
4, all terminals including the terminal 6 located at the uppermost position contact the cream solder 3a, but for the wide pitch IC 5, the terminals 6 located above the printing thickness c of the cream solder 3a do not contact the cream solder 3a. . When these are reflow heated, the cream solder 3a evaporates and scatters the blended flux component and solvent,
The volume is reduced to melt and form the solder. At this time, since all the terminals 6 of the narrow pitch IC 4 which were in contact with the cream solder 3a after mounting the IC (B) are kept in contact with the cream solder 3a during the reflow heating due to the adhesive force of the cream solder 3a, (C ), A normal fillet-shaped solder 11a is formed between the terminal 6 and the pad 2a.
Regarding the terminals 6 of the wide-pitch IC 5 that were not in contact with the cream solder 3a after mounting C (B), the corresponding cream solder 3a spreads only on the pad 2a due to the surface tension, and the solder 11a remains separated from the terminals 6a. Therefore, it is not soldered. If the printed thickness c of the cream solder 3a is made larger than the coplanarity a of the narrow pitch IC 4 and the coplanarity b of the wide pitch IC 5 in order to eliminate unsoldered solder, the solder supply amount increases and the narrow pitch IC
With respect to No. 4, since the terminal pitch is narrow, the solder bridge 10 as shown in FIG.
【0004】また一般に、大形チップ部品は小形チップ
部品に比べて、電極部の表面積が大きく、チップ部品厚
さが大きいので、対応する基板上のパッド面積を大きく
するとともに、正常なはんだフィレットを形成するため
にはんだ供給量を多くする必要が有る。図7において、
(A)のように小形チップ部品6に対してはんだ供給量
が適当になるようにクリームはんだ厚さを設定すると、
小形チップ部品6については、電極9とパッド2bの間
に正常なフィレット形状のはんだ11bを形成するが、
大形チップ部品7については、はんだ供給量不足により
はんだ11bが電極9の垂直面のごく一部の長さのみに
接するだけの不十分なはんだフィレットしか形成でき
ず、未はんだとなり十分なはんだ接合強度を確保できな
いおそれがある。また、反対に(B)のように大形チッ
プ部品6に対してはんだ供給量が適当になるようにクリ
ームはんだ厚さを設定すると、小形チップ部品6につい
てはんだ供給量過多となり、電極9とパッド2bの間に
膨らんだ異常なフィレット形状のはんだ11bを形成す
るため、はんだ剥離のおそれや小形チップ部品6自体の
両端の電極または隣接する電子部品(図示せず)の電極
や端子とはんだブリッジを生じるおそれが有る。In general, large chip parts have a larger electrode surface area and larger chip part thickness than small chip parts. Therefore, the corresponding pad area on the substrate is increased and a normal solder fillet is formed. It is necessary to increase the amount of solder supplied for forming. In FIG.
When the cream solder thickness is set so that the solder supply amount becomes appropriate for the small chip component 6 as shown in (A),
For the small chip component 6, normal fillet-shaped solder 11b is formed between the electrode 9 and the pad 2b.
In the case of the large chip component 7, due to the insufficient supply of solder, the solder 11b can form only an insufficient solder fillet that contacts only a part of the vertical surface of the electrode 9, resulting in unsoldered and sufficient solder joining. It may not be possible to secure strength. On the contrary, when the cream solder thickness is set so that the solder supply amount is appropriate for the large chip component 6 as shown in (B), the solder supply amount becomes excessive for the small chip component 6, resulting in the electrode 9 and the pad. In order to form the solder 11b having an abnormal fillet shape that swells between 2b, there is a risk of solder peeling, and electrodes or terminals of both ends of the small chip component 6 itself or an adjacent electronic component (not shown) and a solder bridge are formed. May occur.
【0005】[0005]
【発明が解決しようとする課題】従来の実装方法は以上
のように構成されているので、端子のコプラナリティ値
が異なるICや外形寸法の異なるチップ部品のような電
子部品の混載実装にあっては、一定のはんだクリーム供
給厚さでは対応できないため、はんだブリッジ、未はん
だ、はんだ接合強度不足などの不良が多発し、手直し修
正に多大な時間を要するといった問題点があった。Since the conventional mounting method is configured as described above, it is not suitable for mixed mounting of electronic components such as ICs having different coplanarity values of terminals and chip components having different external dimensions. However, since a fixed solder cream supply thickness cannot be applied, there are problems that solder bridges, unsolders, insufficient solder joint strength and the like frequently occur, and it takes a lot of time for repair and correction.
【0006】本発明は、上記のような問題点を解消する
ためになされたもので、端子のコプラナリティ値が異な
るICや外形寸法の異なるチップ部品のような電子部品
の混載実装について、はんだ付け不良の発生が少ない製
造品質の良い電子部品の実装方法を提供することを目的
とする。The present invention has been made in order to solve the above-mentioned problems, and soldering failure occurs in mixed mounting of electronic components such as ICs having different coplanarity values of terminals and chip components having different external dimensions. It is an object of the present invention to provide a mounting method of an electronic component which is free from the occurrence of defects and has good manufacturing quality.
【0007】[0007]
【課題を解決するための手段】本発明に係る電子部品の
実装方法は、印刷配線板上のパッドにクリームはんだを
印刷する前に、一部又は全部のパッドについて、はんだ
プリコートしたものである。The electronic component mounting method according to the present invention is such that some or all of the pads are pre-coated with solder before the cream solder is printed on the pads on the printed wiring board.
【0008】また、所定間隔を隔てて突出する複数の端
子を有しはんだ形成厚さを必要とする一部又は全部の電
子部品に対応するパッド上にはんだプリコートし、その
上にクリームはんだを印刷するとともに、更にクリーム
はんだ上に粘着剤または粘着性のあるフラックスを形成
したものである。Further, a solder precoat is applied on a pad corresponding to a part or all of the electronic components having a plurality of terminals protruding at a predetermined interval and requiring a solder forming thickness, and cream solder is printed on the pad. In addition, an adhesive or an adhesive flux is formed on the cream solder.
【0009】また、クリームはんだを印刷する前に、特
にはんだ供給量を多量に要する電子部品に対応するパッ
ド上に、はんだプリコートしたものである。Further, before the cream solder is printed, solder is pre-coated on a pad corresponding to an electronic component which requires a large amount of solder supply.
【0010】[0010]
【作用】上記のように、印刷配線板上のパッドにクリー
ムはんだを印刷する前に、はんだ形成厚さまたははんだ
供給量を必要とする一部又は全部のパッドについて、は
んだプリコートしたので、はんだ付け不良の発生が少な
い。As described above, before the cream solder is printed on the pads on the printed wiring board, some or all of the pads requiring the solder forming thickness or the solder supply amount are pre-coated with solder. There are few defects.
【0011】[0011]
【実施例】実施例1.図1は本発明の一実施例を示す印
刷配線板の平面図である。図において、12a及び12
bは各々端子コプラナリティの大きな広ピッチIC4及
び大形チップ部品6に対応するパッド2a及び2b上
に、パッド2a及び2bとほぼ同大で形成されたはんだ
プリコートで、クリームはんだ3a及び3bは、他のコ
プラナリティの小さな狭ピッチIC5及び小形チップ部
品7に対応するパッド2a及び2b上と同時に、各々は
んだプリコート12a及び12b上にメタルマスク印刷
により形成されたものである。図2(A)〜(C)は本
発明の一実施例におけるICリフロー加熱過程を示す説
明図、図3(A)〜(C)は本発明の一実施例における
チップ部品実装過程を示す説明図である。EXAMPLES Example 1. FIG. 1 is a plan view of a printed wiring board showing an embodiment of the present invention. In the figure, 12a and 12
b is a solder precoat formed on the pads 2a and 2b corresponding to the wide-pitch IC 4 and the large chip component 6 each having a large terminal coplanarity and having substantially the same size as the pads 2a and 2b, and the cream solders 3a and 3b are different from each other. Is formed by metal mask printing on the solder precoats 12a and 12b at the same time as the pads 2a and 2b corresponding to the narrow pitch IC 5 having a small coplanarity and the small chip component 7. 2A to 2C are explanatory views showing an IC reflow heating process in one embodiment of the present invention, and FIGS. 3A to 3C are explanations showing a chip component mounting process in one embodiment of the present invention. It is a figure.
【0012】次に作用について説明する。大略の実装過
程について、従来例と異なるところだけを説明する。I
C実装について、IC搭載後は図2(A)のように、I
Cの自重または部品実装機の搭載圧により、端子コプラ
ナリティの大きな広ピッチIC5の端子6はクリームは
んだ3a中に突入し、最も下方に位置する端子6の下先
端部がパッド2aではなく、ほぼはんだプリコート12
aに当接した状態で安定する。この時、従来例と同様に
クリームはんだ3aの印刷厚さcが狭ピッチIC4のコ
プラナリティaより大きく、広ピッチIC5のコプラナ
リティbより小さければ、狭ピッチIC4については全
端子がクリームはんだ3aと接触するが、広ピッチIC
5についてクリームはんだ3aの印刷厚さcより上方に
位置する端子6はクリームはんだ3aと接触しない。こ
れらをリフロー加熱していくと、(B)のように、クリ
ームはんだ3aがブレンドされているフラックス成分や
溶剤を蒸発飛散するとともに、広ピッチIC5に対応す
るはんだプリコート12aが溶融軟化するため、広ピッ
チIC5の端子6は広ピッチIC5の自重によりはんだ
プリコート12aに沈降する。この時、広ピッチIC5
のコプラナリティbを考慮し、予めはんだプリコート1
2aの厚さを必要十分に大きく形成しておけば、クリー
ムはんだ3aの粘着力により広ピッチIC5の全端子6
はクリームはんだ3aと接触が保てるため、(C)のよ
うに、リフロー加熱後も狭ピッチIC4及び広ピッチI
C5の全端子6についてパッド2aとの間に正常なフィ
レット形状のはんだ11aを形成できる。Next, the operation will be described. Only the parts of the mounting process that differ from the conventional example will be described. I
Regarding the C mounting, after mounting the IC, as shown in FIG.
Due to the weight of C or the mounting pressure of the component mounter, the terminal 6 of the wide pitch IC 5 having a large terminal coplanarity rushes into the cream solder 3a, and the lower tip portion of the terminal 6 located at the lowest position is not the pad 2a but almost the solder. Precoat 12
Stabilizes in contact with a. At this time, if the printed thickness c of the cream solder 3a is larger than the coplanarity a of the narrow pitch IC4 and smaller than the coplanarity b of the wide pitch IC5 as in the conventional example, all terminals of the narrow pitch IC4 come into contact with the cream solder 3a. But wide pitch IC
With respect to No. 5, the terminals 6 located above the printed thickness c of the cream solder 3a do not contact the cream solder 3a. When these are reflow-heated, the flux component and the solvent blended with the cream solder 3a are evaporated and scattered, and the solder precoat 12a corresponding to the wide pitch IC5 is melted and softened, as shown in (B). The terminals 6 of the pitch IC 5 settle on the solder precoat 12a due to the weight of the wide pitch IC 5 itself. At this time, wide pitch IC5
Considering the coplanarity b of, solder precoat 1
If the thickness of 2a is made large enough, all terminals 6 of the wide pitch IC 5 can be formed by the adhesive force of the cream solder 3a.
Since it can keep contact with the cream solder 3a, as shown in (C), even after the reflow heating, the narrow pitch IC 4 and the wide pitch I
The normal fillet-shaped solder 11a can be formed between the pads 6 and all the terminals 6 of C5.
【0013】また、チップ部品実装について、図3
(A)はチップ部品搭載前、図3(B)はチップ部品搭
載後、図3(C)はリフロー加熱後の各実装過程を示し
ている。これらの図において、はんだ供給量を多く必要
とする大形チップ部品8に対応するパッド2b上にはん
だプリコート12bを追加形成することにより、小形チ
ップ部品7及び大形チップ部品8ともに各々個別に適当
なはんだ供給量に設定できるため、リフロー加熱後は
(C)のように正常なフィレット形状のはんだ11bを
形成できる。FIG. 3 shows chip component mounting.
3A shows each mounting process before mounting the chip component, FIG. 3B shows after mounting the chip component, and FIG. 3C shows each mounting process after reflow heating. In these figures, by additionally forming the solder precoat 12b on the pad 2b corresponding to the large chip component 8 which requires a large amount of solder supply, both the small chip component 7 and the large chip component 8 can be individually suitable. Since the solder supply amount can be set to a proper value, after the reflow heating, the normal fillet-shaped solder 11b as shown in (C) can be formed.
【0014】実施例2.上記実施例1のクリームはんだ
3aの上に粘着剤または粘着性のあるフラックス(図示
せず)を塗布などにより形成すれば、その粘着力により
端子6、クリームはんだ3a及びはんだプリコート12
aとの接触が保て、確実なはんだ接合ができる。Example 2. If an adhesive or an adhesive flux (not shown) is formed on the cream solder 3a of the first embodiment by application or the like, the adhesive force causes the terminals 6, the cream solder 3a and the solder precoat 12 to be formed.
The contact with a can be maintained and reliable soldering can be performed.
【0015】[0015]
【発明の効果】以上のように、本発明によれば、クリー
ムはんだを印刷する前に、一部または全部のパッドにつ
いて、はんだプリコートしたので、異なる端子コプラナ
リティのIC及び外形寸法の電子部品の混載実装につい
ても、はんだ付け不良の発生が少なく、製造品質の良い
実装基板が得られる。As described above, according to the present invention, the solder pre-coating is applied to some or all of the pads before printing the cream solder, so that ICs having different terminal coplanarities and electronic components having different external dimensions can be mounted together. With respect to mounting, a soldering defect is less likely to occur, and a mounting board with good manufacturing quality can be obtained.
【図1】本発明の一実施例を示す印刷配線板の平面図で
ある。FIG. 1 is a plan view of a printed wiring board showing an embodiment of the present invention.
【図2】本発明の一実施例におけるICの加熱過程を示
す断面説明図である。FIG. 2 is a cross-sectional explanatory view showing a heating process of an IC in one embodiment of the present invention.
【図3】本発明の一実施例におけるチップ部品の実装過
程を示す断面説明図である。FIG. 3 is a cross-sectional explanatory view showing a mounting process of a chip part according to an embodiment of the present invention.
【図4】従来の印刷配線板を示す平面図である。FIG. 4 is a plan view showing a conventional printed wiring board.
【図5】従来の電子部品の実装状態を示す平面図であ
る。FIG. 5 is a plan view showing a mounted state of a conventional electronic component.
【図6】従来のIC実装方法における未はんだ不良発生
メカニズムを示す一連の断面説明図である。FIG. 6 is a series of cross-sectional explanatory views showing a mechanism of unsoldered defect occurrence in a conventional IC mounting method.
【図7】従来のチップ部品リフロー後の実装状態を示す
断面図である。FIG. 7 is a cross-sectional view showing a mounted state after the conventional chip component reflow.
1 印刷配線板 2a、2b パッド 3a、3b クリームはんだ 4 狭ピッチIC 5 広ピッチIC 6 端子 7 小形チップ部品 8 大形チップ部品 9 電極 10 はんだブリッジ 11a、11b はんだ 12a、12b はんだプリコート 1 Printed Wiring Board 2a, 2b Pads 3a, 3b Cream Solder 4 Narrow Pitch IC 5 Wide Pitch IC 6 Terminal 7 Small Chip Component 8 Large Chip Component 9 Electrode 10 Solder Bridge 11a, 11b Solder 12a, 12b Solder Precoat
フロントページの続き (72)発明者 杉永 英樹 京都府長岡京市馬場図所1番地 三菱電機 株式会社電子商品開発研究所内Front page continuation (72) Inventor Hideki Suginaga No. 1 Baba Institute, Nagaokakyo City, Kyoto Prefecture Mitsubishi Electric Corporation Electronic Product Development Laboratory
Claims (4)
配線板上のパッドにクリームはんだを印刷し、これに端
子または電極をクリームはんだなどの粘着力で接着させ
た後、加熱しその後冷却することにより、印刷配線板に
実装するリフローはんだ付けによる電子部品の実装方法
において、クリームはんだを印刷する前に、一部又は全
部のパッドについて、はんだプリコートしたことを特徴
とする電子部品の実装方法。1. A cream solder is printed on a pad on a printed wiring board corresponding to a terminal or an electrode of an electronic component, the terminal or electrode is adhered to the pad by an adhesive force such as cream solder, and then heated and then cooled. As a result, in a method of mounting an electronic component by reflow soldering for mounting on a printed wiring board, solder pre-coating is applied to some or all of the pads before the cream solder is printed.
定間隔を隔てて突出する複数の端子を有しはんだ形成厚
さを必要とする一部又は全部の電子部品に対応するパッ
ド上にはんだプリコートしたことを特徴とする請求項1
記載の電子部品の実装方法。2. A solder precoat on a pad corresponding to a part or all of electronic components having a plurality of terminals protruding at a predetermined interval and requiring a solder forming thickness before printing the cream solder. Claim 1 characterized in that
How to mount the described electronic components.
を印刷するとともに、更にクリームはんだ上に粘着剤ま
たは粘着性のあるフラックスを形成したことを特徴とす
る請求項1記載の電子部品の実装方法。3. The method for mounting an electronic component according to claim 1, wherein cream solder is printed on the solder precoat, and an adhesive or an adhesive flux is further formed on the cream solder.
んだ供給量を多量に要する電子部品に対応するパッド上
に、はんだプリコートしたことを特徴とする請求項1記
載の電子部品の実装方法。4. The method of mounting an electronic component according to claim 1, wherein before the cream solder is printed, the solder corresponding to the electronic component requiring a large amount of solder is pre-coated with solder.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15041593A JPH0715131A (en) | 1993-06-22 | 1993-06-22 | Mounting method of electronic component |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15041593A JPH0715131A (en) | 1993-06-22 | 1993-06-22 | Mounting method of electronic component |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0715131A true JPH0715131A (en) | 1995-01-17 |
Family
ID=15496447
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15041593A Pending JPH0715131A (en) | 1993-06-22 | 1993-06-22 | Mounting method of electronic component |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0715131A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008108992A (en) * | 2006-10-27 | 2008-05-08 | Fujitsu Ltd | Optical module manufacturing method and manufacturing apparatus |
JP2021197422A (en) * | 2020-06-12 | 2021-12-27 | 三菱電機株式会社 | Electronic board unit and manufacturing method thereof |
-
1993
- 1993-06-22 JP JP15041593A patent/JPH0715131A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008108992A (en) * | 2006-10-27 | 2008-05-08 | Fujitsu Ltd | Optical module manufacturing method and manufacturing apparatus |
JP2021197422A (en) * | 2020-06-12 | 2021-12-27 | 三菱電機株式会社 | Electronic board unit and manufacturing method thereof |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6727718B2 (en) | Electronic component package, printed circuit board, and method of inspecting the printed circuit board | |
US6729532B2 (en) | Component mounting method | |
JPH11145578A (en) | Mounting structure of electronic component, mounting board, and mounting method of the electronic component | |
CN112703825A (en) | Method for producing a circuit board assembly and circuit board assembly | |
JPH08195548A (en) | Electronic component mounting method | |
US7057293B2 (en) | Structure comprising a printed circuit board with electronic components mounted thereon and a method for manufacturing the same | |
JPH0715131A (en) | Mounting method of electronic component | |
JP2724933B2 (en) | Reflow type printed wiring board | |
JPS63124496A (en) | Method of fitting multiterminal component | |
JPH05121868A (en) | Soldering package method of electronic part on printed substrate | |
JPH0435917B2 (en) | ||
JPH0936527A (en) | Electronic component, manufacture of electronic component and soldering of board and electronic component | |
JPH05206359A (en) | Semiconductor electronic component and method for mounting the same | |
JPH0739220B2 (en) | Cream Solder screen mask | |
JP2003031614A (en) | Semiconductor device, semiconductor module and method of mounting the device and the module | |
JPH07106745A (en) | Printed wiring board and formation of solder film on pad | |
JPH06152092A (en) | Surface-mount type printed circuit board assembly | |
JPH06334320A (en) | Mounting method for electronic component | |
JPH118453A (en) | Board | |
JPH04297091A (en) | Solder coating printed circuit board and manufacture thereof | |
JP2001077522A (en) | Method of mounting electronic component | |
JPH0414892A (en) | Structure of solder resist opening of printed-wiring board | |
JP2001244623A (en) | Method for connecting circuit board to flexible printed board and screen mask used therefor | |
JP2616571B2 (en) | Method for manufacturing semiconductor device | |
JPH08236921A (en) | Method for soldering electronic parts |