JPH0714843A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPH0714843A
JPH0714843A JP5143498A JP14349893A JPH0714843A JP H0714843 A JPH0714843 A JP H0714843A JP 5143498 A JP5143498 A JP 5143498A JP 14349893 A JP14349893 A JP 14349893A JP H0714843 A JPH0714843 A JP H0714843A
Authority
JP
Japan
Prior art keywords
electrode
protruding electrode
protruding
semiconductor element
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP5143498A
Other languages
Japanese (ja)
Inventor
Tetsuo Kawakita
哲郎 河北
Kenzo Hatada
賢造 畑田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP5143498A priority Critical patent/JPH0714843A/en
Publication of JPH0714843A publication Critical patent/JPH0714843A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/11001Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate
    • H01L2224/11003Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate for holding or transferring the bump preform
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • H01L2224/1147Manufacturing methods using a lift-off mask
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001Core members of the bump connector
    • H01L2224/13099Material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To greatly improve the reliability of junction part between an Al electrode and a bump electrode in a transfer system in which the bump electrode is formed on the Al electrode of a semiconductor element. CONSTITUTION:After a resin film 24, having an aperture 25 on the part corresponding to the Al electrode 13 of a semiconductor element 12, has been formed on a bump electrode forming substrate 10, a bump electrode 11 is formed in the aperture 25 in such a manner that the head of the bump electrode 11 will be protruding from the aperture 25. Then, after the bump electrode 11 and the Al electrode 13 have been aligned, the Al electrode 13 is pressure-welded to the head of the bump electrode 11. Then, a part of the Al electrode 13 and a part of the head of the bump electrode 11 are alloyed by heating the pressure- welded Al electrode 13 and the bump electrode 11, and at the same time, the aperture 25 is widened by contracting the resin film 24. Then, the bump electrode 11 is separated from the bump electrode forming substrate 10, and the separated bump electrode 11 is connected to the wiring electrode of the wiring substrate.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は半導体装置の製造方法に
関するものであり、特に半導体素子を高密度、薄型及び
コンパクトに実装する技術に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a technique for mounting semiconductor elements in high density, thinness and compactness.

【0002】[0002]

【従来の技術】近年、半導体素子を多数個用いる電子機
器が急増してきており、例えば、メモリーカード、液晶
又はELディスプレイ等が知られている。これらはいず
れも複数個のLSIチップを一定面積の基板上に高密度
にしかも薄型に搭載しなければならないという要求を有
している。
2. Description of the Related Art In recent years, the number of electronic devices using a large number of semiconductor elements has been rapidly increasing, and, for example, memory cards, liquid crystals, EL displays and the like are known. Each of these has a requirement that a plurality of LSI chips must be mounted on a substrate having a constant area in a high density and in a thin shape.

【0003】このようにLSIチップを高密度に実装す
る有効な手段としてマイクロバンプボンディング方式
(以下MBB方式と称する。)が知られている。この方
式はLSIチップのAL電極上に形成された突起電極と
配線基板の配線電極とを光硬化性の絶縁樹脂によって圧
接する方式であり、樹脂の収縮力によってのみ両電極同
士を電気的に接続するものである。
A micro bump bonding method (hereinafter referred to as MBB method) is known as an effective means for mounting LSI chips at high density in this way. In this method, the protruding electrode formed on the AL electrode of the LSI chip and the wiring electrode of the wiring board are pressed against each other by a photo-curing insulating resin, and the two electrodes are electrically connected only by the contracting force of the resin. To do.

【0004】上記の方式においては、上述したようにL
SIチップのAL電極上に突起電極を形成する必要があ
り、この突起電極を形成するため、従来はLSIチップ
のAL電極上にCr−CuやTi−Pd等のバリヤメタ
ルと称される多層金属膜を形成し、この上に電解めっき
法によりバンプと呼ばれる突起電極を形成する方法を採
用していた。
In the above method, as described above, L
It is necessary to form a protruding electrode on the AL electrode of the SI chip, and in order to form the protruding electrode, a multilayer metal film conventionally called a barrier metal such as Cr-Cu or Ti-Pd is formed on the AL electrode of the LSI chip. Then, a method of forming a projection electrode called a bump on this by electroplating is adopted.

【0005】しかしながら、このようにLSIチップの
AL電極上に突起電極を形成するためには、多数の蒸着
工程、フォトリソ工程及びエッチィング工程が必要とな
る。このため、これらの工程の途中においてLSIチッ
プに損傷が加わり、歩留まりが低下する原因になると共
に、実装コストが高くなったり信頼性が低下する原因に
なる。
However, in order to form the protruding electrode on the AL electrode of the LSI chip as described above, a large number of vapor deposition steps, photolithography steps and etching steps are required. For this reason, the LSI chip is damaged in the middle of these steps, which causes the yield to decrease, and also causes the mounting cost to increase and the reliability to decrease.

【0006】さらには、上記の突起電極が形成されたL
SIチップを入手するのは困難であり、非常に汎用性に
欠けるといった問題があった。
Further, the L having the above-mentioned protruding electrode is formed.
It is difficult to obtain an SI chip, and there is a problem that it lacks versatility.

【0007】上記の問題を解決する方法としては、LS
IチップのAL電極上に突起電極を転写法によって直接
に接合する方法が採用されるようになってきた。
As a method for solving the above problem, LS is used.
A method of directly joining a protruding electrode on the AL electrode of the I-chip by a transfer method has been adopted.

【0008】以下、図5及び図6に基づき、上述のMB
B方式の工程と合わせて転写法によって直接に接合する
方法を説明する。
The MB described above will be described below with reference to FIGS. 5 and 6.
A method of directly joining by a transfer method will be described together with the process of the B method.

【0009】図5及び図6において、10は突起電極形
成用基板、11はAuよりなる突起電極、12は半導体
素子、13は半導体素子のAl電極である。
In FIGS. 5 and 6, 10 is a substrate for forming a protruding electrode, 11 is a protruding electrode made of Au, 12 is a semiconductor element, and 13 is an Al electrode of the semiconductor element.

【0010】まず、図5(a)に示すように、突起電極
形成用基板10と半導体素子12とを、突起電極形成用
基板10上の突起電極11と半導体素子12のAl電極
13とが対向するように位置合わせする。
First, as shown in FIG. 5A, the protruding electrode forming substrate 10 and the semiconductor element 12 face each other, and the protruding electrode 11 on the protruding electrode forming substrate 10 and the Al electrode 13 of the semiconductor element 12 face each other. Align as you would.

【0011】次に、図5(b)に示すように、突起電極
11とAl電極13とを真空吸着孔14aを有する加圧
ツール14によって加圧、加熱する。この加圧、加熱に
よって突起電極形成用基板10上の突起電極11は半導
体素子12のAl電極13に接合される。
Next, as shown in FIG. 5B, the protruding electrode 11 and the Al electrode 13 are pressed and heated by a pressing tool 14 having a vacuum suction hole 14a. By this pressurization and heating, the bump electrode 11 on the bump electrode forming substrate 10 is bonded to the Al electrode 13 of the semiconductor element 12.

【0012】次に、図5(c)に示すように、加圧ツー
ル14の真空吸着孔14aにより半導体素子12を吸着
することによって、突起電極形成用基板10から半導体
素子12を引き剥すと、突起電極11はAl電極13に
転写、接合される。この場合、Auからなる突起電極1
1とAl電極13とは両者の界面層でわずかのAu−A
l合金を形成して接合されている。また、突起電極11
の形状や大きさは形成時とあまり変わらないものであ
る。すなわち、両者の界面層でわずかのAu−Al合金
を形成するのに必要な温度、圧力及び時間をかけるだけ
である。具体的には温度は約380〜460℃、圧力は
1突起電極当り7〜10g、時間は1secである。
Next, as shown in FIG. 5C, when the semiconductor element 12 is peeled from the bump electrode forming substrate 10 by sucking the semiconductor element 12 by the vacuum suction hole 14a of the pressure tool 14, The protruding electrode 11 is transferred and joined to the Al electrode 13. In this case, the bump electrode 1 made of Au
1 and Al electrode 13 have a slight Au-A in the interface layer between them.
l alloy is formed and joined. In addition, the protruding electrode 11
The shape and size of the do not change much when they are formed. That is, the temperature, pressure, and time required to form a small amount of Au-Al alloy in the interface layers of both are applied. Specifically, the temperature is about 380 to 460 ° C., the pressure is 7 to 10 g per protruding electrode, and the time is 1 sec.

【0013】次に、図6(a)に示すように、突起電極
11が転写、接合された半導体素子12と、該突起電極
11と対応した位置に配線電極16を有する配線基板1
7とを位置合わせすると共に、配線基板17上の半導体
素子12と対向する領域に光硬化性絶縁樹脂18を塗布
する。
Next, as shown in FIG. 6A, the wiring substrate 1 having the semiconductor element 12 to which the protruding electrode 11 is transferred and bonded and the wiring electrode 16 at a position corresponding to the protruding electrode 11.
7 is aligned, and a photocurable insulating resin 18 is applied to a region of the wiring board 17 facing the semiconductor element 12.

【0014】次に、図6(b)に示すように、常温の熱
加圧ツール14によって突起電極11を配線電極16に
圧接する。このようにすると、半導体素子12と配線基
板17との間に介在していた光硬化性絶縁樹脂18は周
囲に押しやられ、突起電極11と配線電極16とは電気
的に完全に接続された状態になる。この際、突起電極1
1は大きく変形させる必要がある。たとえば、加圧前に
高さが約10μm程度あった突起電極11は4〜5μm
程度までに変形させる。これに必要な荷重は1突起電極
当り90〜100gである。
Next, as shown in FIG. 6 (b), the protruding electrode 11 is brought into pressure contact with the wiring electrode 16 by the normal temperature hot pressing tool 14. By doing so, the photo-curable insulating resin 18 interposed between the semiconductor element 12 and the wiring board 17 is pushed to the surroundings, and the protruding electrode 11 and the wiring electrode 16 are electrically connected completely. become. At this time, the protruding electrode 1
1 needs to be greatly deformed. For example, the protrusion electrode 11 having a height of about 10 μm before pressurization has a thickness of 4 to 5 μm.
Deform to a certain degree. The load required for this is 90 to 100 g per protruding electrode.

【0015】次に、図6(c)に示すように、配線基板
17の裏面又は側面から紫外線20を照射し、光硬化性
絶縁樹脂18を硬化させる。
Next, as shown in FIG. 6 (c), ultraviolet rays 20 are irradiated from the back surface or side surfaces of the wiring board 17 to cure the photocurable insulating resin 18.

【0016】次に、図6(d)に示すように、加圧を解
除すると、突起電極11と配線電極16との接続は完了
する。
Next, as shown in FIG. 6 (d), when the pressure is released, the connection between the protruding electrode 11 and the wiring electrode 16 is completed.

【0017】上述したように、従来の技術においては、
配線基板17と半導体素子12との接合を無加熱で圧接
し、両者を光硬化性絶縁樹脂18で固定することによ
り、従来まで課題とされていた点を改善し、以下に示す
ような作用効果を得ている。
As described above, in the prior art,
By fixing the wiring board 17 and the semiconductor element 12 under pressure without heating and fixing them with the photo-curable insulating resin 18, the problems which have hitherto been solved are improved, and the operational effects as shown below are obtained. Is getting

【0018】(1) 無加熱接続であるため熱的ストレスを
与えることなく接続できる。
(1) Since it is an unheated connection, it can be connected without applying thermal stress.

【0019】(2) 接続部が圧接(接触)されているだけ
なので熱膨張係数の差による接合部での熱的ストレスを
受けない。
(2) Since the connecting portion is only pressure-contacted (contacted), thermal stress at the joint portion due to the difference in thermal expansion coefficient is not received.

【0020】(3) 接続部が金属結合を有した接合ではな
いので狭ピッチに対応できる。
(3) Since the connecting portion is not a joint having a metal bond, it is possible to cope with a narrow pitch.

【0021】[0021]

【発明が解決しようとする課題】しかしながら、上述し
た従来の方法では、以下に示すような問題点がある。
However, the above-mentioned conventional method has the following problems.

【0022】まず、図7(a)に示す接合工程におい
て、突起電極形成用基板上に形成されていた突起電極1
1は半導体素子12のAl電極13との間にAu−Al
合金21の金属間化合物が形成されることにより転写、
接合される。このAu−Al合金21は、突起電極11
を突起電極形成用基板から引き剥すのに必要な量だけ形
成されていればよいため、きわめて薄い層に形成され
る。また、このようにごくわずかのAu−Al合金21
しか形成する必要がないため、転写条件も接合温度が3
80〜460℃、荷重は低荷重で短時間となっている。
具体的には荷重は1突起電極当り8〜10g/バンプで
あり時間は1〜2secである。このため、突起電極1
1はほとんど変形していない状態でAl電極13上に転
写される。
First, in the bonding step shown in FIG. 7A, the bump electrode 1 formed on the bump electrode forming substrate is formed.
1 is Au-Al between the Al electrode 13 of the semiconductor element 12 and
Transfer due to the formation of the intermetallic compound of alloy 21
To be joined. This Au-Al alloy 21 is
Since it is necessary to form only an amount necessary for peeling off the projection electrode forming substrate from the substrate, a very thin layer is formed. In addition, such a small amount of Au-Al alloy 21
Since it only needs to be formed, the transfer condition is that the bonding temperature is 3
The load is 80 to 460 ° C., and the load is low and the time is short.
Specifically, the load is 8 to 10 g / bump per bump electrode, and the time is 1 to 2 sec. Therefore, the protruding electrode 1
1 is transferred onto the Al electrode 13 with almost no deformation.

【0023】ところが、このようにきわめて薄いAu−
Al合金21は接合信頼性という点からは不十分であ
り、高温放置等の信頼性試験にかけると比較的短い試験
時間で突起電極11とAl電極13との界面の接続抵抗
が増加し、さらに継続すると電気的に完全に不通の状態
となってしまう。
However, such an extremely thin Au--
The Al alloy 21 is insufficient in terms of bonding reliability, and when subjected to a reliability test such as high temperature storage, the connection resistance at the interface between the bump electrode 11 and the Al electrode 13 increases in a relatively short test time, and further, If it continues, it will be completely electrically disconnected.

【0024】このため、両者の間に十分で且つ接合信頼
性の高いAu−Al合金21を形成するには、荷重をさ
らに大きくし突起電極11とAl電極13との界面で十
分に圧接した状態で両者の金属間化合物を形成すること
が必要である。
Therefore, in order to form a sufficient Au-Al alloy 21 between them, the load is further increased and the bump electrode 11 and the Al electrode 13 are sufficiently pressure-welded to each other. Therefore, it is necessary to form an intermetallic compound of both.

【0025】しかしながら、加熱した状態で荷重を大き
くすると、Auよりなる突起電極11は熱によって硬度
が低下しているため、図7(b)に示すように、突起電
極11全体の変形が支配的となってしまう。
However, when the load is increased in a heated state, the hardness of the protruding electrode 11 made of Au is lowered by heat, and therefore the deformation of the entire protruding electrode 11 is dominant as shown in FIG. 7B. Will be.

【0026】このため、従来の方法によると、突起電極
11とAl電極13との間の金属間化合物を十分なもの
にすることはできない。
Therefore, according to the conventional method, the intermetallic compound between the bump electrode 11 and the Al electrode 13 cannot be made sufficient.

【0027】また、MBB方式では突起電極11の高さ
のばらつきや配線基板17上に形成された配線電極16
の厚さのばらつきを吸収するために突起電極11を一部
塑性変形させている。このため、突起電極11を転写、
接合する工程においては、突起電極11の変形はできる
限り小さく且つ突起電極11とAl電極13との間の金
属間化合物は十分であることが望ましい。
Further, in the MBB method, the height variations of the protruding electrodes 11 and the wiring electrodes 16 formed on the wiring board 17 are used.
The bump electrode 11 is partially plastically deformed in order to absorb the variation in thickness. Therefore, the protruding electrode 11 is transferred,
In the step of joining, it is desirable that the deformation of the bump electrode 11 is as small as possible and the intermetallic compound between the bump electrode 11 and the Al electrode 13 is sufficient.

【0028】上記問題点に鑑み、本発明は、突起電極と
Al電極との接合部の接続信頼性を向上させることがで
きる接合方法を提供することを目的とする。
In view of the above problems, it is an object of the present invention to provide a joining method capable of improving the connection reliability of the joining portion between the bump electrode and the Al electrode.

【0029】[0029]

【課題を解決するための手段】上記の目的を達成するた
め、本発明は、樹脂層の開口部内に該開口部から頭部が
突出するように突起電極を形成し、該突起電極に対して
半導体素子の金属電極を押圧することにより突起電極の
頭部と半導体素子の金属電極とを圧接し、しかる後、突
起電極及び金属電極を加熱して突起電極の頭部の一部と
金属電極の一部とを合金化するものである。
In order to achieve the above object, the present invention forms a protruding electrode in the opening of a resin layer so that the head protrudes from the opening, and By pressing the metal electrode of the semiconductor element, the head of the protruding electrode and the metal electrode of the semiconductor element are pressed into contact, and then the protruding electrode and the metal electrode are heated to partially cover the head of the protruding electrode and the metal electrode. It is an alloy with a part.

【0030】具体的に請求項1の発明が講じた解決手段
は、半導体素子の金属電極と配線基板の配線電極とを突
起電極を介して接続する半導体装置の製造方法を対象と
し、突起電極形成用基板上に上記半導体素子の金属電極
と対応する部位に開口部を有する樹脂膜を形成する工程
と、上記開口部内に突起電極をその頭部が上記開口部内
から突出するように形成する工程と、上記突起電極と上
記半導体素子の金属電極とを位置合わせする工程と、上
記半導体素子を上記突起電極形成用基板に対して押圧す
ることにより上記金属電極を上記突起電極の頭部に圧接
する工程と、圧接状態の金属電極及び突起電極を加熱す
ることにより上記金属電極の一部と上記突起電極の頭部
の一部とを合金化すると共に上記樹脂膜を収縮せしめて
その開口部を拡げる工程と、上記突起電極を上記突起電
極形成用基板から離脱させる工程と、離脱した突起電極
を配線基板の配線電極に接続する工程とを備えている構
成である。
Specifically, the solution means taken by the invention of claim 1 is directed to a method for manufacturing a semiconductor device in which a metal electrode of a semiconductor element and a wiring electrode of a wiring board are connected via a projection electrode, and a projection electrode is formed. A step of forming a resin film having an opening at a portion corresponding to the metal electrode of the semiconductor element on the substrate for use, and a step of forming a protruding electrode in the opening so that a head of the protruding electrode projects from the inside of the opening. A step of aligning the protruding electrode with a metal electrode of the semiconductor element, and a step of pressing the semiconductor element against the protruding electrode forming substrate to press the metal electrode against the head of the protruding electrode By heating the pressure-contacted metal electrode and the protruding electrode, a part of the metal electrode and a part of the head of the protruding electrode are alloyed and the resin film is contracted to expand the opening. A step, a configuration and a step of connecting the protruding electrodes and the step of separating the substrate for a protruding electrode forming, the breakaway protrusion electrodes to the wiring electrodes of the wiring board.

【0031】請求項2の発明は、請求項1の構成に、上
記樹脂膜は熱収縮性樹脂からなるという構成を付加する
ものである。
According to a second aspect of the present invention, in addition to the configuration of the first aspect, the resin film is made of a heat-shrinkable resin.

【0032】請求項3の発明は、請求項1の構成に、上
記突起電極を配線基板の配線電極に接続する工程は、上
記突起電極と上記配線基板の配線電極とが接触した状態
で、上記半導体素子と上記配線基板とを両者間に介在す
る絶縁性樹脂により固着する工程であるという構成を付
加するものである。
According to a third aspect of the present invention, in the structure of the first aspect, in the step of connecting the protruding electrode to the wiring electrode of the wiring board, the protruding electrode and the wiring electrode of the wiring board are in contact with each other. A configuration is added, which is a step of fixing the semiconductor element and the wiring board with an insulating resin interposed therebetween.

【0033】[0033]

【作用】請求項1の構成により、半導体素子を突起電極
形成用基板に対して押圧することにより半導体素子の金
属電極を突起電極の頭部に圧接する工程と、圧接状態の
金属電極及び突起電極を加熱して金属電極の一部と突起
電極の頭部の一部とを合金化する工程とを有しており、
半導体素子の金属電極は突起電極の頭部に常温で押圧さ
れると共に突起電極の頭部のみが押圧荷重を受けるた
め、両者の界面において両者が十分に変形し合って広い
領域で圧接され、また、広い領域で圧接された金属電極
の一部と突起電極の頭部の一部とが合金化するので合金
化される部分が多くなる。
According to the structure of claim 1, the step of pressing the semiconductor element against the substrate for forming the protruding electrode to press the metal electrode of the semiconductor element against the head of the protruding electrode, and the metal electrode and the protruding electrode in the pressed state. And a step of alloying a part of the metal electrode and a part of the head of the protruding electrode by heating
Since the metal electrode of the semiconductor element is pressed against the head of the bump electrode at room temperature and only the head of the bump electrode receives the pressing load, the two are sufficiently deformed at the interface between the two to be pressed and contacted in a wide area. Since a part of the metal electrode and a part of the head of the bump electrode, which are pressed against each other in a wide area, are alloyed with each other, a large number of parts are alloyed.

【0034】請求項2の構成により、樹脂膜は熱収縮性
樹脂からなるため、金属電極及び突起電極を加熱した際
に、樹脂膜が収縮してその開口部がスムーズに拡がる。
According to the second aspect of the invention, since the resin film is made of a heat-shrinkable resin, when the metal electrode and the protruding electrode are heated, the resin film contracts and the opening thereof spreads smoothly.

【0035】請求項3の構成により、突起電極と配線基
板の配線電極とが接触した状態で半導体素子と配線基板
とを両者間に介在する絶縁性樹脂により固着するため、
突起電極と配線基板の配線電極とは確実に接続される。
According to the third aspect of the present invention, the semiconductor element and the wiring board are fixed to each other by the insulating resin interposed therebetween in a state where the protruding electrode and the wiring electrode of the wiring board are in contact with each other.
The protruding electrode and the wiring electrode of the wiring board are surely connected.

【0036】[0036]

【実施例】以下、本発明の一実施例に係る半導体装置の
製造方法を図面を参照しながら説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A method of manufacturing a semiconductor device according to an embodiment of the present invention will be described below with reference to the drawings.

【0037】図1及び図2は本発明の一実施例に係る半
導体装置の製造方法の各工程を説明する断面図である。
1 and 2 are cross-sectional views for explaining each step of the method of manufacturing a semiconductor device according to one embodiment of the present invention.

【0038】まず、図1(a)に示すように、突起電極
形成用基板10と半導体素子12とを、突起電極形成用
基板10上の突起電極11と半導体素子12のAl電極
13とが対向するように位置合わせする。ここで用いる
突起電極形成用基板10の詳細な構造は図3に示す通り
であって、突起電極形成用基板10は3層構造になって
いる。すなわち、突起電極形成用基板10は絶縁性基板
22の上に全面に亘って透明導電膜23が形成されてい
る。絶縁性基板22としては耐熱性のガラス基板を用
い、透明導電膜23としてはITO(インジウムティン
オキサイド)膜を用いた。この透明導電膜23上に感光
性の絶縁性樹脂24を塗布し、半導体素子12のAl電
極13と対応した部位にのみ露光、現像工程を施すこと
により、開口部25を形成する。その後、透明導電膜2
3を一方の電極としてAuの電解めっき法により開口部
25内に突起電極11を形成するものである。また、感
光性の絶縁性樹脂24にはポジ型のフォトレジストやポ
リイミド樹脂等を用いた。
First, as shown in FIG. 1A, the protruding electrode forming substrate 10 and the semiconductor element 12 face each other, and the protruding electrode 11 on the protruding electrode forming substrate 10 and the Al electrode 13 of the semiconductor element 12 face each other. Align as you would. The detailed structure of the bump electrode forming substrate 10 used here is as shown in FIG. 3, and the bump electrode forming substrate 10 has a three-layer structure. That is, the transparent conductive film 23 is formed over the entire surface of the insulating electrode 22 of the bump electrode forming substrate 10. A heat-resistant glass substrate was used as the insulating substrate 22, and an ITO (indium tin oxide) film was used as the transparent conductive film 23. An opening 25 is formed by applying a photosensitive insulating resin 24 on the transparent conductive film 23 and exposing and developing only a portion of the semiconductor element 12 corresponding to the Al electrode 13. Then, the transparent conductive film 2
The protruding electrode 11 is formed in the opening 25 by the electrolytic plating method of Au using 3 as one electrode. Further, as the photosensitive insulating resin 24, a positive photoresist, a polyimide resin or the like was used.

【0039】次に、図1(b)に示すように、突起電極
11とAl電極13とを加圧ツール14によって加圧す
る。この加圧により、突起電極形成用基板10上の突起
電極11と半導体素子12のAl電極13とはその界面
で両者が十分に変形し合って圧接される。
Next, as shown in FIG. 1B, the protruding electrode 11 and the Al electrode 13 are pressed by the pressing tool 14. By this pressurization, the protruding electrode 11 on the protruding electrode forming substrate 10 and the Al electrode 13 of the semiconductor element 12 are sufficiently deformed at the interface thereof and are pressed into contact with each other.

【0040】次に、図1(c)に示すように、突起電極
11とAl電極13とが圧接した状態を維持したまま加
熱ツール19によって加熱する。このようにすると、突
起電極11とAl電極13の間にはAu−Al合金が形
成される。これと同時に、突起電極形成用基板10上に
形成された絶縁性樹脂24は加熱ツール19の熱により
収縮を起こし、その開口部25は順テーパーがついた形
となり、形成されていた突起電極11は突起電極形成用
基板10から剥離され易い状態になる。
Next, as shown in FIG. 1C, heating is performed by the heating tool 19 while maintaining the state where the protruding electrode 11 and the Al electrode 13 are in pressure contact with each other. By doing so, an Au—Al alloy is formed between the protruding electrode 11 and the Al electrode 13. At the same time, the insulating resin 24 formed on the protruding electrode forming substrate 10 contracts due to the heat of the heating tool 19, and the opening 25 has a forward taper shape, so that the formed protruding electrode 11 is formed. Is in a state of being easily separated from the substrate 10 for forming the bump electrode.

【0041】この状態を図4に基づき詳しく説明する。
すなわち、図4(a)に示すように、加圧ツール14に
より加圧する工程においては、突起電極11とAl電極
13とは互いに加圧されて十分に変形し合って圧接され
る。このとき突起電極11は絶縁性樹脂24があるため
に上部に突出している半球状の頭部26のみにしか荷重
はかからず、この部分でのみ変形が起こっている。この
変形によってAl電極13表面の酸化膜は十分に周辺に
押し出されて新成なAl面が突起電極11と接している
状態になっている。
This state will be described in detail with reference to FIG.
That is, as shown in FIG. 4A, in the step of applying pressure by the pressing tool 14, the bump electrode 11 and the Al electrode 13 are pressed against each other and sufficiently deformed and pressed against each other. At this time, since the protruding electrode 11 has the insulating resin 24, the load is applied only to the hemispherical head 26 protruding upward, and the deformation occurs only in this portion. Due to this deformation, the oxide film on the surface of the Al electrode 13 is sufficiently extruded to the periphery, and the newly formed Al surface is in contact with the bump electrode 11.

【0042】その後、図4(b)に示すように、加熱ツ
ール19によって両者を加熱すると、突起電極11とA
l電極13との界面に十分なAu−Al合金21からな
る金属間化合物が形成される。これと同時に、絶縁性樹
脂24は加熱ツール19の熱によって収縮し、開口部2
5は大きく広がり、突起電極11は突起電極形成用基板
10から剥離し易い状態となる。このときの荷重、加熱
温度及び時間はそれぞれ20〜50g/バンプ、380
〜480℃、1〜3secである。特に荷重は突起電極
11のサイズによって異なるが、ほぼAl電極13の厚
さの約1/3〜2/3まで突起電極11が押し込まれる
程度に設定する必要がある。また、加圧ツール14と加
熱ツール19とは同一のものであってもよい。但しこの
場合には、加圧した後に加熱できる機構を備えているこ
とが必要である。たとえばパルスヒートツールを用いれ
ば上記の機構は可能となる。
After that, as shown in FIG. 4B, when the both are heated by the heating tool 19, the protruding electrodes 11 and A
A sufficient intermetallic compound made of the Au—Al alloy 21 is formed at the interface with the 1-electrode 13. At the same time, the insulating resin 24 is contracted by the heat of the heating tool 19 and the opening 2
5 is widened so that the protruding electrode 11 is easily separated from the protruding electrode forming substrate 10. The load, heating temperature and time at this time are 20 to 50 g / bump and 380, respectively.
˜480 ° C., 1˜3 sec. In particular, the load varies depending on the size of the protruding electrode 11, but it is necessary to set the load so that the protruding electrode 11 is pushed in to about 1/3 to 2/3 of the thickness of the Al electrode 13. Further, the pressure tool 14 and the heating tool 19 may be the same. However, in this case, it is necessary to provide a mechanism capable of heating after pressurizing. For example, the above mechanism is possible by using a pulse heat tool.

【0043】次に、図1(d)に示すように、加熱ツー
ル19を除去した後、真空吸着孔を有する搬送治具27
によって吸着して半導体素子12を引き上げると、突起
電極11のAl電極13への転写、接合は完了する。こ
のときAuからなる突起電極11とAl電極13とは両
者の界面層では十分且つ信頼性の高いAu−Al合金2
1(図4(b)を参照)によって接合されている。
Next, as shown in FIG. 1 (d), after removing the heating tool 19, a carrying jig 27 having a vacuum suction hole is formed.
When the semiconductor element 12 is pulled up by adsorption by the, the transfer and bonding of the bump electrode 11 to the Al electrode 13 is completed. At this time, the bump electrode 11 and the Al electrode 13 made of Au have sufficient and high reliability in the interface layer between them.
1 (see FIG. 4B).

【0044】次に、図2(a)に示すように、突起電極
11が転写、接合された半導体素子12と、突起電極1
1と対応する部位に配線電極16を有する配線基板17
とを位置合わせする。この場合、配線基板17としては
シリコン基板やガラス基板を用い、配線電極16の材料
としてはCr−Au、Ti−Pd−Au、ITO等を用
いる。その後、配線基板17における配線電極16が形
成されている領域に光硬化性絶縁樹脂18を塗布する。
Next, as shown in FIG. 2A, the semiconductor element 12 to which the protruding electrode 11 is transferred and bonded, and the protruding electrode 1
Wiring board 17 having wiring electrode 16 in a portion corresponding to 1
Align and. In this case, a silicon substrate or a glass substrate is used as the wiring board 17, and Cr-Au, Ti-Pd-Au, ITO or the like is used as the material of the wiring electrode 16. After that, the photocurable insulating resin 18 is applied to the area of the wiring board 17 where the wiring electrodes 16 are formed.

【0045】次に、図2(b)に示すように、加圧ツー
ル14によって半導体素子12と配線基板17とを圧接
し、配線基板の17の裏面又は側面から紫外線20を照
射して光硬化性絶縁樹脂18を硬化させる。
Next, as shown in FIG. 2B, the semiconductor device 12 and the wiring board 17 are brought into pressure contact with each other by the pressure tool 14, and ultraviolet rays 20 are irradiated from the back surface or the side surface of the wiring board 17 to perform photo-curing. The insulating resin 18 is cured.

【0046】次に、図2(c)に示すように、加圧を解
除すると、突起電極11と配線電極16との接続は完了
する。
Next, as shown in FIG. 2 (c), when the pressure is released, the connection between the protruding electrode 11 and the wiring electrode 16 is completed.

【0047】[0047]

【発明の効果】以上説明したように、請求項1の発明に
係る半導体装置の製造方法によると、半導体素子を突起
電極形成用基板に対して押圧することにより半導体素子
の金属電極を突起電極の頭部に圧接する工程と、圧接状
態の金属電極及び突起電極を加熱して金属電極の一部と
突起電極の頭部の一部とを合金化する工程とを有してお
り、半導体素子の金属電極は突起電極の頭部に常温で押
圧されると共に突起電極の頭部のみが押圧荷重を受ける
ため、両者の界面において両者が十分に変形し合って広
い領域で圧接され、また、広い領域で圧接された金属電
極の一部と突起電極の頭部の一部とが合金化するため合
金化する部分が多くなるので、金属電極と突起電極との
界面に良好で信頼性が高い接合部が得られる。
As described above, according to the method of manufacturing the semiconductor device of the first aspect of the present invention, the semiconductor element is pressed against the substrate for forming the protruding electrode, so that the metal electrode of the semiconductor element is connected to the protruding electrode. The method has a step of press-contacting the head part, and a step of heating the metal electrode and the protruding electrode in a press-contact state to alloy a part of the metal electrode and a part of the head part of the protruding electrode with each other. Since the metal electrode is pressed against the head of the bump electrode at room temperature and only the head of the bump electrode receives the pressing load, the two electrodes are sufficiently deformed at the interface between them to be pressed and contacted in a wide area. Since a part of the metal electrode and a part of the head of the protruding electrode that are pressed together by the alloy are alloyed with each other, there are many parts to be alloyed. Therefore, a good and highly reliable joint at the interface between the metal electrode and the protruding electrode. Is obtained.

【0048】このため、本発明をフリップチップ方式や
MBB方式に適用すると、半導体装置全体の接続信頼性
を大幅に向上させることができる。
Therefore, when the present invention is applied to the flip chip system and the MBB system, the connection reliability of the entire semiconductor device can be greatly improved.

【0049】請求項2の発明に係る半導体装置の製造方
法によると、樹脂膜は熱収縮性樹脂からなるため、金属
電極及び突起電極を加熱した際に、樹脂膜が収縮してそ
の開口部が拡がり、突起電極は突起電極形成用基板から
スムーズに離脱するので、金属電極と突起電極との接合
部が損なわれることはない。
According to the method of manufacturing a semiconductor device of the second aspect of the present invention, since the resin film is made of heat-shrinkable resin, when the metal electrode and the protruding electrode are heated, the resin film shrinks and the opening is formed. Since it spreads and the protruding electrode is smoothly separated from the protruding electrode forming substrate, the joint between the metal electrode and the protruding electrode is not damaged.

【0050】請求項3の発明に係る半導体装置の製造方
法によると、突起電極と配線基板の配線電極とが接触し
た状態で半導体素子と配線基板とを両者間に介在する絶
縁性樹脂により固着するため、突起電極と配線基板の配
線電極とを確実に接続することができる。
According to the method of manufacturing a semiconductor device of the third aspect of the present invention, the semiconductor element and the wiring board are fixed to each other with the insulating resin interposed therebetween while the protruding electrode and the wiring electrode of the wiring board are in contact with each other. Therefore, the protruding electrode and the wiring electrode of the wiring board can be reliably connected.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例に係る半導体装置の製造方法
の各工程を示す断面図である。
FIG. 1 is a cross-sectional view showing each step of a method for manufacturing a semiconductor device according to an embodiment of the present invention.

【図2】上記半導体装置の製造方法の各工程を示す断面
図である。
FIG. 2 is a cross-sectional view showing each step of the method for manufacturing the semiconductor device.

【図3】上記半導体装置の製造方法における突起電極形
成用基板の断面図である。
FIG. 3 is a cross-sectional view of a substrate for forming a bump electrode in the method of manufacturing the semiconductor device.

【図4】上記半導体装置の製造方法における突起電極の
頭部と配線基板の配線電極との接合部を示す拡大断面図
である。
FIG. 4 is an enlarged cross-sectional view showing a joint between the head of the protruding electrode and the wiring electrode of the wiring board in the method of manufacturing a semiconductor device.

【図5】従来の半導体装置の製造方法の各工程を示す断
面図である。
FIG. 5 is a cross-sectional view showing each step of a conventional method for manufacturing a semiconductor device.

【図6】従来の半導体装置の製造方法の各工程を示す断
面図である。
FIG. 6 is a cross-sectional view showing each step of a conventional method for manufacturing a semiconductor device.

【図7】従来の半導体装置の製造方法における突起電極
と配線基板の配線電極との接合部を示す拡大断面図であ
る。
FIG. 7 is an enlarged cross-sectional view showing a joint between a protruding electrode and a wiring electrode of a wiring board in a conventional method for manufacturing a semiconductor device.

【符号の説明】[Explanation of symbols]

10 突起電極形成用基板 11 突起電極 12 半導体素子 13 Al電極(金属電極) 14 加圧ツール 16 配線電極 17 配線基板 18 光硬化性絶縁樹脂 19 加熱ツール 20 紫外線 21 Au−Al合金 22 絶縁性基板 23 導電膜 24 絶縁性樹脂 25 開口部 26 頭部 10 Substrate for Forming Projection Electrode 11 Projection Electrode 12 Semiconductor Element 13 Al Electrode (Metal Electrode) 14 Pressure Tool 16 Wiring Electrode 17 Wiring Board 18 Photocurable Insulating Resin 19 Heating Tool 20 Ultraviolet 21 Au-Al Alloy 22 Insulating Substrate 23 Conductive film 24 Insulating resin 25 Opening 26 Head

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 半導体素子の金属電極と配線基板の配線
電極とを突起電極を介して接続する半導体装置の製造方
法であって、突起電極形成用基板上に上記半導体素子の
金属電極と対応する部位に開口部を有する樹脂膜を形成
する工程と、上記開口部内に突起電極をその頭部が上記
開口部内から突出するように形成する工程と、上記突起
電極と上記半導体素子の金属電極とを位置合わせする工
程と、上記半導体素子を上記突起電極形成用基板に対し
て押圧することにより上記金属電極を上記突起電極の頭
部に圧接する工程と、圧接状態の金属電極及び突起電極
を加熱することにより上記金属電極の一部と上記突起電
極の頭部の一部とを合金化すると共に上記樹脂膜を収縮
せしめてその開口部を拡げる工程と、上記突起電極を上
記突起電極形成用基板から離脱させる工程と、離脱した
突起電極を配線基板の配線電極に接続する工程とを備え
ていることを特徴とする半導体装置の製造方法。
1. A method of manufacturing a semiconductor device, wherein a metal electrode of a semiconductor element and a wiring electrode of a wiring board are connected via a projection electrode, which corresponds to the metal electrode of the semiconductor element on a projection electrode forming substrate. A step of forming a resin film having an opening portion in the portion; a step of forming a protruding electrode in the opening portion such that its head protrudes from the opening portion; and the protruding electrode and the metal electrode of the semiconductor element. A step of aligning, a step of pressing the semiconductor element against the substrate for forming a protruding electrode to press the metal electrode against the head of the protruding electrode, and heating the pressed metal electrode and the protruding electrode. Thereby alloying a part of the metal electrode and a part of the head of the protruding electrode and contracting the resin film to expand the opening, and forming the protruding electrode on the protruding electrode forming base. A method of manufacturing a semiconductor device, comprising: a step of separating from a plate; and a step of connecting the separated protruding electrode to a wiring electrode of a wiring board.
【請求項2】 上記樹脂膜は熱収縮性樹脂からなること
を特徴とする請求項1に記載の半導体装置の製造方法。
2. The method for manufacturing a semiconductor device according to claim 1, wherein the resin film is made of a heat-shrinkable resin.
【請求項3】 上記突起電極を配線基板の配線電極に接
続する工程は、上記突起電極と上記配線基板の配線電極
とが接触した状態で、上記半導体素子と上記配線基板と
を両者間に介在する絶縁性樹脂により固着する工程であ
ることを特徴とする請求項1に記載の半導体装置の製造
方法。
3. The step of connecting the protruding electrode to the wiring electrode of the wiring board, the semiconductor element and the wiring board are interposed between the protruding electrode and the wiring electrode of the wiring board in a state of being in contact with each other. The method for manufacturing a semiconductor device according to claim 1, wherein the step is a step of fixing with an insulating resin.
JP5143498A 1993-06-15 1993-06-15 Manufacture of semiconductor device Withdrawn JPH0714843A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5143498A JPH0714843A (en) 1993-06-15 1993-06-15 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5143498A JPH0714843A (en) 1993-06-15 1993-06-15 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPH0714843A true JPH0714843A (en) 1995-01-17

Family

ID=15340121

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5143498A Withdrawn JPH0714843A (en) 1993-06-15 1993-06-15 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPH0714843A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002001634A2 (en) * 2000-06-27 2002-01-03 Infineon Technologies Ag System support for semiconductor chips and electronic components and method for producing a system support and electronic components

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002001634A2 (en) * 2000-06-27 2002-01-03 Infineon Technologies Ag System support for semiconductor chips and electronic components and method for producing a system support and electronic components
WO2002001634A3 (en) * 2000-06-27 2002-06-20 Infineon Technologies Ag System support for semiconductor chips and electronic components and method for producing a system support and electronic components
US6969905B2 (en) 2000-06-27 2005-11-29 Infineon Technologies Ag Leadframe for semiconductor chips and electronic devices and production methods for a leadframe and for electronic devices

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