JPH07142690A - Image sensing device - Google Patents

Image sensing device

Info

Publication number
JPH07142690A
JPH07142690A JP5314021A JP31402193A JPH07142690A JP H07142690 A JPH07142690 A JP H07142690A JP 5314021 A JP5314021 A JP 5314021A JP 31402193 A JP31402193 A JP 31402193A JP H07142690 A JPH07142690 A JP H07142690A
Authority
JP
Japan
Prior art keywords
semiconductor element
substrate
metal wiring
image pickup
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5314021A
Other languages
Japanese (ja)
Inventor
Yoshiro Nishimura
芳郎 西村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Olympus Corp
Original Assignee
Olympus Optical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Olympus Optical Co Ltd filed Critical Olympus Optical Co Ltd
Priority to JP5314021A priority Critical patent/JPH07142690A/en
Publication of JPH07142690A publication Critical patent/JPH07142690A/en
Pending legal-status Critical Current

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  • Solid State Image Pick-Up Elements (AREA)

Abstract

PURPOSE:To provide an image sensing device which is miniaturized so as to be easily mounted on a very narrow part such as the tip of an electronic endoscope. CONSTITUTION:Component semiconductor elements of an amplifier. circuit and the like are formed on a semiconductor substrate 1 to provide a semiconductor element forming part 2, and a first metal wiring 3, an insulating layer 4, and a second metal wiring 5 are formed to constitute a semiconductor device board 6. A chip component 7 is mounted on the board 6, the lead 11 of a package 12 mounted with a solid-state image sensing device 13 is soldered to a second metal wiring 5 provided to one edge of the board 6, and an outer signal conductor 22 is soldered to the second metal wiring 5 provided to the other edge of the board 6 to form an image sensing device.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明は、電子内視鏡の先端部
などの微小部分に装着されて用いられる撮像装置に関す
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image pickup apparatus which is used by being attached to a minute portion such as a tip portion of an electronic endoscope.

【0002】[0002]

【従来の技術】従来、電子内視鏡の先端部などの微小部
分に装着されて用いられる撮像装置としては、次のよう
な構成のものが知られている。すなわち、図9に示すよ
うに、実装基板101 にアンプ回路やバイアス回路構成用
の半導体素子102 を配置し、ワイヤ103 で配線部と接続
したのち接続部を封止樹脂104 で封止し、更にチップ部
品105 を設けて実装基板部106 を構成する。また図10に
示すように、固体撮像素子111 を、下面にパッケージリ
ード112 を設けたパッケージ113 の上面に載置して、ワ
イヤ114 でパッケージ113 の接続部と接続し、更に固体
撮像素子111 上に光学部品115 を配置すると共に固体撮
像素子111 及び光学部品115 の側面部を封止樹脂116 で
封止して固体撮像素子部117 を構成する。そして、固体
撮像素子部117 のパッケージ113 のパッケージリード11
2 に対して、実装基板部106 の実装基板101 と中継基板
121 の一端に形成されている配線部をハンダ122 で接続
し、また実装基板101 と中継基板121 の他端に形成され
ている配線部と外部信号線123 とをハンダ122 で接続し
て撮像装置を構成し、電子内視鏡の先端部等へ組み込ん
で用いるようにしている。
2. Description of the Related Art Conventionally, as an image pickup device which is used by being attached to a minute portion such as a tip portion of an electronic endoscope, the following structure is known. That is, as shown in FIG. 9, a semiconductor element 102 for constructing an amplifier circuit or a bias circuit is arranged on a mounting substrate 101, connected to a wiring portion with a wire 103, and then the connection portion is sealed with a sealing resin 104, and further, The chip component 105 is provided to form the mounting substrate unit 106. Further, as shown in FIG. 10, the solid-state image sensor 111 is placed on the upper surface of the package 113 having the package lead 112 on the lower surface, and the wire 114 is connected to the connecting portion of the package 113. The optical component 115 is disposed in the solid state image pickup device 111 and the side surfaces of the solid state image pickup device 111 and the optical component 115 are sealed with the sealing resin 116 to form the solid state image pickup device portion 117. Then, the package lead 11 of the package 113 of the solid-state imaging device section 117
2, the mounting board 101 of the mounting board section 106 and the relay board
The wiring part formed at one end of the 121 is connected by the solder 122, and the wiring part formed at the other end of the mounting substrate 101 and the relay substrate 121 and the external signal line 123 are connected by the solder 122 and the image pickup device. It is configured to be used by incorporating it into the distal end portion of the electronic endoscope or the like.

【0003】[0003]

【発明が解決しようとする課題】ところで、上記従来の
撮像装置は、固体撮像素子部117 に取り付けられる実装
基板部106 においては、実装基板101 に半導体素子102
を実装する工程を必要とし、更に半導体素子102 を実装
するスペースを必要とするばかりでなく、その実装によ
って厚み方向の寸法が大となり、電子内視鏡の先端部な
どの微小部分への装着のための小型化には不向きな構成
である。
By the way, in the above-mentioned conventional image pickup apparatus, in the mounting substrate section 106 attached to the solid-state image pickup element section 117, the semiconductor element 102 is mounted on the mounting board 101.
Not only requires a step of mounting the semiconductor element 102, but also requires a space for mounting the semiconductor element 102, the dimension in the thickness direction becomes large due to the mounting, and the mounting to a minute portion such as the tip portion of the electronic endoscope is not required. Therefore, it is not suitable for miniaturization.

【0004】本発明は、従来の撮像装置における上記問
題点を解消するためになされたもので、小型化が可能で
電子内視鏡の先端部などの微小部分に容易に装着可能な
撮像装置を提供することを目的とする。
The present invention has been made in order to solve the above-mentioned problems in the conventional image pickup apparatus, and provides an image pickup apparatus which can be miniaturized and can be easily attached to a minute portion such as a tip portion of an electronic endoscope. The purpose is to provide.

【0005】[0005]

【課題を解決するための手段及び作用】上記問題点を解
決するため、請求項1記載の発明は、半導体基板に半導
体素子を一体的に形成し且つメタル配線部を備えた半導
体素子基板と固体撮像素子とを有し、前記半導体素子基
板のメタル配線部に、固体撮像素子,チップ部品及び外
部信号線を直接接続して撮像装置を構成するものであ
る。また、請求項2記載の発明は、半導体基板に固体撮
像素子及び半導体素子を一体的に形成し且つメタル配線
部を備えた半導体素子基板を有し、該半導体素子基板の
メタル配線部に、チップ部品及び外部信号線を直接接続
して撮像装置を構成するものである。
SUMMARY OF THE INVENTION In order to solve the above problems, the invention according to claim 1 is a semiconductor element substrate integrally formed with a semiconductor element on a semiconductor substrate, and a semiconductor element substrate and a solid state. An image pickup device is provided, and a solid-state image pickup device, a chip component, and an external signal line are directly connected to a metal wiring portion of the semiconductor element substrate to form an image pickup apparatus. Further, the invention according to claim 2 has a semiconductor element substrate in which a solid-state imaging device and a semiconductor element are integrally formed on a semiconductor substrate and which is provided with a metal wiring portion, and the semiconductor element substrate includes a chip on the metal wiring portion. The component and the external signal line are directly connected to form an image pickup device.

【0006】このように構成した撮像装置においては、
半導体基板に半導体素子、あるいは固体撮像素子及び半
導体素子を一体的に形成した半導体素子基板を実装基板
として用いているため、半導体素子を実装するためのス
ペースが不要となり、また接続部が削減でき、狭ピッチ
化が可能となり容易に小型化を図ることができる。
In the image pickup device constructed as described above,
Since a semiconductor element on a semiconductor substrate, or a semiconductor element substrate integrally formed with a solid-state imaging element and a semiconductor element is used as a mounting substrate, a space for mounting the semiconductor element is not necessary, and the connecting portion can be reduced, The pitch can be narrowed and the size can be easily reduced.

【0007】[0007]

【実施例】次に実施例について説明する。図1は、本発
明に係る撮像装置の第1実施例の半導体素子基板を示す
断面図で、図2は、図1に示した半導体素子基板と固体
撮像素子部とを接続してなる撮像装置の第1実施例を示
す断面図である。図1において、1はシリコン,ガリウ
ムヒ素等からなる半導体基板で、該半導体基板1の表面
部に、アンプ回路やバイアス回路等の周辺回路構成用半
導体素子を形成して半導体素子形成部2を設け、次いで
Al等の金属を用いて第1のメタル配線3を形成する。次
に、固体撮像素子を実装したパッケージのパッケージリ
ード,チップ部品(能動素子及びあるいは受動素子),
外部信号線等の接続に必要な部分に、Au,Ag,Cu,Ni,
Cr,Ti,W等の金属を用いて第2のメタル配線5を単層
又は多層で形成し、第2のメタル配線5を形成した部分
以外の部分に、パッシベーション膜,樹脂等からなる絶
縁層4を設けて半導体素子基板6を形成する。
EXAMPLES Next, examples will be described. FIG. 1 is a sectional view showing a semiconductor element substrate of a first embodiment of an image pickup apparatus according to the present invention, and FIG. 2 is an image pickup apparatus formed by connecting the semiconductor element substrate shown in FIG. 1 and a solid-state image pickup element section. 2 is a cross-sectional view showing the first embodiment of FIG. In FIG. 1, reference numeral 1 denotes a semiconductor substrate made of silicon, gallium arsenide, or the like, and a semiconductor element forming portion 2 is provided by forming semiconductor elements for constituting peripheral circuits such as an amplifier circuit and a bias circuit on a surface portion of the semiconductor substrate 1. , Then
The first metal wiring 3 is formed using a metal such as Al. Next, the package lead of the package in which the solid-state image sensor is mounted, chip parts (active element and / or passive element),
Au, Ag, Cu, Ni,
The second metal wiring 5 is formed in a single layer or a multi-layer using a metal such as Cr, Ti, W, etc., and an insulating layer made of a passivation film, a resin or the like is provided on a portion other than the portion where the second metal wiring 5 is formed. 4 is provided to form the semiconductor element substrate 6.

【0008】次に、図2に示すように、下面にパッケー
ジリード11を設けたパッケージ12に、固体撮像素子13を
配置してパッケージ12の電極部とワイヤ14で接続し、更
に固体撮像素子13の上面に光学部品15を載置し、固体撮
像素子13と光学部品15の側面部を封止樹脂16で封止し
て、固体撮像素子部17を構成する。そして、前記半導体
素子基板6の一端に設けた第2のメタル配線5に固体撮
像素子部17のパッケージリード11の一方をハンダ22で接
続し、更にパッケージリード11の他方を中継基板21に設
けた配線の一端にハンダ22で接続して、半導体素子基板
6,固体撮像素子部17及び中継基板21を一体化し、半導
体素子基板6の他端に設けた第2のメタル配線5及び中
継基板21に設けた配線の他端に、それぞれ外部信号線23
をハンダ22で接続して、撮像装置を構成する。なお、こ
の場合、撮像装置に対する入射光方向と半導体素子基板
6の長手方向とは平行になるように配置され、細径の微
小部分への装着が容易な構成となっている。
Next, as shown in FIG. 2, the solid-state image pickup device 13 is arranged in the package 12 having the package lead 11 provided on the lower surface, and is connected to the electrode portion of the package 12 by the wire 14. The optical component 15 is placed on the upper surface of the solid-state image pickup device 13 and the side surfaces of the solid-state image pickup device 13 and the optical component 15 are sealed with the sealing resin 16 to form the solid-state image pickup device portion 17. Then, one of the package leads 11 of the solid-state image pickup device section 17 is connected to the second metal wiring 5 provided at one end of the semiconductor element substrate 6 with solder 22, and the other of the package leads 11 is provided on the relay substrate 21. The semiconductor element substrate 6, the solid-state imaging device section 17 and the relay substrate 21 are integrated by connecting to one end of the wiring with the solder 22, and the second metal wiring 5 and the relay substrate 21 provided at the other end of the semiconductor element substrate 6 are connected. At the other end of the provided wiring, external signal line 23
Are connected by solder 22 to form an image pickup device. In this case, the incident light direction with respect to the image pickup device and the longitudinal direction of the semiconductor element substrate 6 are arranged in parallel with each other, so that the semiconductor device substrate 6 can be easily mounted on a small portion having a small diameter.

【0009】このように構成した撮像装置においては、
半導体基板1に半導体素子を一体的に形成した半導体素
子基板6に、固体撮像素子部17,チップ部品7,外部信
号線23等を直接接続して実装基板として用いているた
め、半導体素子を実装するためのスペースが不要とな
り、また半導体素子の接続部が削減できるため容易に小
型化することができる。
In the image pickup device constructed as described above,
Since the solid-state imaging device section 17, the chip component 7, the external signal line 23, etc. are directly connected to the semiconductor element substrate 6 in which semiconductor elements are integrally formed on the semiconductor substrate 1 and used as a mounting substrate, the semiconductor element is mounted. A space for doing so is unnecessary, and since the connecting portion of the semiconductor element can be reduced, the size can be easily reduced.

【0010】上記第1実施例においては、第1のメタル
配線をAl等の金属を用いて単層で形成したものを示した
が、第1のメタル配線をAu,Ag,Cu,Ni,Cr,Ti,W等
の金属を用いて単層又は多層で形成し、第2のメタル配
線を設けずに、パッケージリード,チップ部品,外部信
号線等の接続部以外に、パッシベーション膜,樹脂等か
らなる絶縁層を形成して構成するようにしてもよい。ま
た、上記実施例では、半導体素子基板の表面部に半導体
素子形成部を設けたものを示したが、半導体素子形成部
は半導体素子基板の裏面部あるいは表裏両面部に形成し
てもよい。
In the first embodiment described above, the first metal wiring is formed as a single layer using a metal such as Al, but the first metal wiring is made of Au, Ag, Cu, Ni, Cr. , Ti, W, etc. are used to form a single layer or a multi-layer. Without providing the second metal wiring, in addition to the connection parts such as package leads, chip parts, external signal lines, etc., from the passivation film, resin, etc. You may make it comprise by forming the insulating layer which becomes. Further, in the above embodiment, the semiconductor element forming portion is provided on the front surface portion of the semiconductor element substrate, but the semiconductor element forming portion may be formed on the back surface portion or the front and back both surface portions of the semiconductor element substrate.

【0011】また上記実施例では、パッケージリード及
び外部信号線はハンダで接続したものを示したが、パッ
ケージリード,外部信号線並びにチップ部品は、ハンダ
で接続するばかりでなく、導電性樹脂,異方導電性樹
脂,熱圧着,超音波,超音波併用熱圧着等の手段を用い
て接続することができる。また、上記実施例において、
半導体素子基板の半導体素子形成部を遮光のため、樹脂
又は第2のメタル配線で覆うように構成してもよい。ま
た更に、全体の機械的補強及び遮光並びに外部からのノ
イズ対策として、固体撮像素子を実装したパッケージ,
チップ部品,外部信号線等を接続した後に、半導体素子
基板全体を樹脂等で覆いかくすようにしてもよい。
In the above embodiment, the package lead and the external signal line are connected by solder. However, the package lead, the external signal line and the chip component are not only connected by solder, but also a conductive resin Connection can be made using means such as one-way conductive resin, thermocompression bonding, ultrasonic waves, or thermocompression bonding using ultrasonic waves. In the above embodiment,
The semiconductor element forming portion of the semiconductor element substrate may be covered with resin or second metal wiring for light shielding. Furthermore, as a mechanical reinforcement and shading of the whole and a measure against external noise, a package mounted with a solid-state image sensor,
After connecting the chip components, the external signal lines, etc., the entire semiconductor element substrate may be covered with resin or the like.

【0012】次に第2実施例について説明する。図3
は、本発明の第2実施例の半導体素子基板を示す断面図
で、図4は、図3に示した半導体素子基板と固体撮像素
子部とを接続してなる第2実施例の撮像装置を示す断面
図であり、図1及び図2に示した第1実施例と同一又は
対応する構成要素には同一符号を付して示している。こ
の実施例における半導体素子基板6は、次のように構成
されている。すなわち図3に示すように、シリコン,ガ
リウムヒ素等からなる半導体基板1の表面部に、アン
プ,バイアス回路等の構成用半導体素子を形成して半導
体素子形成部2を設け、次いで、Al等の金属を用いて第
1のメタル配線3を形成する。次に第1のメタル配線3
と第2のメタル配線5のコンタクト部を除き、パッシベ
ーション膜,樹脂等で絶縁層4を形成する。次に、Au,
Ag,Cu,Ni,Cr,Ti,W等の金属を用いて必要な部分に
第2のメタル配線5を形成し、半導体素子基板6を構成
する。この際、第2のメタル配線5は単層でも多層でも
よい。
Next, a second embodiment will be described. Figure 3
FIG. 4 is a sectional view showing a semiconductor element substrate of a second embodiment of the present invention, and FIG. 4 shows an image pickup apparatus of the second embodiment in which the semiconductor element substrate shown in FIG. FIG. 3 is a cross-sectional view showing the same or corresponding constituent elements as or corresponding to those of the first embodiment shown in FIGS. 1 and 2. The semiconductor element substrate 6 in this embodiment is configured as follows. That is, as shown in FIG. 3, a semiconductor element forming portion 2 is provided by forming a constituent semiconductor element such as an amplifier or a bias circuit on a surface portion of a semiconductor substrate 1 made of silicon, gallium arsenide, or the like, and then Al or the like. The first metal wiring 3 is formed using metal. Next, the first metal wiring 3
The insulating layer 4 is formed of a passivation film, resin, etc., except for the contact portion of the second metal wiring 5. Next, Au,
The second metal wiring 5 is formed in a necessary portion using a metal such as Ag, Cu, Ni, Cr, Ti, W, etc., and the semiconductor element substrate 6 is configured. At this time, the second metal wiring 5 may be a single layer or a multilayer.

【0013】次に、図4に示すように、半導体素子基板
6にチップ部品7を取り付けると共に、該半導体素子基
板6の一端に設けた第2のメタル配線5に、図2に示し
た第1実施例と同様に構成した固体撮像素子部17のパッ
ケージリード11の一方をハンダ22で接続し、更にパッケ
ージリード11の他方を中継基板21に設けた配線の一端に
ハンダ22で接続し、半導体素子基板6の他端に設けた第
2のメタル配線5及び中継基板21に設けた配線の他端
に、それぞれ外部信号線23をハンダ22で接続して、撮像
装置を構成する。
Next, as shown in FIG. 4, the chip component 7 is attached to the semiconductor element substrate 6, and the second metal wiring 5 provided at one end of the semiconductor element substrate 6 is provided with the first component shown in FIG. One of the package leads 11 of the solid-state imaging device section 17 configured in the same manner as in the embodiment is connected by solder 22, and the other of the package leads 11 is connected by solder 22 to one end of the wiring provided on the relay substrate 21. An external signal line 23 is connected by solder 22 to the second metal wiring 5 provided on the other end of the substrate 6 and the other end of the wiring provided on the relay substrate 21 to form an image pickup device.

【0014】このように構成した撮像装置においては、
半導体素子基板6に形成する第1のメタル配線3は、第
2のメタル配線5とのコンタクトに必要なサイズだけで
よく、絶縁層4上の第2のメタル配線5で固体撮像素子
部17のパッケージリード11,チップ部品7,外部信号線
23等との接続部を形成すればよいので、更に小型化を図
ることが可能である。
In the image pickup device constructed as described above,
The size of the first metal wiring 3 formed on the semiconductor element substrate 6 is only required to make contact with the second metal wiring 5. Package lead 11, chip component 7, external signal line
Since it suffices to form a connection portion with 23 or the like, it is possible to further reduce the size.

【0015】この第2実施例においても、半導体素子基
板に設ける半導体素子形成部は、裏面部あるいは表裏両
面部に形成してもよく、また半導体素子形成部を遮光の
ため、樹脂又は第2のメタル配線で覆うように構成して
もよい。更に、全体の機械的補強及び遮光並びに外部か
らのノイズ対策として、固体撮像素子を実装したパッケ
ージ,チップ部品,外部信号線等をハンダ,導電性樹
脂,異方導電性樹脂,熱圧着,超音波,超音波併用熱圧
着等で接続したのち、半導体素子基板全体を樹脂等で被
覆するようにしてもよい。
Also in the second embodiment, the semiconductor element forming portion provided on the semiconductor element substrate may be formed on the back surface portion or the front and back both surface portions. Further, since the semiconductor element forming portion is shielded from light, a resin or a second material is formed. You may comprise so that it may be covered with a metal wiring. Furthermore, as a mechanical reinforcement and shading of the whole and measures against external noise, packages such as solid-state image sensor mounted, chip parts, external signal lines are soldered, conductive resin, anisotropic conductive resin, thermocompression bonding, ultrasonic waves. After the connection is made by thermocompression bonding combined with ultrasonic waves, the entire semiconductor element substrate may be covered with resin or the like.

【0016】図5は、本発明の第3実施例における半導
体素子基板を示す断面図である。この実施例における半
導体素子基板31は、図3に示した第2実施例と同様に、
半導体基板1に半導体素子形成部2,第1のメタル配線
3,絶縁層4,第2のメタル配線5を形成したのち、半
導体基板1の裏面に、裏面保護及び裏面配線のために、
フレキシブル基板,ガラスエポキシ基板,セラミック基
板等からなる配線基板32を接着して構成する。
FIG. 5 is a sectional view showing a semiconductor element substrate according to the third embodiment of the present invention. The semiconductor element substrate 31 in this embodiment is similar to the second embodiment shown in FIG.
After forming the semiconductor element forming portion 2, the first metal wiring 3, the insulating layer 4, and the second metal wiring 5 on the semiconductor substrate 1, on the back surface of the semiconductor substrate 1 for back surface protection and back surface wiring,
A wiring substrate 32 made of a flexible substrate, a glass epoxy substrate, a ceramic substrate, or the like is bonded and configured.

【0017】このように構成することにより、半導体素
子基板の機械的強度を向上させると共に、より高密度化
が可能であり、固体撮像素子部を半導体素子基板に接続
する場合には、中継基板を省略することができる。
With this structure, the mechanical strength of the semiconductor element substrate can be improved and the density can be further increased. When connecting the solid-state image pickup element portion to the semiconductor element substrate, the relay board is used. It can be omitted.

【0018】図6は、本発明の第4実施例における半導
体素子基板を示す断面図である。この実施例における半
導体素子基板41は、図3に示した第2実施例と同様に、
半導体基板1に半導体素子形成部2を形成し、第1のメ
タル配線3を形成したのち、絶縁層4を形成する際に、
半導体基板1の裏面にも絶縁層42を形成し、そして第2
のメタル配線5を形成する際に、同様に半導体基板1の
裏面に形成した絶縁層42上にメタル配線43を形成して構
成する。更に、図示していないが、必要に応じ、このよ
うに構成した半導体素子基板41に穴をあけ、該穴を絶縁
し導体を設けてスルーホールを形成してもよい。
FIG. 6 is a sectional view showing a semiconductor element substrate according to the fourth embodiment of the present invention. The semiconductor element substrate 41 in this embodiment is similar to the second embodiment shown in FIG.
When the semiconductor element forming portion 2 is formed on the semiconductor substrate 1, the first metal wiring 3 is formed, and then the insulating layer 4 is formed,
An insulating layer 42 is also formed on the back surface of the semiconductor substrate 1, and the second
When the metal wiring 5 is formed, the metal wiring 43 is similarly formed on the insulating layer 42 formed on the back surface of the semiconductor substrate 1. Further, although not shown, a through hole may be formed by forming a hole in the semiconductor element substrate 41 having such a structure, insulating the hole, and providing a conductor, if necessary.

【0019】このように構成した半導体素子基板におい
ては、半導体素子基板の厚みのみで両面配線が可能とな
り、より高密度で小型化が可能となり、固体撮像素子部
を接続する場合には、中継基板を省略することができ
る。
In the semiconductor element substrate thus constructed, double-sided wiring can be performed only by the thickness of the semiconductor element substrate, which enables higher density and downsizing. Can be omitted.

【0020】図7は、本発明の第5実施例を示す断面図
である。この実施例は、実装基板51上に、固体撮像素子
13、及びチップ部品7を接続した図3に示した第2実施
例と同様の半導体素子基板6とを、ダイボンディングに
より接着し、固体撮像素子13と半導体素子基板6の一端
に設けた第2のメタル配線5とをワイヤ14で接続し、固
体撮像素子13上に光学部品(例えばプリズム)15を載置
したのち、固体撮像素子13と半導体素子基板6との接続
部を封止樹脂16で封止し、半導体素子基板6の他端に設
けた第2のメタル配線5と外部信号線23をハンダ22で接
続して撮像装置を構成するものである。
FIG. 7 is a sectional view showing a fifth embodiment of the present invention. In this embodiment, the solid-state image sensor is mounted on the mounting substrate 51.
Secondly, the solid-state imaging device 13 and the semiconductor element substrate 6 are attached to one end of the semiconductor element substrate 6 by die-bonding 13 and the semiconductor element substrate 6 to which the chip component 7 is connected and which is the same as that of the second embodiment shown in FIG. After connecting the metal wiring 5 to the metal wiring 5 with a wire 14 and mounting an optical component (for example, a prism) 15 on the solid-state image sensor 13, the connecting portion between the solid-state image sensor 13 and the semiconductor element substrate 6 is sealed with a sealing resin 16. The second metal wiring 5 which is sealed and provided on the other end of the semiconductor element substrate 6 and the external signal line 23 are connected by a solder 22 to form an image pickup device.

【0021】このように構成した撮像装置においては、
固体撮像素子をパッケージに実装する必要がなく、した
がってパッケージと半導体素子基板とをハンダ等により
接続する必要がなくなり、ワイヤ等により狭ピッチ接続
が可能となる。また全体を平面的に実装するため作業性
がよく、接続部の狭ピッチ化が可能なため、より小型化
を図ることができる。なお、この実施例の場合も、撮像
装置に対する入射光方向と半導体素子基板の長手方向と
は平行になるように配置されている。
In the image pickup device constructed as described above,
Since it is not necessary to mount the solid-state image pickup device on the package, it is not necessary to connect the package and the semiconductor element substrate with solder or the like, and a narrow pitch connection can be made with wires or the like. Further, since the whole is mounted on a plane, the workability is good, and the pitch of the connecting portions can be narrowed, so that the size can be further reduced. Also in the case of this embodiment, the incident light direction with respect to the image pickup device and the longitudinal direction of the semiconductor element substrate are arranged in parallel.

【0022】図8は、本発明の第6実施例を示す断面図
である。この実施例は、半導体基板1に、アンプ回路や
バイアス回路構成用半導体素子を形成した半導体素子形
成部2の他に、固体撮像素子61を一体的に形成して半導
体素子基板62を構成するものである。
FIG. 8 is a sectional view showing a sixth embodiment of the present invention. In this embodiment, a semiconductor element substrate 62 is formed by integrally forming a solid-state image sensor 61 on the semiconductor substrate 1 in addition to the semiconductor element forming portion 2 in which an amplifier circuit and a semiconductor element for bias circuit configuration are formed. Is.

【0023】このように固体撮像素子を半導体素子基板
に一体的に形成することにより、接続部の削減等が可能
となり、更に小型化が可能となる。なお、この実施例に
おいても、図5及び図6に示した第3及び第4実施例の
ように、半導体素子基板において半導体基板の裏面に別
個の配線基板や、絶縁層を介したメタル配線を設けるこ
とが可能である。
By integrally forming the solid-state image pickup element on the semiconductor element substrate as described above, it is possible to reduce the number of connecting portions and the like, and further downsize. Also in this embodiment, as in the third and fourth embodiments shown in FIGS. 5 and 6, in the semiconductor element substrate, a separate wiring board or metal wiring via an insulating layer is provided on the back surface of the semiconductor substrate. It is possible to provide.

【0024】なお、上記各実施例において、アンプ回路
やバイアス回路を構成するために用いるコンデンサは、
チップ部品として構成するばかりでなく、半導体素子基
板に強誘電体膜を用いて一体的に形成することもでき
る。
In each of the above embodiments, the capacitors used to form the amplifier circuit and the bias circuit are
Not only the chip component but also the semiconductor element substrate can be integrally formed by using the ferroelectric film.

【0025】[0025]

【発明の効果】以上実施例に基づいて説明したように、
本発明によれば、半導体基板に半導体素子、あるいは固
体撮像素子及び半導体素子を一体的に形成した半導体素
子基板を実装基板として用いるようにしているので、半
導体素子を実装するためのスペースが不要となり、接続
部が削減でき、その狭ピッチ化が可能となり、これによ
り容易に小型化を図ることができる。
As described above on the basis of the embodiments,
According to the present invention, a semiconductor element, or a semiconductor element substrate integrally formed with a solid-state imaging element and a semiconductor element on a semiconductor substrate is used as a mounting substrate, so that a space for mounting the semiconductor element is unnecessary. As a result, the number of connecting portions can be reduced, and the pitch can be narrowed, whereby the size can be easily reduced.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明に係る撮像装置の第1実施例の半導体素
子基板を示す断面図である。
FIG. 1 is a sectional view showing a semiconductor element substrate of a first embodiment of an image pickup device according to the present invention.

【図2】本発明の第1実施例の構成を示す断面図であ
る。
FIG. 2 is a sectional view showing the configuration of the first embodiment of the present invention.

【図3】本発明の第2実施例の半導体素子基板を示す断
面図である。
FIG. 3 is a sectional view showing a semiconductor device substrate of a second embodiment of the present invention.

【図4】本発明の第2実施例の構成を示す断面図であ
る。
FIG. 4 is a sectional view showing a configuration of a second exemplary embodiment of the present invention.

【図5】本発明の第3実施例の半導体素子基板を示す断
面図である。
FIG. 5 is a sectional view showing a semiconductor device substrate of a third embodiment of the present invention.

【図6】本発明の第4実施例の半導体素子基板を示す断
面図である。
FIG. 6 is a sectional view showing a semiconductor device substrate of a fourth embodiment of the present invention.

【図7】本発明の第5実施例の構成を示す断面図であ
る。
FIG. 7 is a sectional view showing the structure of a fifth embodiment of the present invention.

【図8】本発明の第6実施例の構成を示す断面図であ
る。
FIG. 8 is a sectional view showing the structure of a sixth embodiment of the present invention.

【図9】従来の撮像装置の実装基板部の構成例を示す断
面図である。
FIG. 9 is a cross-sectional view showing a configuration example of a mounting substrate section of a conventional imaging device.

【図10】従来の撮像装置の構成例を示す断面図である。FIG. 10 is a cross-sectional view showing a configuration example of a conventional imaging device.

【符号の説明】[Explanation of symbols]

1 半導体基板 2 半導体素子形成部 3 第1のメタル配線 4 絶縁層 5 第2のメタル配線 6 半導体素子基板 7 チップ部品 11 パッケージリード 12 パッケージ 13 固体撮像素子 14 ワイヤ 15 光学部品 16 封止樹脂 17 固体撮像素子部 21 中継基板 22 ハンダ 23 外部信号線 31 半導体素子基板 32 配線基板 41 半導体素子基板 42 絶縁層 43 メタル配線 51 実装基板 61 固体撮像素子 62 半導体素子基板 1 Semiconductor Substrate 2 Semiconductor Element Forming Part 3 First Metal Wiring 4 Insulating Layer 5 Second Metal Wiring 6 Semiconductor Element Substrate 7 Chip Component 11 Package Lead 12 Package 13 Solid-state Image Sensor 14 Wire 15 Optical Component 16 Sealing Resin 17 Solid Image sensor part 21 Relay substrate 22 Solder 23 External signal line 31 Semiconductor device substrate 32 Wiring substrate 41 Semiconductor device substrate 42 Insulating layer 43 Metal wiring 51 Mounting substrate 61 Solid-state image sensor 62 Semiconductor device substrate

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】 半導体基板に半導体素子を一体的に形成
し且つメタル配線部を備えた半導体素子基板と固体撮像
素子とを有し、前記半導体素子基板のメタル配線部に、
固体撮像素子,チップ部品及び外部信号線を直接接続し
たことを特徴とする撮像装置。
1. A semiconductor element substrate having a semiconductor element integrally formed on a semiconductor substrate and having a metal wiring portion, and a solid-state image pickup element, wherein the metal wiring portion of the semiconductor element substrate has:
An image pickup device characterized in that a solid-state image pickup element, a chip component, and an external signal line are directly connected.
【請求項2】 半導体基板に固体撮像素子及び半導体素
子を一体的に形成し且つメタル配線部を備えた半導体素
子基板を有し、該半導体素子基板のメタル配線部に、チ
ップ部品及び外部信号線を直接接続したことを特徴とす
る撮像装置。
2. A semiconductor element substrate having a solid-state imaging device and a semiconductor element integrally formed on a semiconductor substrate and having a metal wiring portion, wherein the metal wiring portion of the semiconductor element substrate has a chip component and an external signal line. An image pickup device characterized by being directly connected to.
【請求項3】 前記半導体素子基板の裏面に、別個の配
線基板を接着したことを特徴とする請求項1又は2記載
の撮像装置。
3. The image pickup device according to claim 1, wherein a separate wiring board is bonded to the back surface of the semiconductor element substrate.
【請求項4】 前記半導体素子基板の裏面に、絶縁層及
びメタル配線部を設け、且つ前記絶縁層及びメタル配線
部を設けた半導体素子基板にスルーホールを形成し両面
基板状としたことを特徴とする請求項1又は2記載の撮
像装置。
4. An insulating layer and a metal wiring portion are provided on the back surface of the semiconductor element substrate, and a through hole is formed in the semiconductor element substrate provided with the insulating layer and the metal wiring portion to form a double-sided substrate. The imaging device according to claim 1 or 2.
【請求項5】 前記半導体素子基板は撮像装置に対する
入射光方向に対して平行になるように配置されているこ
とを特徴とする請求項1〜4のいずれか1項に記載の撮
像装置。
5. The image pickup device according to claim 1, wherein the semiconductor element substrate is arranged so as to be parallel to an incident light direction with respect to the image pickup device.
JP5314021A 1993-11-22 1993-11-22 Image sensing device Pending JPH07142690A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5314021A JPH07142690A (en) 1993-11-22 1993-11-22 Image sensing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5314021A JPH07142690A (en) 1993-11-22 1993-11-22 Image sensing device

Publications (1)

Publication Number Publication Date
JPH07142690A true JPH07142690A (en) 1995-06-02

Family

ID=18048255

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5314021A Pending JPH07142690A (en) 1993-11-22 1993-11-22 Image sensing device

Country Status (1)

Country Link
JP (1) JPH07142690A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2013150813A1 (en) * 2012-04-05 2013-10-10 オリンパス株式会社 Image pickup module

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2013150813A1 (en) * 2012-04-05 2013-10-10 オリンパス株式会社 Image pickup module
JP2013219468A (en) * 2012-04-05 2013-10-24 Olympus Corp Image pickup module
US9520434B2 (en) 2012-04-05 2016-12-13 Olympus Corporation Image pickup module

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