JPH07142639A - Substrate for semiconductor device - Google Patents

Abstract

PURPOSE:To prevent the separation of solder by a method wherein grooves for sectioning power parts and control parts on one sheet of a substrate are formed in the substrate. CONSTITUTION:AIN powder, Al2O3 powder, BeO powder, Y2O3 powder, SiO2 powder and MgO powder are blended as raw powder, an organic binder is added to this blend to form a green sheet by a doctor blade method, and grooves 4 are formed in the sheet by a mold press. Then, after degreased, the sheet is sintered. This ceramic sheet has a size of 50mmX50mmX0.8mm and divided by a longitudinal groove of a width of 0.2mm X a depth of 0.4mm and two similar transverse grooves, which define a power section 1a and a control section 1b. The ceramic sheet, with its reverse side metallized with Ag-20wt.%Pd alloy, is attached to a 52mmX52mmX1mm copper heat sink 2 with Sn-37wt.%Pd solder 3. This perfectly prevents the separation of the solder.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device substrate having a power circuit section.

[0002]

2. Description of the Related Art Conventionally, as a substrate for a semiconductor device having a power circuit portion, for example, Japanese Patent Laid-Open Nos. 04-15185 and 04-1 are available.
Those described in 12560 are known. This conventional substrate has a power unit 1a as shown in a plan view and a front view of FIG.
The circuit of the control unit 1b is completely divided, and the structure is such that the heat sink 2 is joined with the solder 3 in order to efficiently dissipate heat.

[0003]

However, although the heat generation density of the power portion tends to increase with the recent miniaturization and higher density of semiconductor devices, in the above-mentioned conventional substrate, the heat generation of the power portion causes soldering. At present, the layers are subjected to high temperature aging and temperature cycling, which causes solder peeling.

[0004]

Therefore, the inventors of the present invention conducted research to develop a substrate for a semiconductor device in which the power portion does not have solder peeling from the above viewpoints, and as a result, the power portion and the control portion have been changed to the conventional technique. If it is formed by forming a groove on one board without continuous separation, and the lower part of the board has a continuous structure, soldering is not performed on the entire bottom surface of the board. Since it is performed over a long period of time, even if the power part generates a high amount of heat, there is no peeling due to the entire surface soldering.

[0005]

EXAMPLES Next, the semiconductor device substrate of the present invention will be specifically described by way of examples. 1 as raw material powder
AlN powder having an average particle size in the range of ~ 3 μm, Al2
O3 powder, BeO powder, Y2O3 powder, SiO2 powder, Mg
O powder was blended to the blending composition shown in Table 1, an organic binder was added to this, a green sheet was formed with a doctor blade, grooves were formed by a die press, and then degreasing was performed at 1800 ° C. for 3 hours. By sintering in air or N2 atmosphere, the shape shown in the plan view and front view in Fig. 1 and the dimensions of plane 50mm □ × thickness 0.8mm have the width of 0.2mm × depth in one ceramic. The power portion 1a and the control portion 1b were formed by partitioning one vertical groove and one horizontal groove with a thickness of 0.4 mm, and substrates 1 to 3 for semiconductor devices of the present invention (hereinafter referred to as substrates of the present invention) 1 to 3 were manufactured. Then, in a state where a metallized layer of Ag-20 wt% Pd alloy was formed on the joint surfaces of the present inventions 1 to 3, Sn-37 wt% Pb alloy solder material 3 was used and a dimension of a plane 52 mm □ × thickness 1 mm was obtained. The semiconductor materials 1 to 3 of the present invention were formed by joining them on the copper heat sink 2.

For comparison purposes, as shown in FIG. 2, six substrate members having dimensions of 24 mm × 15 mm in plane and 0.8 mm in thickness and having the composition shown in Table 1 are prepared.
Conventional semiconductor materials 1 to 3 were manufactured under the same conditions except that these substrate members were arranged at a width of 0.4 mm.

Various semiconductor materials 100 obtained as a result
About 30 minutes at -40 ° C, 30 minutes at 125 ° C,
A temperature cycle test was conducted 1000 times at 40 ° C. for 30 minutes as one cycle, and the number of peeled solders after the test was examined. The results are shown in Table 1.

[0008]

[Table 1]

[0009]

EFFECTS OF THE INVENTION In the conventional semiconductor materials 1 to 3, the solder peeling of the substrate is remarkable, whereas in the semiconductor materials 1 to 3 of the present invention, no peeling occurs due to the excellent solder bondability of the substrates 1 to 3 of the present invention. It is clear that The semiconductor substrate of the present invention is extremely excellent in solder bondability to the heat sink, and therefore has industrially useful characteristics such as effectively releasing heat from the power section and preventing heat from flowing into the control section. Of.

[Brief description of drawings]

FIG. 1 is a plan view and a front view of semiconductor materials 1 to 3 using a substrate of the present invention.

FIG. 2 is a plan view and a front view of conventional semiconductor materials 1 to 3.

[Explanation of symbols]

 1 Substrate 1a Power part 1b Control part 2 Heat sink 3 Solder 4 Groove

Claims (1)

[Claims] 1. A substrate for a semiconductor device, in which a groove for partitioning a power section and a control section is formed on one board without solder peeling.