JPS60173900A - Ceramic circuit board - Google Patents
Ceramic circuit boardInfo
- Publication number
- JPS60173900A JPS60173900A JP3003184A JP3003184A JPS60173900A JP S60173900 A JPS60173900 A JP S60173900A JP 3003184 A JP3003184 A JP 3003184A JP 3003184 A JP3003184 A JP 3003184A JP S60173900 A JPS60173900 A JP S60173900A
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- copper
- ceramic
- board
- copper circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Laminated Bodies (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
し発明の技術分野」
本発明はセラミックス基板上に銅回路板を接合させてな
るセラミックス回路基板に関する。DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention relates to a ceramic circuit board formed by bonding a copper circuit board onto a ceramic substrate.
[発明の技術的背領]
最近、パワー1ヘランジスタ−しシコール用基板やスイ
ッチング電源モジトル用基板新の回路基板 □としC,
レラミッソス基(長上に6111根等の金属板を接合さ
けたしのか用いられ−Cいる。[Technical betrayal of the invention] Recently, new circuit boards such as power 1 transistor circuit boards and switching power module boards have been developed.
A metal plate such as a 6111 root is bonded to the top of the Reramissos base (-C).
従来から、このJ、うなレラミックス回路jJ板を製造
するに(ま、レラミックス基板の表面に七す−ノデンペ
ースト1を塗イIJ、焼結しCメタライズし、その上に
金属様をろう付けにより接合さけるプj法が行4fわれ
でいたが、近年所定形状に1]ら抜D1れた銅回路(k
をセラミックス基(長上に接触前1凸゛さU(加熱し、
1接、セラミックス)、L板と6111回路(及とを加
熱接合ざUる方法が採られるJ、う【こなつCきCいる
。Traditionally, in order to manufacture this JJ board, the surface of the Reramix board is coated with 7-noden paste 1, then sintered and C metallized, and a metal layer is applied on top of it. The copper circuit method, which avoids joining by brazing, has been used for a long time, but in recent years copper circuits (k
1 convexity U (heated,
1 contact (ceramics), L plate and 6111 circuit (and 6111 circuit) are heated and bonded.
[背鰭技術の問題貞]
しかし4Tがら、このようにして製造されるしイレミッ
クス回路基板においては、銅回路板とセラミックス基板
どの密着性が必ずしもlc分℃゛なく1υ部的に接合さ
れず、銅回路板が凸状になることがある。このような銅
回路板上にはシリコンベレツ1〜智の電子部品を搭載す
ることが困薦〔C゛あったり、搭載CきCし部品か傾斜
したり、特性を1員うというような問題かあった。[Problems with dorsal fin technology] However, in 4T, which is manufactured in this way, the adhesion between the copper circuit board and the ceramic board is not necessarily 1υ, and the adhesion between the copper circuit board and the ceramic board is not necessarily 1υ. Copper circuit boards may become convex. It is not recommended to mount electronic components of silicon level 1 to 1 on such a copper circuit board. there were.
[発明の目的1
本発明者らはこのような問題を解決ヅベく研究を進めた
結果、接合された銅回路板の少なくとも部品(i桟部に
+5りる凸面の高さが50〜80μmど大きいことが原
因の1つであり、凸面の高さを30μm1以下とした場
合には密着性や部品搭載作業性が大幅に改良されること
を見い出した。[Objective of the Invention 1] As a result of thorough research by the present inventors to solve such problems, we found that at least the parts of the bonded copper circuit board (the height of the convex surface of One of the reasons is that the height of the convex surface is 30 μm or less, and it has been found that adhesion and component mounting workability are significantly improved when the height of the convex surface is set to 30 μm or less.
本発明はこのような知見に基づいてなされたもので・、
銅回路板のセラミックス基板への密着性を向上させ、ま
た部品1ハ載を畜希に<行なうことのiJ能な耐電圧特
性や熱り文数性の改良されたセラミックス回路基板を提
供することを目的と゛りる。The present invention was made based on such knowledge.
To provide a ceramic circuit board which improves the adhesion of a copper circuit board to a ceramic board, and has improved withstand voltage characteristics and thermal resistance, which enables the mounting of parts on a single board with ease. The purpose is to
[発明の(1λ要1
すなわら本発明のセラミックス回路基板は、レラミック
ス基椴上に、所定形状の銅回路板を接触配置し加熱接合
ざtICなるセラミックス回路基板であって、この銅回
路板の少なくども部品搭載部に+3ける凸面の高さが3
0 a m以下であることを1、’+ i賀とづる。[Invention (1λ Essential 1) In other words, the ceramic circuit board of the present invention is a ceramic circuit board in which a copper circuit board of a predetermined shape is placed in contact with a Reramix substrate and heat-bonded. The height of the convex surface of the board at least in the parts mounting area is +3
0 am or less is written as 1,'+i ga.
本発明に使用りるレラミックス阜檄としくは、アルミ犬
、酸化クイ系省の酸化物系のけラミックス、113J、
ひ窒素アルミニウム、窒化クイ素、゛塾生ヂタン、灰化
ケイ素等の非酸化物系のセラミックス等からなる板状体
が挙げられる。非酸化物系のセラミックス基板を使用す
る場合には、予め表面を酸化処理してから使用すること
が望ましい。The Reramix Fuyoshi used in the present invention includes aluminum dogs, oxide Kui-based oxide-based Nokeramix, 113J,
Examples include plate-shaped bodies made of non-oxide ceramics such as aluminum dinitrogen, silicon nitride, ditanium nitride, and silicon ash. When using a non-oxide ceramic substrate, it is desirable to oxidize the surface beforehand.
なお、本発明においC凸面の高さとは基板を水平面に配
置したどきの銅回路板表面両側縁を結ぶ線から最高位置
までの高さをいう。In the present invention, the height of the C convex surface refers to the height from the line connecting both sides of the surface of the copper circuit board to the highest position when the board is placed on a horizontal surface.
本発明に使用づる銅回路板を成形づるための銅手反とし
−C(ま、タフピッチ銅のようなr山男;を100−3
000 ppmの割合C′含有リする銅を汁延しでなる
ものが適しCd5つ、必要に応じ゛C通常の無IM2
X/。The copper material used for forming the copper circuit board used in the present invention is 100-3.
000 ppm of copper containing C' is suitable.
X/.
銅板に予め酸化処理を施したしのを用いることし′c′
きる。Use a copper plate that has been oxidized in advance.
Wear.
なお、この銅回路板の厚さは0.03〜1.0陥、好ま
しくは0.1〜0.5鉗であることが好ましい。この範
囲のものは、セラミックスへの接合後、凹凸面を牛ザる
ことか少ない。The thickness of this copper circuit board is preferably 0.03 to 1.0 mm, preferably 0.1 to 0.5 mm. Products in this range rarely rub against uneven surfaces after bonding to ceramics.
この11((回路板はヒラミックス阜4ル上にIM触配
置された状態C,鋼の)、jl!点(1083°C)以
下で銅−醸化111の共晶2:u!反(1065°C)
以上の温度に加熱され−(接合8れる。な+3、i’F
d回路板のセラミックス基板への18合而面(ま95%
以上どりることが好ましい。95%以」−の場合に、充
分な熱放散性が1F1られる。This 11 ((Circuit board is placed IM on the Hiramix steel), below the jl! point (1083°C), the eutectic 2:u! anti( 1065°C)
It is heated to a temperature above - (joint 8 is formed. +3, i'F
d circuit board to ceramic substrate 18 joint surface (95%
The above is preferable. 95% or more, sufficient heat dissipation is achieved.
な+5、本発明に、13いCはセラミックス基板の下面
に銅板から1−]抜加工されたセラミックス基板と(ン
1.ば等しい大きざの銅板が加熱接合された4tう造に
りることが望ましい。このように(1へ成した場合には
、下面に接合された銅板により反りの小さい放熱性の良
好なセラミックス回路基板が賀られる。5. In the present invention, 13C is a 4t ridged structure in which a copper plate of the same size is heat-bonded to the bottom surface of a ceramic substrate. In this way (1), a ceramic circuit board with good heat dissipation with little warpage due to the copper plate bonded to the lower surface can be obtained.
また加熱接合の際の雰囲気は酸素を含有J−る銅回路板
を接合りる場合には窒素雰囲気等の非酸化竹零囲気どり
る。酸素を含まない銅回路(及を使用する場合には1i
112索ωを適正にコントロールした酸化性雰囲気どす
る。The atmosphere during heat bonding is a non-oxidizing bamboo atmosphere such as a nitrogen atmosphere when bonding oxygen-containing copper circuit boards. Oxygen-free copper circuit (1i if using
An oxidizing atmosphere in which the 112 strands ω is appropriately controlled.
以上のにうにして得られるセラミックス回路基(ル(,
12,11・4回路板のロフミックス厚くjノl\の花
i (+7 +′lか]、、!<、人曲凹凸の少ないも
のと4fり熱放散ill ily J、び耐電圧fi1
’J−等の電気的Q!j竹にIQれ(いる。d、た、電
子部品の+7−x載も密層J、く行なうことか川面とイ
「る。The ceramic circuit board obtained as described above (
12, 11, 4 circuit board Rof mix thick j nol \ flower i (+7 +'l?),,!
'J- etc. electrical Q! There is an IQ in bamboo. d, It is said that the +7-x mounting of electronic components is also carried out in a very dense manner.
]発明の実施例] 次に本発明の実施例についで記載する。]Examples of the invention] Next, examples of the present invention will be described.
実施例
クフビッヂ゛rFi解銅かjうなる11ノさく、) 、
30 +1mの汁延銅板を川怠し、この銅板から所定
形状の銅回路(ルを」」抜いた。Example Kufubidji rFi copper melting 11 nozzles),
A 30+1 m hot-rolled copper plate was drained, and a copper circuit of a predetermined shape was extracted from this copper plate.
これを、アルミナを主成分(96%他に4%の焼結助剤
を含む)とする厚さ0.7IlllNのセラミックス基
板の上面に接触配置させ、窒素雰囲気中−(1075℃
の温度に30分間加熱しC接合さUた。This was placed in contact with the upper surface of a ceramic substrate with a thickness of 0.7 IllN whose main component was alumina (96% and 4% of sintering aid) in a nitrogen atmosphere at - (1075°C).
It was heated to a temperature of 30 minutes to form a C-joint.
こうして1;lられだしラミックス回路基板は、411
1回路板の表面が局部的に凸面を生じCいるものも+5
つたか、この高さが30 a m以下の−6のは、ビラ
ミックス基板と銅回路板との密着性に優れて+5す、熱
放散性や耐電圧特性も良好であった。また、銅回路板へ
のシリ−1ンベツトの搭載状態は良好な密層性を右しか
つ、搭載作業し能率よく行なうことが Cさ lこ 。In this way, the 1;l lamic circuit board is 411
1 If the surface of the circuit board has a locally convex surface, +5
In fact, when the height was 30 am or less, the -6 was excellent in adhesion between the Viramix board and the copper circuit board, which was +5, and the heat dissipation and withstand voltage characteristics were also good. In addition, the mounting condition of the Series 1 board on the copper circuit board requires good layer density and efficient mounting work.
[発明の効果1
以上M2明したように本発明のレラミックス回路阜板は
、密層性や熱放散性、電気特性に優れ、また部品Jハ載
も(…斜なく良好に行なうことが可能である。[Effect of the invention 1 As explained above, the Relamix circuit board of the present invention has excellent layer density, heat dissipation properties, and electrical properties, and can also be mounted on parts J well (... without slanting). It is.
代理人弁理十 須 山 佐 −Attorney 10 Su Yamasa -
Claims (2)
接触配置し加熱接合させてなるセラミックス回路基板で
あっC1この接合された銅回路板の少なくとも部品搭載
部にお(ブる凸面の高さが30 u01以下であること
を特徴とづるロラミックス回路基板。(1) A ceramic circuit board made by placing a copper circuit board of a predetermined shape in contact with a ceramic board and heat-bonding it. A Lolamix circuit board characterized by a height of 30 u01 or less.
%以上C′ある特h′[:11′I求の範囲第1項記載
のセラミックス回路基板。 く3)銅回路板(よ即さか0.03〜1.0浦1)1で
ある特許請求の範囲第1項または第2項記載のしラミッ
クス回路阜板。(2) The bonding area of the copper circuit board and the ceramic substrate is 95
The ceramic circuit board according to item 1, wherein the desired range is % or more C'. 3) The ceramic circuit board according to claim 1 or 2, which is a copper circuit board (width: 0.03 to 1.0 mm).
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3003184A JPS60173900A (en) | 1984-02-20 | 1984-02-20 | Ceramic circuit board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3003184A JPS60173900A (en) | 1984-02-20 | 1984-02-20 | Ceramic circuit board |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS60173900A true JPS60173900A (en) | 1985-09-07 |
Family
ID=12292446
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3003184A Pending JPS60173900A (en) | 1984-02-20 | 1984-02-20 | Ceramic circuit board |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60173900A (en) |
Cited By (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6271295A (en) * | 1985-09-24 | 1987-04-01 | 日本電気株式会社 | Multilayer ceramic circuit substrate |
JPS6271294A (en) * | 1985-09-24 | 1987-04-01 | 日本電気株式会社 | Multilayer ceramic circuit substrate |
JPS6273796A (en) * | 1985-09-27 | 1987-04-04 | 日本電気株式会社 | Multilayer ceramic circuit substrate |
JPS6273800A (en) * | 1985-09-27 | 1987-04-04 | 日本電気株式会社 | Multilayer ceramic circuit substrate |
JPS6273797A (en) * | 1985-09-27 | 1987-04-04 | 日本電気株式会社 | Multilayer ceramic circuit substrate |
JPS6273798A (en) * | 1985-09-27 | 1987-04-04 | 日本電気株式会社 | Multilayer ceramic circuit substrate |
JPS6276597A (en) * | 1985-09-27 | 1987-04-08 | 日本電気株式会社 | Multilayer ceramic circuit substrate |
JPS6276591A (en) * | 1985-09-27 | 1987-04-08 | 日本電気株式会社 | Multilayer ceramic circuit substrate |
JPS6276590A (en) * | 1985-09-27 | 1987-04-08 | 日本電気株式会社 | Multilayer ceramic circuit substrate |
JPS6276589A (en) * | 1985-09-27 | 1987-04-08 | 日本電気株式会社 | Multilayer ceramic circuit substrate |
JPS6276596A (en) * | 1985-09-27 | 1987-04-08 | 日本電気株式会社 | Multilayer ceramic circuit substrate |
JPS6276595A (en) * | 1985-09-27 | 1987-04-08 | 日本電気株式会社 | Multilayer ceramic circuit substrate |
JPS6284595A (en) * | 1985-10-08 | 1987-04-18 | 日本電気株式会社 | Multilayer ceramic wiring substrate |
JPH01241193A (en) * | 1988-03-23 | 1989-09-26 | Toshiba Corp | Ceramic substrate |
JPH01272183A (en) * | 1988-04-25 | 1989-10-31 | Toshiba Corp | Ceramics circuit board |
JPH01304797A (en) * | 1988-06-01 | 1989-12-08 | Nec Corp | Aluminum nitride multilayer interconnection substrate and manufacture of it |
JP2002252433A (en) * | 2001-02-23 | 2002-09-06 | Dowa Mining Co Ltd | Ceramic circuit board and its manufacturing method |
-
1984
- 1984-02-20 JP JP3003184A patent/JPS60173900A/en active Pending
Cited By (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0413879B2 (en) * | 1985-09-24 | 1992-03-11 | Nippon Electric Co | |
JPS6271294A (en) * | 1985-09-24 | 1987-04-01 | 日本電気株式会社 | Multilayer ceramic circuit substrate |
JPS6271295A (en) * | 1985-09-24 | 1987-04-01 | 日本電気株式会社 | Multilayer ceramic circuit substrate |
JPH0415638B2 (en) * | 1985-09-27 | 1992-03-18 | Nippon Electric Co | |
JPH0415640B2 (en) * | 1985-09-27 | 1992-03-18 | Nippon Electric Co | |
JPS6273798A (en) * | 1985-09-27 | 1987-04-04 | 日本電気株式会社 | Multilayer ceramic circuit substrate |
JPS6276597A (en) * | 1985-09-27 | 1987-04-08 | 日本電気株式会社 | Multilayer ceramic circuit substrate |
JPS6276591A (en) * | 1985-09-27 | 1987-04-08 | 日本電気株式会社 | Multilayer ceramic circuit substrate |
JPS6276590A (en) * | 1985-09-27 | 1987-04-08 | 日本電気株式会社 | Multilayer ceramic circuit substrate |
JPS6276589A (en) * | 1985-09-27 | 1987-04-08 | 日本電気株式会社 | Multilayer ceramic circuit substrate |
JPS6276596A (en) * | 1985-09-27 | 1987-04-08 | 日本電気株式会社 | Multilayer ceramic circuit substrate |
JPS6276595A (en) * | 1985-09-27 | 1987-04-08 | 日本電気株式会社 | Multilayer ceramic circuit substrate |
JPH0443439B2 (en) * | 1985-09-27 | 1992-07-16 | Nippon Electric Co | |
JPH0443440B2 (en) * | 1985-09-27 | 1992-07-16 | Nippon Electric Co | |
JPH0415637B2 (en) * | 1985-09-27 | 1992-03-18 | Nippon Electric Co | |
JPS6273797A (en) * | 1985-09-27 | 1987-04-04 | 日本電気株式会社 | Multilayer ceramic circuit substrate |
JPS6273800A (en) * | 1985-09-27 | 1987-04-04 | 日本電気株式会社 | Multilayer ceramic circuit substrate |
JPH0415639B2 (en) * | 1985-09-27 | 1992-03-18 | Nippon Electric Co | |
JPS6273796A (en) * | 1985-09-27 | 1987-04-04 | 日本電気株式会社 | Multilayer ceramic circuit substrate |
JPS6284595A (en) * | 1985-10-08 | 1987-04-18 | 日本電気株式会社 | Multilayer ceramic wiring substrate |
JPH0445997B2 (en) * | 1985-10-08 | 1992-07-28 | Nippon Electric Co | |
JPH01241193A (en) * | 1988-03-23 | 1989-09-26 | Toshiba Corp | Ceramic substrate |
JPH01272183A (en) * | 1988-04-25 | 1989-10-31 | Toshiba Corp | Ceramics circuit board |
JPH01304797A (en) * | 1988-06-01 | 1989-12-08 | Nec Corp | Aluminum nitride multilayer interconnection substrate and manufacture of it |
JP2002252433A (en) * | 2001-02-23 | 2002-09-06 | Dowa Mining Co Ltd | Ceramic circuit board and its manufacturing method |
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