JPH07135381A - Electronic device mounting board - Google Patents

Electronic device mounting board

Info

Publication number
JPH07135381A
JPH07135381A JP5281103A JP28110393A JPH07135381A JP H07135381 A JPH07135381 A JP H07135381A JP 5281103 A JP5281103 A JP 5281103A JP 28110393 A JP28110393 A JP 28110393A JP H07135381 A JPH07135381 A JP H07135381A
Authority
JP
Japan
Prior art keywords
board
electronic component
component mounting
metal plate
lead
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5281103A
Other languages
Japanese (ja)
Inventor
Seiichi Takahashi
清一 高橋
Kunihiro Nagamine
邦浩 永峰
Kyoichi Ishigaki
恭市 石垣
Tatsumi Hoshino
巽 星野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsui Toatsu Chemicals Inc
Original Assignee
Mitsui Toatsu Chemicals Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsui Toatsu Chemicals Inc filed Critical Mitsui Toatsu Chemicals Inc
Priority to JP5281103A priority Critical patent/JPH07135381A/en
Publication of JPH07135381A publication Critical patent/JPH07135381A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Abstract

PURPOSE:To sustain strength against stress being applied from above by making an opening for mounting an electronic device in the center of a board through restriction and bending the circuit board inward into leg-shape, at a plurality of end parts, and coupling with another circuit board. CONSTITUTION:A board 100 is provided in the center with an opening 101 through restriction and an electronic device is set therein. A conductor layer extending radially from the periphery of the opening 101 toward four sides of the board is then formed on a metal plate 103 through an insulating layer 104. A lead part 105 is provided by bending at the end part of the board in order to conduct electrically with another printed board. This structure provides the electronic device mounting board with sufficient strength stably.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、電子部品の実装に用い
られる回路印刷基板に関し、特に、金属ベース基板を用
いた電子部品搭載用基板に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed circuit board used for mounting electronic parts, and more particularly to a board for mounting electronic parts using a metal base board.

【0002】[0002]

【従来の技術】電子回路が搭載される電子機器の、軽薄
短小化やその動作速度の高速化に伴って、電子回路事態
の高密度実装化や高速動作化が進んでいる。高速動作を
行うと一般には消費電力が増加して電子部品の発熱量が
増すことから、これら高速動作で用いる電子部品の実装
には放熱性を考慮した構造が必要である。
2. Description of the Related Art Along with the miniaturization, reduction in size, and increase in operating speed of electronic equipment in which an electronic circuit is mounted, high-density mounting and high-speed operation of the electronic circuit situation are progressing. Since high-speed operation generally increases power consumption and increases the amount of heat generated by electronic components, mounting of these electronic components used for high-speed operation requires a structure that takes heat dissipation into consideration.

【0003】また電子部品が搭載されている従来のパッ
ケージとしては、代表的なものとしてQFP、DIP等
が知られているが、これらに用いられる電子部品搭載用
のフレームとしてリードフレームが利用されている。近
年電子部品の多ピン化が進み、これらの多ピン電子部品
を搭載するリードフレームでは、インナーリード、アウ
ターリードの狭ピッチ化が必要になっている。しかしな
がら、リードフレームの場合、アウターリードは個々に
パッケージ外部に突出した形態であることから、位置精
度確保には限界がある。またアウターリードが細くなる
ことによって、コプラナリティの安定性、及び強度的に
低下することからリードの曲がり等に大きな問題があっ
た。またインナーリードも個々に独立して形成されるた
めに強度的に問題があり、狭ピッチ化には限界があり、
パッケージの小型化の妨げにもなっている。
As a conventional package in which electronic parts are mounted, QFP, DIP, etc. are known as typical ones. A lead frame is used as a frame for mounting electronic parts used in these packages. There is. In recent years, the number of pins of electronic parts has increased, and in lead frames mounting these multi-pin electronic parts, it is necessary to narrow the pitch of inner leads and outer leads. However, in the case of the lead frame, since the outer leads are individually projected to the outside of the package, there is a limit in securing the positional accuracy. Further, since the outer lead becomes thin, the stability of coplanarity and the decrease in strength are caused, so that there is a big problem in bending of the lead. In addition, since the inner leads are also formed individually, there is a problem in strength, and there is a limit to narrowing the pitch.
It also hinders the miniaturization of packages.

【0004】これらの問題に対して本発明者らは、特願
平5−134728号において、新しい構造の電子部品
搭載用の基板を提案している。この構造体はリードにな
る配線部をワイヤボンデング技術たるPWB技術で形成
することから、狭ピッチのリードの形成は容易で、且つ
背面を絶縁層を介して金属の板でサポートしているため
に、リードの曲がりや所謂コプラナリティの問題を大き
く改善することができる。また電子部品から発生する熱
も、効率的に金属板から放熱され高速用途の電子部品搭
載基板としても有効であり、パッケージの小型化も可能
である。
To solve these problems, the inventors of the present invention have proposed a board for mounting electronic components having a new structure in Japanese Patent Application No. 5-134728. In this structure, since the wiring portion to be the lead is formed by the PWB technique which is the wire bonding technique, it is easy to form the narrow pitch lead and the back surface is supported by the metal plate through the insulating layer. In addition, the problem of lead bending and so-called coplanarity can be greatly improved. Further, the heat generated from the electronic components is also efficiently radiated from the metal plate, which is effective as an electronic component mounting board for high-speed use, and the package can be downsized.

【0005】[0005]

【発明が解決しようとする課題】上述した、特願平5−
134728号提案の電子回路パッケージでは、配線導
体を絶縁層を介し金属板でサポートした構造を、金型を
用いて、絞り、曲げ加工を行い、周辺部に他の回路基板
と接続されるリードを配した構造である。この電子回路
パッケージは電子部品を搭載後、金属板側を外に向けた
形で他の基板に搭載され、キャビティダウン構造で使用
される。しかして、前述のように、背面に金属板が配置
されるために、効率的な放熱、コプラナリティに対して
有効であるが、おしむらくは、構造的に上部からかかる
応力に対して弱いという問題点がある。上部から応力が
かかると、支えられる点が外周部のリード部だけであ
り、リード部の変形が発生したり、板厚みが薄いときは
金属部にへこみが発生する。通常他の回路基板にこのよ
うな電子回路パッケージを搭載する方法としては、マウ
ンターを用いて位置認識を行いながらハンダペーストを
印刷したパット部に搭載されるが、この時に上部より応
力がかかり、前述の問題が発生する可能性があり、信頼
性と精度が要求される電子部品搭載用基板としては必ず
しも十分ではない場合がある。
DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention
In the electronic circuit package proposed by No. 134728, a structure in which a wiring conductor is supported by a metal plate through an insulating layer is subjected to drawing and bending using a die, and leads connected to other circuit boards are provided in the peripheral portion. The structure is arranged. This electronic circuit package is mounted on another substrate with the metal plate side facing outward after mounting electronic components, and is used in a cavity down structure. As described above, since the metal plate is arranged on the back surface, it is effective for efficient heat dissipation and coplanarity, but the problem is that it is structurally weak against stress applied from above. is there. When stress is applied from the upper part, only the outer peripheral lead portion is supported, and the lead portion is deformed or the metal portion is dented when the plate thickness is thin. Usually, as a method of mounting such an electronic circuit package on another circuit board, it is mounted on a pad portion on which a solder paste is printed while recognizing the position using a mounter. There is a possibility that the above problem may occur, and it may not always be sufficient as a board for mounting electronic parts that requires reliability and accuracy.

【0006】以上の問題点を鑑み、本発明の目的は電子
部品搭載用基板として、放熱性やコプラナリティに対す
る効果を維持しつつ、さらに、構造的に上部からかかる
応力に対して強度を持ち、更に信頼性の高い電子部品搭
載用基板を提供することにある。
In view of the above problems, an object of the present invention is to provide a substrate for mounting electronic parts while maintaining its effect on heat dissipation and coplanarity, and further structurally having strength against stress applied from above, It is to provide a highly reliable electronic component mounting substrate.

【0007】[0007]

【課題を解決するための手段】本発明者らは、上記の問
題点を解決するために、基材構成としては大きい改良を
必要とせずに、放熱性、コプラナリティの安定性を維持
しつつ、さらに信頼性の高い電子部品搭載用基板として
形状の検討を鋭意行い、本発明に到達した。
In order to solve the above-mentioned problems, the inventors of the present invention have not required a great improvement in the structure of the base material, while maintaining the heat dissipation and the stability of coplanarity, The present invention has been accomplished by earnestly studying the shape of a substrate for mounting electronic parts with higher reliability.

【0008】すなわち、本発明は、銅箔と金属板とが、
絶縁層を介して積層されている金属ベース基板を用い
て、銅箔面を回路加工を行って得られた金属ベース回路
基板において、基板の中央部に電子部品搭載部を絞り加
工を行って開口形状に形成し、且つ該回路基板の複数の
端部を、該回路加工面が下に向くよう内側に脚状に曲げ
加工を行うと共に、該複数の曲げ部にあるリード状に形
成された複数の導体部を用いて、他の回路基板との接続
を行いうるようにしたことを特徴とする電子部品搭載用
基板であり、また該該複数の曲げ部に形成されている複
数のリード状導体部先端を、金属基板の最端部より50
μm以上離して形成した電子部品搭載用基板であり、ま
た金属板と銅箔を絶縁する層として,少なくとも伸び率
が30%以上の熱可塑性ポリイミドを用いた電子部品搭
載用基板を要旨とするものである。
That is, according to the present invention, the copper foil and the metal plate are
In the metal base circuit board obtained by performing circuit processing on the copper foil surface using the metal base board laminated via the insulating layer, the electronic component mounting part is drawn at the center of the board and opened. And a plurality of end portions of the circuit board are bent inward so that the circuit processing surface faces downward, and a plurality of leads are formed in the plurality of bent portions. And a plurality of lead-shaped conductors formed in the plurality of bent portions. The electronic component mounting board is characterized in that the conductor portion is used to connect to another circuit board. 50 mm from the end of the metal substrate
A board for mounting electronic parts which is separated from each other by μm or more, and is a board for mounting electronic parts using a thermoplastic polyimide having an elongation of at least 30% or more as a layer for insulating a metal plate and a copper foil. Is.

【0009】以下、本発明を詳細に説明する。まず、添
付図面について説明するに、図1は、本発明の一実施例
の電子部品搭載用基板の断面図、図2はこの電子部品搭
載基板を他の配線基板に実装する状態を示す斜視図を示
し、図3は電子部品が搭載された状態を表す模式断面図
であり、図4は電子回路パッケージを樹脂封止した状態
を示す模式断面図であり、図5はフリップチップ構造で
電子部品が搭載された状態を示した模式断面図である。
ここで、100は電子部品搭載用基板、101は電子部
品搭載部、102は配線導体、103は金属板、104
は絶縁層、105はリード部、110は電子回路パッケ
ージ、111は電子部品、112はボンディングワイヤ
ー、113は他の印刷基板、114は封止樹脂を示す。
The present invention will be described in detail below. First, referring to the attached drawings, FIG. 1 is a cross-sectional view of an electronic component mounting board according to an embodiment of the present invention, and FIG. 2 is a perspective view showing a state in which the electronic component mounting board is mounted on another wiring board. 3 is a schematic cross-sectional view showing a state in which an electronic component is mounted, FIG. 4 is a schematic cross-sectional view showing a state in which an electronic circuit package is resin-sealed, and FIG. 5 is a flip-chip structure of the electronic component. FIG. 3 is a schematic cross-sectional view showing a state in which is mounted.
Here, 100 is an electronic component mounting substrate, 101 is an electronic component mounting portion, 102 is a wiring conductor, 103 is a metal plate, and 104.
Is an insulating layer, 105 is a lead portion, 110 is an electronic circuit package, 111 is an electronic component, 112 is a bonding wire, 113 is another printed board, and 114 is a sealing resin.

【0010】この電子部品搭載用基板は、他の回路印刷
基板に搭載される形状として、例えば図3に示すよう
に、所謂キャビティーアップ形状で搭載される。このと
きに、電子部品搭載部として基板中央部に絞り加工で形
成された部分と、基板端部に曲げ加工で形成されたリー
ド部との複数ケ所によって支えられることにより、上部
から応力がかかっても分散され、十分な強度を持つこと
ができるのである。
This electronic component mounting board is mounted in a so-called cavity-up shape as shown in FIG. 3, for example, as a shape to be mounted on another circuit printed board. At this time, stress is applied from the upper part by being supported by a plurality of parts, which are the electronic component mounting part formed by drawing in the center part of the substrate and the lead part formed by bending in the end part of the substrate. Can also be dispersed and have sufficient strength.

【0011】電子部品搭載用の基板として重要なコプラ
ナリティは、基板の周辺部曲げ加工によって形成された
リード部が、金属板にサポートされる構造には変わりが
ないため、十分に達成される。また、放熱性について
も、電子部品搭載場所として絞り加工された部所から金
属板を介して、この電子部品搭載用基板が搭載される他
の印刷基板に接することで放熱される。
Coplanarity, which is important as a substrate for mounting electronic components, is sufficiently achieved because the structure in which the lead portion formed by bending the peripheral portion of the substrate is supported by the metal plate remains unchanged. Regarding the heat dissipation, heat is also dissipated by coming into contact with another printed board on which this electronic component mounting board is mounted via a metal plate from a portion that has been drawn as an electronic component mounting location.

【0012】本発明の電子部品搭載用基板において、金
属板としては、厚さ0.05〜2.0mm程度の物が使
用されるが、好ましくは0.1〜1.0mm程度のアル
ミニウム、洋白やシンチュウ等の銅合金、銅、銅クラッ
ドインバー、ステンレス鋼、鉄、珪素鋼、電解酸化処理
されたアルミニウム等を用いることができる。金属板の
厚みがこれよりあまり薄くなると、最終の機械加工後に
面の平坦度が低下し、電子部品実装時にワイヤーボンデ
ィング性が低下したり、構造体の強度的にも弱くなり好
ましくない。またこれより余り金属板が厚くなった場
合、特に大きな問題はないが、金属板を使用することか
ら重量が無闇に増すことと、単純な曲げ加工には支障が
ないが、深絞りを行う場合機械加工が困難になってく
る。
In the electronic component mounting substrate of the present invention, a metal plate having a thickness of about 0.05 to 2.0 mm is used, but preferably aluminum having a thickness of about 0.1 to 1.0 mm. It is possible to use copper alloys such as white and cinnabar, copper, copper clad invar, stainless steel, iron, silicon steel, electrolytically oxidized aluminum, and the like. When the thickness of the metal plate is much smaller than this, the flatness of the surface is lowered after the final machining, the wire bondability is deteriorated at the time of mounting an electronic component, and the strength of the structure is weak, which is not preferable. Also, if the metal plate is thicker than this, there is no particular problem, but since the use of the metal plate unnecessarily increases the weight and there is no problem in simple bending, but when deep drawing is performed. Machining becomes difficult.

【0013】本発明に用いられる絶縁層としては、エポ
キシフェノール、ビスマレイミド等の熱硬化性樹脂、及
びポリアミドイミド、ポリスルフォン、ポリパラバン
酸、ポリフェニレンサルファイド等の熱可塑性樹脂、及
び熱可塑性ポリイミドの前駆体であるポリアミド酸ワニ
スを、加熱イミド化して得られるものも使用できる。あ
るいは耐熱性有機高分子フィルム、例えばポリイミド、
ポリアミドイミド、アラミド、ポリエーテルスルホン、
ポリエーテルエーテルケトン等の各フィルムの両面に、
熱可塑性ポリイミドの前駆体であるポリアミド酸ワニス
を、加熱イミド化して熱可塑性の接着層を形成せしめた
ものも使用できる。また、有機溶媒に可溶な熱可塑性ポ
リイミドの場合であれば、熱可塑性ワニスを上述のフィ
ルム形成方法と同様にキャスト、あるいはコート乾燥し
て得られるフィルム、または熱可塑性ポリイミドの押し
だし成形フィルムあるいはシートも使用できる。
The insulating layer used in the present invention includes thermosetting resins such as epoxyphenol and bismaleimide, thermoplastic resins such as polyamideimide, polysulfone, polyparabanic acid and polyphenylene sulfide, and precursors of thermoplastic polyimide. A polyamic acid varnish which is obtained by heating and imidizing the varnish can also be used. Alternatively, a heat resistant organic polymer film such as polyimide,
Polyamide imide, aramid, polyether sulfone,
On both sides of each film such as polyetheretherketone,
It is also possible to use a polyamic acid varnish that is a precursor of a thermoplastic polyimide, which has been subjected to thermal imidization to form a thermoplastic adhesive layer. Further, in the case of a thermoplastic polyimide soluble in an organic solvent, a thermoplastic varnish is cast in the same manner as the above film forming method, or a film obtained by coating and drying, or an extrusion molded film or sheet of a thermoplastic polyimide. Can also be used.

【0014】さらには、使用する金属板及びあるいは、
導体層形成に用いる銅箔の裏面に、ポリイミド酸ワニ
ス、あるいは熱可塑性ポリイミドを塗布し乾燥し、積層
させてもかまわない。さらに、前述の絶縁層材料を組み
合わせて用いることも可能である。更に放熱性を向上さ
せる目的で、曲げ等の機械加工性を阻害しない範囲で、
前記絶縁層に無機フィラーを加えても構わない。これら
フィラーとしては、アルミナ、シリカ、炭化珪素、窒化
アルミニウム、窒化ホウ素等が挙げられる。
Further, the metal plate used and / or
A polyimide acid varnish or a thermoplastic polyimide may be applied to the back surface of the copper foil used for forming the conductor layer, dried, and laminated. Furthermore, it is also possible to use the above-mentioned insulating layer materials in combination. For the purpose of further improving heat dissipation, within a range that does not impair mechanical workability such as bending,
An inorganic filler may be added to the insulating layer. Examples of these fillers include alumina, silica, silicon carbide, aluminum nitride, boron nitride and the like.

【0015】本発明に使用する絶縁層としては、JIS
−C2318法によって測定される、破断時の伸び率が
30%以上あるものが最適である。伸び率が30%未満
の場合は、曲げ、絞り等の機械加工時に金属板との接着
低下を起こしたり、絶縁層自体にクラックが発生し好ま
しくない。導体層は、比較的安価に容易に入手できる、
市販の電解銅箔、圧延銅箔等が用いられる。
The insulating layer used in the present invention is JIS
It is optimum that the elongation at break measured by the C2318 method is 30% or more. If the elongation is less than 30%, adhesion to a metal plate may be reduced during mechanical processing such as bending and drawing, or cracks may occur in the insulating layer itself, which is not preferable. The conductor layer is relatively inexpensive and easily available,
Commercially available electrolytic copper foil, rolled copper foil and the like are used.

【0016】金属板、絶縁層、導体層を相互に接合する
方法としては、熱ロール法や熱プレス法等がある。本発
明の実施例には、導体層が1層構造のものを示したが、
必要に応じて多層構成であっても構わない。多層構成を
形成する方法として、例えばビルドアップ法や貼合わせ
法がある。ビルドアップ法は、金属板上に順次絶縁層と
導体層とを積層する方法である。一方貼合わせ法は、絶
縁層と導体層のみを積層したシートを形成し、その両面
で導体層が露出する構造とし、前記シートとは別な絶縁
層を介して、この絶縁層を金属板に接合することによっ
て、多層構造が実現される。ガラスエポキシの両面に、
銅箔が貼られた銅張り積層板を用いて形成された多層回
路基板を用いてもよい。その場合は、曲げ部、絞り部以
外の平坦部に貼付し多層回路として用いる。
As a method of joining the metal plate, the insulating layer and the conductor layer to each other, there are a hot roll method, a hot press method and the like. In the embodiment of the present invention, the conductor layer has a single-layer structure.
A multi-layered structure may be used if necessary. As a method for forming a multi-layer structure, there are, for example, a build-up method and a laminating method. The build-up method is a method of sequentially laminating an insulating layer and a conductor layer on a metal plate. On the other hand, the laminating method is to form a sheet in which only an insulating layer and a conductor layer are laminated, and the conductor layer is exposed on both sides of the sheet. By joining, a multilayer structure is realized. On both sides of glass epoxy,
You may use the multilayer circuit board formed using the copper clad laminated board to which the copper foil was stuck. In that case, it is attached to a flat part other than the bent part and the narrowed part and used as a multilayer circuit.

【0017】多層構造の場合、一般に層間接続を目的と
して貫通孔を設けるが、その方法としては、ドリル、エ
キシマレーザーからのレーザー光、あるいは絶縁層がポ
リイミドの場合には、アルカリ溶液によるエッチング等
によって形成できる。前記貫通孔を通して、導体層間を
電気的に接続する方法としては、通常のプリント配線板
の製造方法で一般に使用される、メッキ、半田、導電性
ペースト等が使用できる。また、ワイヤーボンディング
によって接続させることも可能である。
In the case of a multi-layer structure, a through hole is generally provided for the purpose of interlayer connection. As a method therefor, a drill, laser light from an excimer laser, or etching with an alkaline solution when the insulating layer is polyimide is used. Can be formed. As a method of electrically connecting the conductor layers through the through holes, plating, solder, conductive paste, etc., which are generally used in the ordinary method for manufacturing a printed wiring board, can be used. It is also possible to connect by wire bonding.

【0018】本発明の、絞り、曲げ機械加工は、定法で
ある金型を用いたプレス加工で行うことが出来る。絞り
加工時に導体部を、保護するために金型表面に樹脂コー
トして用いたり、パターンの形状に合わせて、金型に凹
形状を設けてもよい。深絞り、曲率半径が小さい曲げ加
工に於いては、熱をかけての加工や、絶縁層を溶剤等で
膨潤させる等の処理を行ってもよい。
The drawing and bending mechanical workings of the present invention can be carried out by press working using a mold which is a conventional method. The conductor may be resin-coated on the surface of the mold for protection during the drawing process, or the mold may be provided with a concave shape in accordance with the shape of the pattern. In deep drawing and bending with a small radius of curvature, processing such as application of heat or processing such as swelling the insulating layer with a solvent or the like may be performed.

【0019】また、他の印刷基板との接続に用いるリー
ド部は、多種の構造が可能であるが、接続信頼性を高く
し、絶縁層や配線導体に損傷が生じることを防ぐため
に、内側の曲率半径を0.1〜5.0程度の範囲で加工
することが望ましい。なお、後記の実施例においては
0.5mmとした例を示した。また、リード部に於て重
要なことは、リードとして用いられる配線導体が、板端
より充分長く、好ましくは50μm以上離して形成する
ことにある。この距離が充分長くなく、例えば50μm
以内になると、他の印刷基板に実装するときに、半田の
廻り込みが原因となる、リードと金属板の短絡が発生す
ることがあり好ましくない。電子部品搭載部の底部を形
成するコーナーは、内側の曲率半径を0.1〜10mm
にすることが望ましく、本発明の実施例では0.5mm
とした。
The lead portion used for connection with another printed board may have various structures, but in order to improve the connection reliability and prevent damage to the insulating layer and the wiring conductor, It is desirable to process the radius of curvature in the range of about 0.1 to 5.0. In the examples described later, an example of 0.5 mm is shown. In addition, what is important in the lead portion is that the wiring conductor used as the lead is formed sufficiently longer than the plate edge, preferably 50 μm or more. This distance is not long enough, for example 50 μm
When it is within the range, a short circuit between the lead and the metal plate may occur due to the wraparound of the solder when it is mounted on another printed board, which is not preferable. The corner forming the bottom of the electronic component mounting portion has an inner radius of curvature of 0.1 to 10 mm.
Is 0.5 mm in the embodiment of the present invention.
And

【0020】次に本発明の実施の具体的な態様の一例に
ついて、図面を参照しながら説明する。図1は本発明の
パッケージの一実施例の構成を示した断面図であり、図
2はその斜視図である。この電子部品搭載用基板100
は、回路加工された導体層102(配線導体)を1層有
するものである。回路パターンを形成した後に、折り曲
げ加工及び絞り加工により、形成している。電子部品搭
載用基板100の中心部には、絞り加工で形成した開口
部101があり、この凹部に電子部品を搭載する。開口
面を有する箱体状に加工してパッケージを好適に形成し
うるようにしている。この開口面の周縁から4辺の基板
端部に放射線状に導体層102が金属板103上に、絶
縁層104を介して形成されている。
Next, an example of a specific mode for carrying out the present invention will be described with reference to the drawings. FIG. 1 is a sectional view showing the configuration of an embodiment of the package of the present invention, and FIG. 2 is a perspective view thereof. This electronic component mounting substrate 100
Has one circuit-processed conductor layer 102 (wiring conductor). After the circuit pattern is formed, it is formed by bending and drawing. At the center of the electronic component mounting substrate 100, there is an opening 101 formed by drawing, and an electronic component is mounted in this recess. The package is preferably formed by processing into a box shape having an opening surface. A conductor layer 102 is radially formed on the metal plate 103 via the insulating layer 104 from the peripheral edge of the opening surface to the four ends of the substrate.

【0021】基板端部には曲げ加工で形成されたリード
部105があり、この105を用いて他の印刷基板と電
気的に導通される。ここでは金属板103として例え
ば、厚み0.2mmの銅板を用い、またここでは、絶縁
層104として熱可塑性ポリイミドである、三井東圧化
学製のLARK−TPIを用い、絶縁層の厚みはここで
は20μmとした。配線導体102としてはここでは1
8μmの圧延銅箔を用いた。金属板103と銅箔は絶縁
層104を介して熱プレスを用いて積層し金属ベース基
板とした。
A lead portion 105 formed by bending is provided at the end of the substrate, and the lead portion 105 is used to electrically connect to another printed substrate. Here, for example, a copper plate having a thickness of 0.2 mm is used as the metal plate 103, and here, LARK-TPI manufactured by Mitsui Toatsu Chemicals, which is a thermoplastic polyimide, is used as the insulating layer 104, and the thickness of the insulating layer is here. It was set to 20 μm. Here, the wiring conductor 102 is 1
A rolled copper foil of 8 μm was used. The metal plate 103 and the copper foil were laminated using a heat press via the insulating layer 104 to form a metal base substrate.

【0022】次に、該配線導体について一般的なプリン
ト配線板の加工技術を用いた回路加工を行い、配線導体
102を形成した。その後、金型を用いた機械加工を行
い、まず絞り加工で電子部品搭載部101を形成し、次
に基板端部のリード部105を順次形成する。このよう
にして形成された電子部品搭載用基板100は、4辺の
リード部の平坦性は好ましくは50μm以下であり、形
状的に基板の中心部に絞り加工で開口部を形成したこと
と、4辺に曲げ加工で形成したリード部を有すること
で、電子部品搭載用基板は反りもなく安定性が良好なも
のであった。
Next, the wiring conductor was subjected to circuit processing using a general printed wiring board processing technique to form a wiring conductor 102. After that, mechanical processing using a die is performed, and first, the electronic component mounting portion 101 is formed by drawing, and then the lead portion 105 at the end portion of the substrate is sequentially formed. In the electronic component mounting substrate 100 thus formed, the flatness of the lead portions on the four sides is preferably 50 μm or less, and the opening portion is formed in the central portion of the substrate by drawing, By having the lead portions formed by bending on the four sides, the electronic component mounting board had no warp and had good stability.

【0023】図3は電子部品搭載用基板100に電子部
品111を実装して得た電子回路パッケージ110を示
す模式断面図である。電子部品111はワイヤーボンデ
ィング112によって配線導体102と電気的に接続さ
れる。また図4は電子回路パッケージを樹脂封止して得
られた物を示す模式断面図である。図3に示した電子回
路パッケージ110には、電子部品としてベアチップを
1ケ搭載しているが、目的に応じて複数個のベアチッ
プ、及び表面実装型のチップ部品を搭載することも可能
である。
FIG. 3 is a schematic sectional view showing an electronic circuit package 110 obtained by mounting an electronic component 111 on the electronic component mounting board 100. The electronic component 111 is electrically connected to the wiring conductor 102 by wire bonding 112. FIG. 4 is a schematic cross-sectional view showing a product obtained by resin-sealing an electronic circuit package. Although one bare chip is mounted as an electronic component on the electronic circuit package 110 shown in FIG. 3, it is also possible to mount a plurality of bare chips and surface mount type chip components according to the purpose.

【0024】図5は、配線導体を電子部品搭載部の絞り
加工によって形成した、凹部内部まで延ばした構造を示
した模式断面図である。この様な場合は、ベアチップを
フリップチップ構造で搭載可能であり、ワイヤーボンデ
ィングで搭載した110と比較して薄型が可能である。
FIG. 5 is a schematic cross-sectional view showing a structure in which the wiring conductor is formed by drawing the electronic component mounting portion and extended to the inside of the recess. In such a case, the bare chip can be mounted in a flip chip structure, and can be thinner than 110 mounted by wire bonding.

【0025】[0025]

【発明の効果】本発明の効果としては、電子部品搭載用
の基板として下記が挙げられる。 (1)リード部を含めて金属板でサポートされているた
めに、リードのコプラナリティ安定性が向上する。 (2)金属板を介して電子部品から発生する熱は、他の
印刷基板との接地面より効率的に放熱される。 (3)電子部品搭載部が絞り加工により形成された凹形
状になっているために、電子部品搭載後に行うポッティ
ング樹脂封止が行い易い。 (4)電子部品搭載用基板としての構造的な強度が向上
し、信頼性が向上する。
The effects of the present invention include the following as a substrate for mounting electronic components. (1) The coplanarity stability of the lead is improved because it is supported by the metal plate including the lead portion. (2) The heat generated from the electronic component via the metal plate is efficiently dissipated from the ground plane with another printed board. (3) Since the electronic component mounting portion has a concave shape formed by drawing, it is easy to perform potting resin sealing after mounting the electronic component. (4) The structural strength of the electronic component mounting substrate is improved, and the reliability is improved.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例の電子部品搭載用基板の断面
FIG. 1 is a cross-sectional view of an electronic component mounting board according to an embodiment of the present invention.

【図2】電子部品搭載基板を他の配線基板に実装する状
態を示す斜視図
FIG. 2 is a perspective view showing a state where the electronic component mounting board is mounted on another wiring board.

【図3】電子部品が搭載された電子回路パッケージの状
態を表す模式断面図
FIG. 3 is a schematic cross-sectional view showing a state of an electronic circuit package on which electronic components are mounted.

【図4】電子回路パッケージを樹脂封止した状態を示す
模式断面図
FIG. 4 is a schematic cross-sectional view showing a state in which an electronic circuit package is resin-sealed.

【図5】フリップチップ構造で電子部品が搭載された電
子回路パッケージ状態を示す模式断面図
FIG. 5 is a schematic cross-sectional view showing an electronic circuit package state in which electronic components are mounted in a flip chip structure.

【符号の説明】[Explanation of symbols]

100 電子部品搭載用基板 101 電子部品搭載部 102 配線導体 103 金属板 104 絶縁層 105 リード部 110 電子回路パッケージ 111 電子部品 112 ボンディングワイヤー 113 他の印刷基板 114 封止樹脂 100 Electronic Component Mounting Substrate 101 Electronic Component Mounting Part 102 Wiring Conductor 103 Metal Plate 104 Insulating Layer 105 Lead Part 110 Electronic Circuit Package 111 Electronic Component 112 Bonding Wire 113 Other Printed Board 114 Sealing Resin

───────────────────────────────────────────────────── フロントページの続き (72)発明者 星野 巽 神奈川県横浜市栄区笠間町1190番地 三井 東圧化学株式会社内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Tatsumi Hoshino 1190 Kasama-cho, Sakae-ku, Yokohama-shi, Kanagawa Mitsui Toatsu Chemical Co., Ltd.

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 銅箔と金属板とが、絶縁層を介して積層
されている金属ベース基板を用いて、銅箔面を回路加工
を行って得られた金属ベース回路基板において、基板の
中央部に電子部品搭載部を絞り加工を行って開口形状に
形成し、且つ該回路基板の複数の端部を、該回路加工面
が下に向くよう内側に脚状に曲げ加工を行うと共に、該
複数の曲げ部にあるリード状に形成された複数の導体部
を用いて、他の回路基板との接続を行いうるようにした
ことを特徴とする電子部品搭載用基板。
1. A metal base circuit board obtained by subjecting a copper foil surface to circuit processing using a metal base board in which a copper foil and a metal plate are laminated via an insulating layer, in the center of the board. The electronic component mounting portion is formed into an opening shape by drawing the portion, and a plurality of end portions of the circuit board are bent inward so that the circuit processing surface faces downward, and at the same time, An electronic component mounting board, characterized in that a plurality of lead-shaped conductor portions in a plurality of bent portions are used to enable connection with another circuit board.
【請求項2】 該複数の曲げ部に形成されている複数の
リード状導体部先端を、金属基板の最端部より50μm
以上離して形成する請求項1記載の電子部品搭載用基
板。
2. The tips of a plurality of lead-shaped conductors formed on the plurality of bent portions are 50 μm from the outermost end of the metal substrate.
The electronic component mounting substrate according to claim 1, wherein the substrates are formed separately from each other.
【請求項3】 金属板と銅箔を絶縁する層として,少な
くとも伸び率が30%以上の熱可塑性ポリイミドを用い
る請求項1または2に記載の電子部品搭載用基板。
3. The electronic component mounting substrate according to claim 1, wherein a thermoplastic polyimide having an elongation of at least 30% is used as a layer for insulating the metal plate and the copper foil.
JP5281103A 1993-11-10 1993-11-10 Electronic device mounting board Pending JPH07135381A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5281103A JPH07135381A (en) 1993-11-10 1993-11-10 Electronic device mounting board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5281103A JPH07135381A (en) 1993-11-10 1993-11-10 Electronic device mounting board

Publications (1)

Publication Number Publication Date
JPH07135381A true JPH07135381A (en) 1995-05-23

Family

ID=17634395

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5281103A Pending JPH07135381A (en) 1993-11-10 1993-11-10 Electronic device mounting board

Country Status (1)

Country Link
JP (1) JPH07135381A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013145790A (en) * 2012-01-13 2013-07-25 Hitachi Chemical Co Ltd Bent wiring board, populated bent wiring board, and metal layer-attached insulating layer for use in the same
JP2013235878A (en) * 2012-05-02 2013-11-21 Ibiden Co Ltd Electronic component mounting substrate, case unit, and manufacturing method of electronic component mounting substrate

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013145790A (en) * 2012-01-13 2013-07-25 Hitachi Chemical Co Ltd Bent wiring board, populated bent wiring board, and metal layer-attached insulating layer for use in the same
JP2013235878A (en) * 2012-05-02 2013-11-21 Ibiden Co Ltd Electronic component mounting substrate, case unit, and manufacturing method of electronic component mounting substrate

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