JPH07135262A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To increase the acuteness of the upper edge section of the floating gate of a SAMOS without increasing the protruded amount of a selective oxide film from the floating gate. CONSTITUTION:The acuteness of the upper edge section of a floating gate 30 is increased without increasing the protruded amount of a selective oxide film 29 from the gate 30 by forming a recessed section 28 on the surface of a semiconductor film 23 which becomes the gate 30 before forming the oxide film 29 and the selective oxide film 29 by selectively oxidizing the semiconductor film 23 in the recessed section 28.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device having SAMOS.

[0002]

2. Description of the Related Art For example, an S applied to an EEPROM
AMOS (Stacked Gate Avalanche Metal Oxide Semico
nductor), as shown in FIG. 13, the semiconductor layer (1)
A floating gate (3) is formed on the first gate insulating film (2) via the second gate insulating film (4) and the control gate (5) from the top to the side.
It is proposed that the source / drain impurity diffusion regions (6, 7) are formed in the semiconductor layer (1) on both sides of the floating gate (3) and the control gate (5). .

A cross-sectional view of the floating gate (3) in the gate length direction is as shown in FIG. 13, and a selective oxide film (8) having a thick center is formed on the upper portion of the floating gate (3). The upper edge is sharp. Also,
The control gate (5) is formed in a region covering the acute angle portion. When erasing the memory in this element, a predetermined voltage is applied to the control gate (5).
The carrier stored in the floating gate (3) is moved to the control gate (5) from its sharp portion by the tunnel effect.

Next, the manufacturing process of the SAMOS is shown in FIG.
~ It demonstrates based on FIG. First, as shown in FIG. 8, a first gate insulating film (2), a polycrystalline semiconductor film (9), and an oxidation protection film (10) made of Si ₃ N ₄ are formed on a semiconductor layer (1). After that, the oxidation protection film (10)
A photoresist (11) is applied on the top surface. Then, after exposing and developing the photoresist (11) to form a window (12) in the gate region, the oxidation protection film (10) exposed from the window (12) is etched to form an opening as shown in FIG. (13) is formed.

Next, after removing the photoresist (11), as shown in FIG. 10, the surface of the semiconductor layer (1) exposed from the opening (13) is selectively oxidized to form a selective oxide film [LO].
COS] (8) is formed. Subsequently, as shown in FIG. 11, after the selective protection film (10) is removed, the polycrystalline semiconductor film (9) is etched by using the selective oxide film (8) as a mask to remove the polycrystalline semiconductor film (9). It is left in the gate region as shown in FIG. The polycrystalline semiconductor layer (9)
Becomes a floating gate (3), and the upper edge portion in the gate length direction is sharpened by a selective oxide film (8) having a substantially elliptical cross section.

After this, an insulating film and a second polycrystalline semiconductor layer are formed, and these are patterned, and as shown in FIG. 13, one side of the floating gate (3) is formed on the selective oxide film (8). Portion and the semiconductor layer (1) to be left over to form a control gate (5) through the second insulating film (4), and further introduce impurities into the surface of the semiconductor layer (1) to diffuse impurities. Regions (6, 7) are formed.

The above technique is described, for example, in US Pat. Nos. 5,067,108, No 5,045,488, No 5,029,130 and the like.

[0008]

According to the above steps, the upper edge of the floating gate (3) becomes sharp, and the thickness of the selective oxide film (8) is adjusted so that the acute angle of It is also possible to make adjustments. However, if the selective oxide film (8) becomes thick, the floating gate (3)
Since the amount of protrusion from above also increases, the following problem occurs when patterning a film (not shown) laminated thereon by photolithography.

The photolithography method has a step of applying a photoresist and exposing the photoresist. However, when the amount of protrusion of the selective oxide film (8) to the upper side increases, the photoresist immediately above the photoresist film is exposed. While it becomes thinner, it becomes thicker in the surrounding area. Therefore, according to the manufacturing method as described above, the thickness of the photoresist becomes more uneven as the thickness of the selective oxide film (8) increases, and the focus margin at the time of exposure becomes smaller. There is.

[0010]

The present invention has been made in view of the above-mentioned drawbacks of the prior art. In SAMOS, the floating gate (3) is formed before the selective oxide film (29) is formed.
0), a recess (28) is formed on the semiconductor film (23), and the semiconductor film (23) in the recess (28) is selectively oxidized to form a selective oxide film (29). Selective oxide film (29) from the gate (30)
The present invention provides a method for manufacturing a semiconductor device in which the sharpness of the upper edge portion of the floating gate (30) is increased without increasing the amount of protrusion.

[0011]

[Operation] According to the present invention, the amount of upward protrusion of the selective oxide film (29) is smaller than that in the case where the recess (28) is not formed, and the central portion of the bottom of the selective oxide film (29). Becomes deeper than when the recess (28) is not formed,
The upper edge of the floating gate (30) becomes sharper.

Therefore, the difference in the unevenness on the semiconductor layer (21) is reduced, and the focus margin of the resist is increased when the film (not shown) formed thereon is patterned by the lithography method. It becomes easier to control the sharpness of the upper edge of the control gate (30).

[0013]

Embodiments of the present invention will be described below with reference to the drawings. 1 to 7 are cross-sectional views showing the steps of one embodiment of the present invention. First, as shown in FIG. 1, the upper surface of the semiconductor layer (21) made of p-type silicon is heated to 1000
Dry oxidation is performed at a temperature of 500 ° C. to form a first insulating film (22) of SiO ₂ having a thickness of 500 Å. After that, a polycrystalline semiconductor film (23) made of silicon is formed into 2 by a low pressure CVD method.
It is grown to a thickness of 000Å, and then an oxidation protection film (24) made of Si ₃ N ₄ is grown to a thickness of 1000Å.

Further, after applying the resist (25) to a thickness of 1 μm, a resist (2
5) is exposed and then developed to form a window (26) over the floating gate area. Next, as shown in FIG. 2, the antioxidant film (2
4) is dry-etched to form an opening (17).
The etching conditions are, for example, CH as a reaction gas.
F ₃ and O ₂ are introduced into a reaction chamber (not shown) at 75 sccm and 25 sccm, respectively, and the pressure therein is set to 70 mTorr.

After this, as shown in FIG. 3, the window (26)
And the polycrystalline semiconductor film (23) exposed from the opening (27)
Is etched to form a recess (28) having a depth of about 1000Å. In this case, the concave portion (28) is formed by isotropic etching, for example, a plasma etching method, and CF ₄ and O _{2 are} used as reaction gases at 300 sccm and 60 sccm, respectively.
Introduce sccm into the reaction chamber. The concave portion (28) has a slope on its side and is shaped so that its center is deepest.

Next, after removing the resist (25),
The polycrystalline semiconductor film (23) on the surface of the recess (28) is selectively oxidized to form a selective oxide film (2) made of SiO ₂ as shown in FIG.
9) is formed to a thickness of 1500 to 2000Å. The selective oxide film (29) has a substantially elliptical cross-sectional shape, but the central portion thereof hardly projects from the polycrystalline semiconductor film (23) due to the presence of the recess (28).

Further, as shown in FIG. 5, after the antioxidant film (24) made of Si ₃ N ₄ is removed by boiling phosphate, the polycrystalline oxide film (24) is used as a mask to form the polycrystalline semiconductor film (23). Anisotropic etching is performed in the vertical direction to leave the polycrystalline semiconductor film (23) in the floating gate region as shown in FIG. As conditions for etching the polycrystalline semiconductor film (23) made of silicon using the selective oxide film (24) as a mask, for example, HBr, HCl, and SF ₆ are introduced into an etching chamber (not shown) at 10 sccm, 200 sccm, and 5 sccm, respectively. The pressure of the atmosphere is 600 mT
The discharge power between the electrodes is set to 250 w.

As a result, the polycrystalline semiconductor film (23) under the selective oxide film (29) is used as a floating gate (30), and the first insulating film (22) thereunder is used as a gate insulating film. This floating gate (30) is sharp at the upper edge portion in the gate length direction due to the shape of the selective oxide film (29), and its cross-sectional shape is such that a selective oxide film of the same thickness is formed without forming a recess. Sharper than the method (FIGS. 8-13).

Next, steps required until the cross section shown in FIG. 7 is obtained will be described. First, a second insulating film made of SiO ₂ (31)
And growing a second polycrystalline semiconductor film by the CVD method,
After the polycrystal semiconductor film is made N-type by a POCl3 liquid source, they are patterned to form a selective oxide film (2
9) from the top to the one side of the floating gate (30) and the semiconductor layer (21) in the vicinity thereof. The second polycrystalline semiconductor film patterned here is used as a control gate (32).

Subsequently, n-type impurities such as arsenic and phosphorus are introduced into the semiconductor layer (21) exposed on both sides of the floating gate (30) and the control gate (32),
Impurity diffusion regions (33, 34) to be the source and drain
To form. As described above, since the concave portion (28) is formed in the upper portion of the polycrystalline semiconductor film (23) to be the floating gate (30) before the selective oxide film (29) is formed, when the concave portion is not formed, In comparison, the selective oxide film (2
9) the amount of protrusion of the selective oxide film (2
Floating gate (30) with deeper center
The upper edge of is even sharper.

As a result, the difference in unevenness on the semiconductor layer (21) is reduced, and the focus margin of resist exposure is increased when the insulating film or conductive film further stacked thereon is patterned by the lithography method. In addition, there is an advantage that the sharpness of the upper edge portion of the control gate (30) can be easily controlled.

[0022]

As described above, according to the present invention, the concave portion (28) is formed on the semiconductor film (23) to be the floating gate (30) before forming the selective oxide film (29).
After the formation of the semiconductor film, the semiconductor film (2
Since 3) is selectively oxidized to form the selective oxide film (29), the amount of upward projection of the selective oxide film (29) can be reduced as compared with the case where the recess (28) is not formed.
The center of the bottom of the selective oxide film (29) may be deepened to make the upper edge of the floating gate (30) sharper.

Therefore, when the difference in the unevenness on the semiconductor layer (21) is reduced and the film (not shown) formed thereon is patterned by the lithography method, the focus margin of the resist is increased. It will be possible
The sharpness of the upper edge of the control gate (30) can be easily controlled.

[Brief description of drawings]

FIG. 1 is a first cross-sectional view for explaining a manufacturing process according to an embodiment of the present invention.

FIG. 2 is a second cross-sectional view for explaining the manufacturing process for the embodiment of the present invention.

FIG. 3 is a third cross-sectional view for explaining the manufacturing process for the embodiment of the present invention.

FIG. 4 is a fourth cross-sectional view for explaining the manufacturing process for the embodiment of the present invention.

FIG. 5 is a fifth sectional view for explaining the manufacturing process for the embodiment of the present invention.

FIG. 6 is a sixth cross-sectional view for explaining the manufacturing process for the example of the present invention.

FIG. 7 is a seventh cross-sectional view for explaining the manufacturing process for the example of the present invention.

FIG. 8 is a first cross-sectional view for explaining a conventional example.

FIG. 9 is a second cross-sectional view for explaining a conventional example.

FIG. 10 is a third cross-sectional view for explaining the conventional example.

FIG. 11 is a fourth cross-sectional view for explaining a conventional example.

FIG. 12 is a fifth cross-sectional view for explaining a conventional example.

FIG. 13 is a sixth cross-sectional view for explaining the conventional example.

Claims (1)

[Claims] 1. A first insulating film (2) on a semiconductor layer (21).
2) via the first semiconductor film (23) and the oxidation protection film (2
4), and patterning the oxidation protection film (24) to form openings (2).
7), and the first semiconductor film (2) exposed from the opening (27).
3) isotropically etching to form recesses (28); and using the oxidation protection film (24) as a mask, the recesses (2) are formed.
8) a step of thermally oxidizing the surface of the first semiconductor film (23) exposed from the surface of the first semiconductor film (23) to form an insulative selective oxide film (29); and a step of removing the antioxidant film (24). Using the selective oxide film (29) as a mask, the first semiconductor film (23) is selectively etched to obtain the selective oxide film (2).
9) a step of using the first semiconductor film (22) remaining underneath as a floating gate (30), and insulating at least on the selective oxide film (29) and a side portion of the floating gate (30). A control gate (32) is formed through the film (31), and the semiconductor layer (2) on both sides of the floating gate (32) is formed.
1) A step of forming the impurity diffusion regions (33, 34) in 1).