JPH06252137A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To provide the manufacturing method of a semiconductor device which can be increased in degree of integration by reducing the aspect ratio of an element separating area and, at the same time, in which no deep pocket is formed. CONSTITUTION:After forming element separating areas 41 and 42 of field oxide films on the surface of a semiconductor substrate 1 by using nitride films 101 and 102 composed of oxidation resisting films as masks and removing the films 101 and 102, sacrificial oxide films 4a are formed on the surfaces of the areas 41 and 42. After forming the films 4a, the thicknesses of the areas 41 and 42 are controlled by removing the films 4a. Since the aspect ratios of the areas 41 and 42 can be lowered, the pattern accuracy is improved in a succeeding exposing process and a semiconductor storage device, etc., can be made more precise.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device relating to miniaturization of elements, and more particularly, to miniaturize element dimensions by flattening an element isolation region formed by a selective oxidation method. The present invention relates to a method for manufacturing a semiconductor device, which enables the semiconductor memory device such as MOS / RAM to be integrated at high density.

[0002]

2. Description of the Related Art In recent years, a method of manufacturing a semiconductor device has been developed, which can miniaturize a transistor structure and integrate it at a high density without significantly changing the conventional transistor structure. In an integrated circuit, if the pattern is miniaturized, the aspect ratio (t / w: height t relative to line width w
Ratio), the pattern accuracy in the exposure process is deteriorated, the side wall of the step is defective or the coverage is reduced, or the wiring length is increased to increase the parasitic resistance or the parasitic capacitance. However, there is a problem that the operation speed of is slow. From this point of view, planarization and self-alignment (self-alignment) of the element are important techniques in the miniaturization technique. For example, in a semiconductor memory device in which a MOS transistor is integrated, the aspect ratio of an element isolation region formed by a field oxide film increases with miniaturization, and how to reduce the aspect ratio is a technical issue.

FIG. 4 is a cross-sectional view showing a part of the manufacturing process of the SRAM, which shows a selective oxidation method (LOCOS oxidation method).
The element isolation structure according to will be described. Figure 4 (a)
The figure shows a state in which an element isolation region composed of a field oxide film 4 is formed on the semiconductor substrate 1 using the oxidation resistant nitride film 3 as a mask, and 2 is a pad oxide film. Subsequently, after removing the silicon nitride film 3 and the pad oxide film 2 immediately thereunder, as shown in FIG. 4B, heat treatment is performed to form the oxide film 5.
And a polysilicon layer 6 and titanium silicide (Ti
The Si ₂ ) layer 7 is formed. FIG. 4C shows a state in which the positive type resist film 8 is applied, and the process proceeds to the exposure step in order to form the source / drain diffusion layer, the gate region and the like. Region R
_{1 to} R ₃ indicate regions where the resist film is removed by irradiation with light.

Using the resist films 8 ₁ and 8 ₂ as a mask, the exposed silicide layer 7 and the polysilicon layer 6 immediately below it,
And the oxide film 5 thereunder are removed, and as shown in FIG. 4D, a gate oxide film 5 ₁ , a polysilicon layer 6 ₁ to be a floating gate and a silicon sand (TaSi ₂ ) layer 7 ₁ are formed, and boron is formed. The source / drain diffusion layer 9 is formed by ion-implanting a dopant such as the above into the semiconductor substrate 1. afterwards,
Although not shown, a silicon oxide film, which is an insulating film, is deposited, and contact holes are formed in necessary connection portions.
A polysilicon layer is formed and is selectively doped to form a wiring layer. Further, an insulating layer such as a silicon nitride film is formed, the insulating layer is patterned, and a wiring layer is formed by doping or the like. Subsequently, a phosphorus glass layer (PSG film) is formed, and the aluminum thin film is patterned to form bit lines and the like.

FIG. 5 is a sectional view for explaining the flattening of the element isolation region. FIG. 5A shows a state in which the field oxide film 4 is formed. The field oxide film 4 is wet or dry-etched to flatten the field oxide film 4. At this time, if the adhesion between the field oxide film 4 and the nitride film 3 is poor, even the field oxide film 4 directly below the silicon nitride film 3 is etched as shown in FIG. 5B. After that, as shown in FIG. 5C, the silicon nitride film 3 is removed. Further, as shown in FIG. 5D, the field oxide film 4 is etched and flattened to reduce the aspect ratio of the element isolation region.

[0006]

The SRAM as described above
In such a semiconductor device, when each element size is miniaturized as it is for integration, the step difference in the element isolation region becomes large and the aspect ratio becomes a large value. When the aspect ratio is large, even if the photomask is brought into close contact with the wafer for exposure, the light incident on the resist is scattered at the stepped portion of the element isolation region and the pattern accuracy is deteriorated. This tendency is that the surface shape becomes more sensitive as the wavelength of light used during exposure becomes shorter from g-line to i-line,
There is a drawback that the notching phenomenon easily occurs in the resist film.
Further, although the projection exposure method is adopted in the LSI such as the semiconductor memory device, even in the case of this exposure method, FIG.
As shown in the manufacturing process of (c), the light L ₁ incident on the stepped portion of the element isolation region is reflected or scattered at the stepped portion and is also applied to the resist portion that should be originally left as a mask. As a result, as shown in FIG. 4D, the resist is melted and a resist film corresponding to the original channel length G cannot be obtained. When the resist film 8 ₁ Etchigu gate portion is made, there is a problem that the channel length required yield can not be obtained to deteriorate. Furthermore, the resist film ₈₁ has become narrower, in the annealing step after the ion implantation, there is a possibility that the source drain diffusion layer is in contact.

From this point of view, as shown in FIG. 5, a manufacturing process for removing the field oxide film 4 is performed in order to keep the aspect ratio of the element isolation region low. However, as shown in FIG. 5B, when the adhesion between the silicon nitride film 3 and the field oxide film 4 is poor, the field oxide film 4 directly below the nitride film 3 is removed. If the etching process of the field oxide film 4 for flattening is performed in such a state, a groove-shaped deep pocket 9 is formed at the peripheral edge of the field oxide film 4 as shown in FIG. 5D. It The oxide film, the polysilicon layer, and the like formed on the deep pocket 9 are a cause of impairing their structures and a yield of the semiconductor device.

The present invention has been made in view of the above-mentioned problems, and its main purpose is to provide a method of manufacturing a semiconductor device in which the aspect ratio can be reduced to increase the degree of integration. is there. Still another object is to provide a method for manufacturing a semiconductor device that can flatten an element isolation region without generating deep pockets.

[0009]

In order to achieve the above object, the present invention is a method of manufacturing a semiconductor device in which an oxide film that is selectively formed is used as an element isolation region, and is formed on the semiconductor substrate. Forming a sacrificial oxide layer on the surface of the isolated device isolation region, removing the sacrificial oxide layer, and then removing the oxide layer of the device isolation region to reduce the aspect ratio of the device isolation region. It is characterized by. Further, the present invention is a method for manufacturing a semiconductor device in which a selectively formed oxide film is used as an element isolation region, wherein an oxidation resistant film covering the surface of the semiconductor substrate is used as a mask to selectively grow an oxide layer. Forming an element isolation region, removing the oxidation resistant film, forming a sacrificial oxide layer on the surface of the element isolation region, and removing the sacrificial oxide layer. It is characterized by including.

The present invention also provides a method of manufacturing a semiconductor device using an oxide film selectively formed as an element isolation region,
A step of selectively growing an oxide layer using an oxidation resistant film covering the surface of the semiconductor substrate as a mask to form an element isolation region; a step of removing an oxidized deterioration layer on the surface of the element isolation region; And a step of forming a sacrificial oxide layer on the surface of the element isolation region, and a step of removing the sacrificial oxide layer.

Further, the present invention is a method of manufacturing a semiconductor device in which an oxide film selectively formed is used as an element isolation region,
Forming an oxidation resistant film covering the surface of the semiconductor substrate, forming an opening in the oxidation resistant film by step etching, and tapering an edge of the mask made of the oxidation resistant film; A step of selectively oxidizing the surface of the semiconductor substrate to form an element isolation region by using the oxidizable film as a mask; a step of removing an oxidized deterioration layer on the surface of the element isolation region; The method is characterized by including a step of removing, a step of forming a sacrificial oxide film on the surface of the element isolation region, and a step of removing the sacrificial oxide film. Further, the present invention is a method of manufacturing a semiconductor device, wherein an oxide film selectively formed is used as an element isolation region, and the element isolation region is etched to remove the element isolation region after the sacrificial oxide film is removed. The method is characterized by including a step of reducing the aspect ratio of the separation region.

[0012]

According to the method of manufacturing a semiconductor device of the present invention, after the field oxide film is formed, a heat treatment is performed to form a sacrificial oxide layer on the surface thereof, and the sacrificial oxide layer is removed. It lowers the aspect ratio of. Further, the aspect ratio is further reduced by removing the field oxide film after removing the oxidized layer. Further, according to the method of manufacturing a semiconductor device of the present invention, the exposed portion of the field oxide film has a relatively flat shape by making the edge of the mask of the oxidation resistant film for forming the field oxide film into a tapered shape. Shape,
By forming a sacrificial oxide layer on the surface of the field oxide film and removing the sacrificial oxide layer, the aspect ratio is lowered without forming a deep pocket.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A method of manufacturing a semiconductor device according to the present invention will be described below with reference to the drawings. Embodiment 1 FIG. 1 is an embodiment of a method of manufacturing a semiconductor memory device according to the present invention, showing, for example, a manufacturing process of an element isolation region for forming a MOS / RAM or the like. In FIG. 1A, a pad oxide film 2 having a thickness of about 100 Å is formed on the surface of a semiconductor substrate 1 by thermal oxidation, and a buffer layer of amorphous silicon having a thickness of about 500 Å is formed on the pad oxide film 2. A layer (or a polysilicon layer) 3 is formed. On the amorphous silicon layer 3, a nitride film 10 which is an oxidation resistant film having a thickness of about 2000Å is formed. A resist film 11 is applied on the entire surface of the nitride film 10. Subsequently, the resist film 11 is exposed and developed to form a mask, and CHF ₃ : CF is used.
_The nitride film 10 is selectively removed by dry etching with a ₄ (mixing ratio 1:10) type Freon gas. Thereafter, as shown in FIG. 1 (b), the prolonged high temperature heat treatment, the surface vapor phase growth of the semiconductor substrate 1 which is not protected by the nitride film 10, a field oxide film 4 ₁ a thickness of about 6000Å, and 4 ₂ is formed.

Through the above steps, a slightly amorphous silicon oxide film (oxidation-altered layer) is formed on the surface of the nitride film 4. The surface-altered layer formed on the nitride film 4 is removed by hydrofluoric acid (HF), and then the nitride films 10 ₁ , 10 are formed by hot phosphoric acid.
Remove ₂ . Thereafter, an amorphous silicon layer 3 _1, 3 to remove the oxide film formed on the _second surface the amorphous silicon layer 3 _1, 3 ₂ iodine with hydrofluoric acid - is removed by hydrofluoric acid mixed solution - sulfuric acid. The pad oxide films 2 ₁ and 2 ₂ are left to protect the semiconductor substrate 1. Then, FIG. 1 (c)
As shown in FIG. 3, a sacrificial oxide film 4a having a thickness of about 800 Å is formed on the surfaces of the field oxide films 4 ₁ , 4 ₂ . afterwards,
By removing the sacrificial oxide film 4a with hydrofluoric acid, the thickness of the field oxide films 4 ₁ and 4 ₂ is reduced. Further, by removing with hydrofluoric acid so that the thickness t _{1 of} the field oxide films 4 ₁ and 4 ₂ becomes about 3500Å, the height of the highest portions of the field oxide films 4 ₁ and 4 ₂ from the surface of the semiconductor substrate 1 is increased. Set t ₂ to about 1000Å or less. Of course, the pad oxide films 2 ₁ and 2 ₂ are also removed. Thereafter, as shown in FIG. 1D, a gate oxide film 12 having a thickness of about 200Å is formed. Subsequently, the resist film 13 is applied, and the MOS / RAM is formed by the manufacturing process described in the conventional example.

Embodiment 2 FIG. 2 is another embodiment of the method of manufacturing a semiconductor memory device according to the present invention, showing a manufacturing process for flattening an element isolation region. As shown in FIG. 2 (a), the step of forming the field oxide film 4 _2, it is identical to the manufacturing process of FIG. Then, as shown in FIG. 2B, the field oxide film 4 ₂ is etched with hydrofluoric acid, and the thickness t ₃ removed by etching is set to about 1000 Å. Then, FIG.
As shown in (c), the nitride films 10 ₁ and 10 ₂ are removed with hot phosphoric acid. The oxide film formed on the surface of the amorphous silicon layers 3 ₁ , 3 ₂ which is the vapor layer immediately thereunder is removed with hydrofluoric acid, and the amorphous silicon layers 3 ₁ , 3 ₂ are removed with a mixed solution of iodine-sulfuric acid-hydrofluoric acid. , Pad oxide film 2 ₁ , 2
₂ is left for protection of the semiconductor substrate 1. Then, the sacrificial oxide film thickness on the surface of the field oxide film 4 ₂ of about 800 Å 4
a is formed. Subsequently, as shown in FIG. 2D, the sacrificial oxide film 4a is removed with hydrofluoric acid, and the thickness t ₂ of the field oxide film 4 ₂ is removed with hydrofluoric acid to be about 3500Å. , height t from the field oxide film 4 ₂ of the surface of the semiconductor substrate 1 from the surface of the semiconductor substrate 1
₂ should be about 1000Å or less. After that, a gate oxide film with a thickness of about 200Å is formed, and by a known manufacturing method,
A semiconductor memory device such as a MOS / RAM is formed.

Embodiment 3 FIG. 3 is a cross-sectional view showing another embodiment of the method for manufacturing a semiconductor memory device according to the present invention.
The manufacturing process of the element isolation region forming the S / RAM and the like is shown. In this embodiment, the surface of the semiconductor substrate is about 100Å
Pad oxide film is formed, and an amorphous silicon layer of about 500Å is further formed, and about 2 which is an oxidation resistant film.
Form a nitride film of 000Å. After that, a resist film is applied and exposed and developed to form a mask. Then CHF
_The exposed nitride film is selectively removed by dry etching with a ₃ : CF ₄ (mixing ratio 1:10) freon gas by two step etchings.
As shown in FIG. 3A, the taper 10a is formed on the edges of the nitride films 10 ₁ and 10 ₂ by this dry etching. 3 ₂ is an amorphous silicon layer is a buffer layer. Of course, the taper 10a may have a smooth step shape. The taper 10a formed on the edges of the nitride films 10 ₁ and 10 ₂ can improve the adhesion with the field oxide film and suppress the generation of deep pockets. In the step etching for forming the taper 10a, the first etching step has an etching characteristic with a high etching rate of the nitride film, and the subsequent second etching step has an etching characteristic with a low etching rate of the amorphous silicon layer. Let The etching conditions for this step etching are shown in the table below.

[0017]

[Table 1]

As shown in FIG. 3B, after the step etching process, the thickness t ₄ is about 6000Å by a known method.
Field oxide film 4 ₃ is formed. Field oxide film 4 ₃ according to the mask, whose top profile than the embodiment of FIG. 1 becomes relatively flat. After that, FIG.
(C), the field oxide film 4 depth t ₅ from the surface of ₃ is etched with hydrofluoric acid approximately 1000 Å.
In addition to wet etching with hydrofluoric acid, there is also a method of dry etching. An example of this etching condition is shown in the table.

[0019]

[Table 2]

[0020] Thereafter, as shown in FIG. 3 (d), the thermal oxidation process nitride film 10 ₁ formed by, 10 ₂ of the surface affected layer is removed by hydrofluoric acid, a nitride film 10 ₁ in hot phosphoric acid, 10 Remove ₂ . Subsequently, the oxide films on the surfaces of the amorphous silicon layers 3 ₁ , 3 ₂ are removed with hydrofluoric acid, and further the amorphous silicon layers 3 ₁ , 3 ₂ are removed with a mixed solution of iodine, sulfuric acid and hydrofluoric acid. Then, as shown in FIG. 3 (e), the thickness of the sacrificial oxide film 4a is formed on the surface of the field oxide film 4 ₃ t ₆
To about 800Å. Thereafter, as shown in FIG. 3F, the field oxide film 4 ₃ is removed with hydrofluoric acid in order to further flatten it, and its thickness is adjusted to about 3500 Å. At that time, the thickness from the surface of the semiconductor substrate 1 is about 1000 Å or less. Then, as described in the above embodiment, the source / drain diffusion layers and the like are formed, and the semiconductor memory device is formed.

In the above embodiment, the amorphous silicon layer is formed as the buffer layer under the nitride film, but it is not always necessary to provide this layer. Further, in forming the taper on the mask, in the above-mentioned embodiment, the step etching is performed in two steps. However, a more accurate taper may be formed by performing step etching in three steps or more. The step etching is not limited to the step etching. Of course, the step etching process is not limited to the gas composition and the etching conditions shown in the table.
It should be noted that although the embodiment has been described assuming a MOS / RAM or the like, it is obvious that the embodiment can be applied to integration of a bipolar transistor using a field oxide film as an element isolation region.

[0022]

As described above, according to the method of manufacturing a semiconductor device of the present invention, a sacrificial oxide film is formed in the element isolation region, and the sacrificial oxide film is removed to flatten the element isolation region, Since the aspect ratio is kept low, it is possible to reduce the scattering and reflection of light in the exposure process due to the stepped portion of the element isolation region, so that the pattern accuracy is improved. Further, since it is possible to suppress the occurrence of defects such as notching in the portion formed above the element isolation region, it is possible to miniaturize the element, and it is possible to increase the integration degree of the semiconductor memory device. Of course, the yield of semiconductor devices is improved. or,
By removing the sacrificial oxide film and then removing the oxide layer in the element isolation region, there is an advantage that the element isolation region can be made flatter. Further, by using an oxidation resistant film such as a nitride film as a mask and forming a taper or a smooth step shape at the edge thereof, it is possible to suppress the occurrence of deep pockets, which enables further miniaturization of the element. , The degree of integration can be increased. Further, the method for manufacturing a semiconductor device of the present invention is extremely effective for miniaturization of a semiconductor memory device such as a MOS / RAM having various element isolation regions made of a field oxide film.

[Brief description of drawings]

1A to 1D are cross-sectional views showing a main part of an embodiment of a method for manufacturing a semiconductor device according to the present invention.

2 (a) to 2 (d) are cross-sectional views showing a main part of another embodiment of the method of manufacturing a semiconductor device according to the present invention.

FIGS. 3A to 3F are cross-sectional views showing a main part of another embodiment of the method of manufacturing a semiconductor device according to the present invention.

FIG. 4A to FIG. 4D are cross-sectional views showing an essential part of an example of a conventional method for manufacturing a semiconductor device.

5A to 5D are cross-sectional views showing a main part of a conventional method for manufacturing a semiconductor device.

[Explanation of symbols]

1 semiconductor substrate 2, 2 ₁ , 2 ₂ pad oxide film 3, 3 ₁ , 3 ₂ amorphous silicon layer 4 ₁ , 4 ₂ , 4 ₃ field oxide film 4a sacrificial oxide film 10, 10 ₁ , 10 ₂ nitride film 10a taper 11 , 13 Resist film 12 Gate oxide film

Front page continuation (72) Inventor Masahiko Omatsu 1-2-1, Marunouchi, Chiyoda-ku, Tokyo Nihon Steel Pipe Co., Ltd.

Claims (5)

[Claims] 1. A method of manufacturing a semiconductor device, wherein a selectively formed oxide film is used as an element isolation region, wherein a sacrificial oxide layer is formed on a surface of the element isolation region formed on the semiconductor substrate, A method of manufacturing a semiconductor device, comprising: removing the sacrificial oxide layer and then removing the oxide layer in the element isolation region to reduce the aspect ratio of the element isolation region. 2. A method of manufacturing a semiconductor device, wherein an oxide film selectively formed is used as an element isolation region, wherein an oxidation resistant film covering the surface of the semiconductor substrate is used as a mask to selectively grow an oxide layer. A step of forming an element isolation region, a step of removing the oxidation resistant film, a step of forming a sacrificial oxide layer on a surface of the element isolation region, and a step of removing the sacrificial oxide layer. A method of manufacturing a semiconductor device, comprising: 3. A method of manufacturing a semiconductor device, wherein an oxide film selectively formed is used as an element isolation region, wherein an oxidation resistant film covering the surface of the semiconductor substrate is used as a mask to selectively grow an oxide layer. Forming an element isolation region, removing the oxidation-altered layer on the surface of the element isolation region, removing the oxidation resistant film, and forming a sacrificial oxide layer on the surface of the element isolation region. A method of manufacturing a semiconductor device, comprising: a step of removing the sacrificial oxide layer. 4. A method of manufacturing a semiconductor device, wherein a selectively formed oxide film is used as an element isolation region, wherein an oxidation resistant film covering the surface of the semiconductor substrate is formed, and the oxidation resistant film is formed by step etching. A step of forming an opening in the mask and tapering the edges of the mask made of the oxidation resistant film; and using the oxidation resistant film as a mask to selectively oxidize the surface of the semiconductor substrate to isolate the element isolation regions. And a step of removing the oxidized deterioration layer on the surface of the element isolation region, a step of removing the oxidation resistant film, a step of forming a sacrificial oxide film on the surface of the element isolation region, And a step of removing the sacrificial oxide film. 5. A method of manufacturing a semiconductor device, wherein a selectively formed oxide film is used as an element isolation region, wherein the element isolation region is etched after the sacrificial oxide film is removed. 5. The method of manufacturing a semiconductor device according to claim 2, further comprising the step of reducing the aspect ratio of the region.