JPH0713516A - Active matrix type liquid crystal display device - Google Patents

Abstract

PURPOSE:To realize a high-grade image display with a high opening rate and good and stable screen brightness by eliminating the flickers of displayed images, uneven brightness and seizure to be caused by the parasitic capacitances of TFT(thin-film transistor) switching elements and to be generated by the level shift of pixel electrode voltages without increasing auxiliary capacitances. CONSTITUTION:A pulse of the waveform displaced in a direction reverse (backward) from a scanning pulse to be impressed to the TFT switching element 105 in synchronization with the scanning pulse is impressed to the second TFT switching element 127, by which the voltage level shift displaced backward from the voltage level shift (DELTAVp) by the parasitic capacitance (Cgs) of the TFT switching element 105 is generated in the second TFT switching element 127 and the level shift (DELTAVp) is compensated.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix type liquid crystal display device.

[0002]

2. Description of the Related Art In recent years, liquid crystal display devices have been widely used as display elements for televisions, graphic displays, etc., due to their features such as thinness and low power consumption.

Among them, a thin film transistor (Thin Film Tr
An active matrix type liquid crystal display device that uses ansistor (hereinafter abbreviated as TFT) as a switching element has excellent high-speed response and is suitable for increasing the number of pixels. Some are expected to be realized, and some have already been put into practical use after being researched and developed.

The display element portion of this active matrix type liquid crystal display device is generally an active element array substrate having switching active elements such as TFTs and pixel electrodes connected thereto, and an active element array substrate facing the active element array substrate. A main part is composed of a counter substrate having counter electrodes formed thereon, a liquid crystal composition sandwiched between these substrates, and a polarizing plate attached to the outer surface side of each substrate. .

FIG. 12 is a diagram showing the structure of one pixel portion of a conventional active matrix type liquid crystal display device, and FIG. 13 is an equivalent circuit diagram thereof.

A TFT switching element 1205 is provided at each intersection of the signal wiring 1201 and the scanning wiring 1203, and its drain electrode (D) 1207 is the signal wiring 1201 and the gate electrode (G) 1209 is the scanning wiring 1.
In 203, the source electrode (S) 1211 is the pixel electrode 121.
3 are connected to each.

The pixel electrode 1213 and the counter electrode 121 connected to the counter electrode voltage generating circuit (not shown)
5 and the liquid crystal composition 1217 is sandwiched between them. Similarly to the counter electrode 1215, the auxiliary capacitance line 1219 and the pixel electrode 12 connected to the counter electrode voltage generation circuit (not shown).
A storage capacitor (Cs) 1 with an insulating film interposed between
221 is configured.

FIG. 14 is a diagram showing drive waveforms of one pixel in the conventional active matrix type liquid crystal display device having the structure shown in FIG. This FIG. 14 and the above FIG. 12,
Based on No. 13, the operation of the conventional active matrix type liquid crystal display device will be described.

As shown in FIG. 14A, the scanning pulse (VY) is applied to the gate electrode (G) 1209 of the TFT switching element 1205 through the scanning wiring 1203, and as shown in FIG. In order to avoid deterioration, a video signal voltage (VX) whose polarity is inverted around the reference potential (VT1) is applied to the signal wiring 1201 every frame period (TF).

Further, a counter electrode voltage (Vc) (not shown) whose polarity is inverted around the reference potential (VT1) in synchronization with the video signal voltage (VX) is applied to the counter electrode 1215. By reversing the polarity of the counter electrode voltage (Vc) in this manner, the processing circuit for the video signal voltage (VX) can be made to have a lower voltage than in the case where a DC voltage is used as the counter electrode voltage (Vc).

While the scanning pulse (VY) is being applied to the gate electrode (G) 1209 of the TFT switching element 1205 through the scanning wiring 1203, the video signal voltage (VX) is written in the pixel electrode 1213 and the pixel electrode 1
The pixel electrode potential (Vp) shown in FIG. 14B is held in 213.

As a result, during one frame period (TF), the potential difference between the pixel electrode potential (Vp) and the counter electrode potential (Vc) is held as the liquid crystal applied voltage in the liquid crystal capacitor (Clc) mainly composed of the liquid crystal composition 1217. Then, the liquid crystal composition 1217 is excited and display is performed. The potential difference between the auxiliary capacitance line potential set to the same potential as the counter electrode voltage (Vc) and the pixel electrode potential (Vp) is the auxiliary capacitance (Cs) 1221.
The display is maintained for one frame period (TF) by compensating for the temporal variation of the potential difference held in the liquid crystal capacitor (Clc).

[0013]

However, the TFT
Gate electrode (G) 1209 of switching element 1205
A parasitic capacitance (Cgs) exists between the source electrode (S) 1211 and the source electrode (S) 1211, as shown in FIG. Due to the parasitic capacitance (Cgs) 1223 of the TFT switching element 1205, when the scan pulse (VY) falls (displacement between a high level and a low level), the liquid crystal applied voltage is changed to the voltage shown in FIG.
The level shift (ΔVp) shown in (b) occurs.

Due to the parasitic capacitance (Cgs) 1223 of the TFT switching element 1205, a variation (ΔVp) called a level shift occurs in the pixel electrode potential, which causes flicker, uneven brightness, burn-in, and gradation display in the displayed image. However, there is a problem in that halftone display defects called gray scale errors occur. This level shift (ΔVp
) Is a parasitic capacitance (Cgs) 1223 when the scanning voltage applied to the scanning wiring 1203 is changed from a so-called scan pulse, which is an on-state voltage (VG-on), to an off-state voltage (VG-off). It is considered that this is caused by the redistribution (leakage) of the accumulated charge due to. The voltage ΔVp of such a level shift (ΔVp)
[V] is the amplitude (VG-on and VG-off of the scan pulse (VY).
Let dVY [V] be the absolute value of the difference from
), The capacitance value of 1221 is Cs [F], the liquid crystal composition 121
When the liquid crystal capacitance (Clc) by 7 is Clc [F] and the value of the parasitic capacitance (Cgs) 1223 of the TFT switching element 1205 is Cgs [F], it can be expressed by the following equation. ΔVp = dVYCgs / (Cgs + Clc + Cs) For such level shift (ΔVp), for example, by applying a bias voltage to the counter electrode 1215 of the liquid crystal display device, the level shift (ΔVp) is compensated to display the displayed image. A method of suppressing flicker and uneven brightness is already known.

However, in the method of applying the bias voltage, since the average value of the voltage of the level shift (ΔVp) is simply applied to the counter electrode which is commonly opposed to each pixel, the level for each display pixel is not always required. Shift (ΔV
p) is not perfectly compensated at the optimal timing for its occurrence. Therefore, it cannot be said that the display defects such as flicker, display unevenness, and burn-in caused by the level shift (ΔVp) are not always effectively eliminated. In addition, the parasitic capacitance (Cgs) 1 between the gate electrode (G) 1209 and the source electrode (S) 1211
It is practically impossible to erase 223 itself.
Therefore, in order to solve the above-mentioned problem, a method has been proposed in which the value of the auxiliary capacitance (Cs) is increased and the level shift (ΔVp) is supplemented by the auxiliary capacitance (Cs).

However, the auxiliary capacitance (Cs) 1221
To increase the value of, the auxiliary capacitance (Cs) 1221
However, there is a problem that the aperture ratio of the pixel is sacrificed by the occupied area.
Further, when forming the auxiliary capacitance (Cs) having such a large area, the upper and lower electrodes and the interlayer insulating film which is a dielectric must be formed defect-free so that defects such as pinholes do not occur over a large area. However, this is extremely difficult in practice and there is a problem that defects such as pinholes are likely to occur in the auxiliary capacitance (Cs) having a large area. Alternatively, if the auxiliary capacitance (Cs) 1221 is formed while avoiding the pixel portion (so-called non-pixel portion), the auxiliary capacitance (Cs) 1221 is allocated to the scanning wiring 1203, the signal wiring 1201, the TFT switching element 1205, and the like to be formed in the non-pixel portion. There is a problem in that the area is sacrificed, the structure inside the liquid crystal display element becomes excessively dense, and manufacturing is actually difficult. Moreover, this becomes a more remarkable problem particularly in the liquid crystal display device in which high definition is required.

As described above, in the conventional liquid crystal display device, due to the level shift (ΔVp) of the pixel electrode voltage due to the parasitic capacitance of the TFT switching element 1205, display defects such as flicker, uneven brightness, and burn-in occur in the display image. There was a problem of doing.

And such a level shift (ΔVp)
In order to solve the problem by increasing the value of the auxiliary capacitance (Cs), it is extremely inconvenient for high definition of the liquid crystal display device, and there is a problem that its manufacture becomes practically difficult.

The present invention has been made to solve such a problem, and its purpose is to achieve a level shift (ΔVp) of the pixel electrode voltage caused by the parasitic capacitance (Cgs) of the TFT switching element. Active matrix type that eliminates flicker, uneven brightness, and burn-in of generated display images without increasing the auxiliary capacitance (Cs) and realizes stable, high-quality image display with high aperture ratio and good screen brightness. An object is to provide a liquid crystal display device.

[0020]

In order to solve the above problems, an active matrix type liquid crystal display device of the first invention comprises a plurality of scanning wirings and a plurality of signal wirings which are formed so as to intersect each other on a substrate. A thin film transistor switching element array substrate having a plurality of thin film transistor switching elements formed at intersections of the scanning wiring and the signal wiring and connected to the scanning wiring and the signal wiring, and a pixel electrode connected to the thin film transistor switching element. A counter substrate having counter electrodes formed on the thin film transistor switching element array substrate with a gap therebetween, and a liquid crystal composition sealed between the thin film transistor switching element array substrate and the counter substrate. A scan driver circuit for applying a scan voltage to the scan wiring; In the active matrix type liquid crystal display device having a signal driver circuit for applying a signal voltage to the signal line, the gate is connected to the scanning line different from the scanning line connected to the thin film transistor switching element, and the drain and the source are short-circuited. Applying a scanning pulse to the second thin film transistor element connected to the pixel electrode and the scanning wiring connected to the thin film transistor switching element, and applying the scanning pulse for compensation which is displaced in the reverse direction of the scanning pulse to the second scanning line. And a scan driver circuit for applying to a scan wiring connected to the gate of the thin film transistor element.

The active matrix type liquid crystal display device of the second invention is the active matrix type liquid crystal display device described above, wherein the gate of the second thin film transistor element is in front of the scanning wiring connected to the thin film transistor switching element. Connected to the adjacent or adjacent scan wirings, the scan driver circuit applies the scan pulse to the scan wiring connected to the thin film transistor switching element, and inverts the scan pulse during the scan selection period. It is characterized in that a compensating scanning pulse displacing in the direction is applied to the adjacent scanning wirings at the front or rear of the scanning wirings.

Further, in the active matrix type liquid crystal display device of the third invention, a plurality of scanning wirings and a plurality of signal wirings formed so as to intersect each other on the substrate and each intersection of the scanning wirings and the signal wirings. A thin film transistor switching element array substrate having a plurality of thin film transistor switching elements formed and connected to the scanning wiring and the signal wiring and a pixel electrode connected to the thin film transistor switching element, and a gap between the thin film transistor switching element array substrate. And a liquid crystal composition enclosed between the thin film transistor switching element array substrate and the counter substrate, and a scan driver circuit for applying a scan voltage to the scan wiring. And a signal driver that applies a signal voltage to the signal wiring. In an active matrix type liquid crystal display device having a bus circuit, a first electrically conductive type liquid crystal display device is formed so as to be electrically insulated and substantially overlap with an adjacent scanning line in front of or behind the scanning line connected to the thin film transistor switching element. No. 2 scan line, a second thin film transistor element having a gate connected to the second scan line and a drain and a source short-circuited to be connected to the pixel electrode, and a scan line connected to the thin film transistor switching element. A second scan driver circuit for applying to the second scan wiring a compensating scan pulse that is displaced in the direction opposite to the scan pulse during the scan period immediately before or after the scan driver circuit applies the scan pulse to It is characterized by having.

Further, in the active matrix type liquid crystal display device of the fourth invention, a plurality of scanning wirings and a plurality of signal wirings formed so as to intersect each other on the substrate and each intersection of the scanning wirings and the signal wirings. A thin film transistor switching element array substrate in which a plurality of thin film transistor switching elements, which are formed and have gates connected to the scanning wirings and drains connected to the signal wirings, and pixel electrodes connected to sources of the thin film transistor switching elements are arranged, and the thin film transistor. In the switching element array substrate, a counter substrate having counter electrodes arranged to face each other with a gap, a liquid crystal composition sealed between the thin film transistor switching element array substrate and the counter substrate, and the scanning wiring are provided. A scan driver circuit for applying a scan voltage and the signal distribution In the active matrix type liquid crystal display device having a signal driver circuit for applying a signal voltage to the gate, the gate is connected to the scanning wiring to which the gate of the thin film transistor switching element is connected via an inverter element, and the drain and the source are short-circuited. And a second thin film transistor element connected to the pixel electrode and having a gate-source parasitic capacitance substantially equal to the gate-source parasitic capacitance of the thin film transistor switching element.

[0024]

In the active matrix type liquid crystal display device according to the present invention, the second thin film transistor element is displaced in the reverse (reverse) direction of the scan pulse in synchronization with the scan pulse applied to the thin film transistor switching element. By applying the waveform pulse, the second voltage level shift that is displaced opposite to the voltage level shift (ΔVp) due to the parasitic capacitance of the thin film transistor switching element is generated.
Of the thin film transistor element, and the level shift (ΔVp) of the pixel electrode voltage is compensated by the voltage level shift which is displaced in the opposite direction. Therefore, it depends on the conventional method of increasing the value of the auxiliary capacitance (Cs). No need to
The area occupied by the second thin film transistor element is the auxiliary capacitance (C
Since the area occupied by the second thin film transistor element is smaller than the area occupied by the second thin film transistor element, the decrease in the aperture ratio can be suppressed to be smaller than the decrease in the aperture ratio when the auxiliary capacitance (Cs) is increased. Therefore, the aperture ratio of the pixel can be increased.

At this time, in the first and second inventions, the second scanning wiring connected to the second thin film transistor element for compensation is the scanning wiring connected to the switching TFT. The scanning line connected to the thin film transistor switching element is used without forming the second scanning line separately, and the level of the pixel electrode voltage is changed by changing the waveform of the scanning voltage applied to the scanning line as described above. Since the shift (ΔVp) is compensated, it is not necessary to additionally install the second scanning wiring and the like, and the area for forming the second scanning wiring is not sacrificed. Therefore, it is possible to avoid a decrease in the aperture ratio of the pixel and an excessive increase in wiring density.

Further, in the third aspect of the invention, since the second scanning wiring is provided so as to overlap the scanning wiring, the occupied area for attaching the second scanning wiring is not sacrificed. Therefore, it is possible to avoid a decrease in the aperture ratio of the pixel and an excessive increase in wiring density. Further, in the case of such a structure, an insulating film or the like must be interposed between the second scanning wiring and the scanning wiring in order to electrically insulate the scanning wiring from each other. There is a concern that an electric capacity may be formed between the scan wirings and the scan wirings to cause signal transmission delay, that is, waveform blunting of the scanning voltage or the like, and transmission delay. However, by applying the voltage having the same waveform as the scanning voltage applied to the scanning wiring to the second scanning wiring formed on the scanning wiring, the above-mentioned transmission delay does not occur. Therefore, inconveniences such as transmission delay can be avoided.

Further, in the fourth invention, a general conventional scan driver circuit may be used, it is necessary to provide a second scan driver circuit, and the output waveform of the scan driver circuit is changed to a special waveform. Since there is no need to do so, only the compensating TFT and the inverter element need to be provided, so the structure is extremely simple and the size of the entire device can be reduced, and such a liquid crystal display device can be easily manufactured. You can

[0028]

Embodiments of an active matrix type liquid crystal display device according to the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a diagram showing an active matrix type liquid crystal display device of a first embodiment according to the present invention as an equivalent circuit, and FIG. 2 is a diagram showing its planar structure.

In this active matrix type liquid crystal display device, a plurality of scanning wirings 101 and a plurality of signal wirings 103 are formed so as to intersect with each other on a substrate, and the intersections of the scanning wirings 101 and the signal wirings 103 are formed. A thin film transistor switching element (hereinafter abbreviated as TFT switching element) 105, a TFT switching element array substrate 109 in which a plurality of pixel electrodes 107 connected to the TFT switching element 105 are formed, and a gap is provided between the TFT switching element array substrate 109. And a counter substrate (not shown) on which a counter electrode 111 is formed to face each other, and the TFT switching element array substrate 10 described above.
9 and a counter substrate, a liquid crystal layer 113 in which a liquid crystal composition is sealed, a scan driver circuit 115 for applying a scan voltage to the scan wiring 101, and a signal driver circuit 117 for applying a signal voltage to the signal wiring 103. In the active matrix type liquid crystal display device having the above structure, the gate 121 is connected to the preceding scanning line 119 adjacent to the scanning line 101 connected to the TFT switching element 105, and the drain 123 and the source 125 are short-circuited. Second TFT element 1 connected to the pixel electrode 107
27 and a compensating scanning pulse that is displaced in the direction opposite to the scanning pulse in the scanning period immediately after the scanning pulse is applied to the scanning wiring 101 connected to the TFT switching element 105 are adjacent to the scanning wiring 101. The scan driver circuit 115 applied to the preceding scan wiring 119 and the counter electrode voltage application circuit 129 applying a voltage to the counter electrode 111.
Its main part is composed of and.

FIG. 3 is a sectional view taken along the line aa 'showing the layer structure of the active matrix type liquid crystal display device of the first embodiment having the above structure. FIG. 4 is a sectional view taken along the line bb '. The layer structure of the active matrix type liquid crystal display device of the first embodiment will be described along with its manufacturing process.

First, for example, Cr or the like is deposited on the glass substrate 131 by sputtering and patterned by photolithography to form the scanning wiring 101 (119) integrally formed with the gate electrode 106 (121). Then, after forming a gate insulating film 133 using, for example, SiO _x , an intrinsic amorphous silicon film 135 as a semiconductor layer and an n ⁺ amorphous silicon film 137 for making ohmic contact are sequentially formed, and further, for example, an ITO film. Is formed and patterned to form a pixel electrode 107.

Subsequently, for example, an aluminum (Al) film is deposited and patterned to form the second TFT element 12
7, the drain 123 and the source 125 are short-circuited, and an electrode pattern 139 is formed so as to be connected to the pixel electrode 107. On the other hand, in the TFT switching element 105, the aluminum (Al) film and n in a portion corresponding to the channel 141 are formed. ^{The +} amorphous silicon film 137 is removed by etching to form a source electrode 143 connected to the pixel electrode 107 and a drain electrode 145 connected to the signal wiring 103.

As is clear from comparison between FIGS. 3 and 4, the above-mentioned TFT switching element 105 and the second TF.
The T element 127 is formed to have substantially the same size. Here, the level shift (dVp) of the pixel electrode voltage, which is generally caused by the parasitic capacitance (Cgs) of the TFT element, depends on the element size and material of the TFT element, and corresponds to the amount of change in the applied scanning voltage. It becomes a value. Therefore, the above TFT
TFTs are formed so that the parasitic capacitances of the switching element 105 and the second TFT element 127 have substantially the same value, and scanning pulses whose displacement directions are opposite to each other are applied to the respective TFTs, thereby switching the TFTs. The level shift (dVp) generated in the element 105 is applied to the second TFT.
Inversion direction level shift (-dVp) that occurs in the element 127
), The level shift (dVp) can be eliminated. In this embodiment, the channel width (W ′) of the second TFT element 127 is set to half the channel width (W) of the TFT switching element 105, and the channel length (L) and gate of the TFT switching element 105 are set. The sum (L ') of the overlap length of 106 and the drain 145 and the overlap length of the gate 106 and the source 143, and the gate 121 and the drain 123 of the second TFT element 127.
And the overlap length (L ″) with the source 125 are formed to have substantially the same length. However, it goes without saying that the dimensional specifications of such an element are not limited to the above. TF
The parasitic capacitances of the T switching element 105 and the second TFT element 127 are formed to have substantially the same value, and the level shift (dVp) generated in the TFT switching element 105 is changed to the level shift in the inversion direction generated in the second TFT element 127. (-
It may be formed so that it can be effectively compensated by dVp.

The operation of the active matrix type liquid crystal display device having such a structure will be described by taking the pixel on the j-th row and the i-th column as an example. FIG. 5 is a diagram showing drive voltage waveforms used in the active matrix type liquid crystal display device of this embodiment.

When the scanning voltage (VY) applied to the scanning wiring 101 on the j + 1-th row in FIG. 2 changes from VG-off-1 to VG-on (changes to the scanning pulse potential), this j + 1-th row. Switching element 105 connected to scan line 101 for scanning
Is turned on (conducting), and the signal voltage (Vx) is written to the pixel electrode via the signal wiring 103 during the scanning selection period Tg. Then, when the scanning voltage (VY) changes from VG-on to VG-off-1 after the scanning selection period Tg has passed, the TFT
The switching element 105 is turned off (high resistance), but at this time, the level shift (dVp) tends to occur in the pixel electrode voltage due to the parasitic capacitance (Cgs).

Therefore, at this time, the gate of the second TFT element 127 whose source is connected to the same pixel electrode is connected to the j + 1th scanning line 101, which is the preceding scanning line adjacent to the j + 1th scanning line 101. Through the scanning wiring 119 for
The amplitude of the scanning pulse applied to the gate of the switching element 105 is almost the same as that of VG-off-2 to V in the opposite direction.
Applying a scanning pulse displacing to G-off-1, the second T
The FT element 127 has a displacement level shift (-dVp) opposite to that of the pixel electrode voltage level shift (dVp).
) Is generated, and the level shift (−
level shift (d) of the pixel electrode voltage by dVp
Vp) can be compensated to reduce the level shift dVp. However, when focusing on a certain scan line, the scan pulse of the next frame is applied to the previous scan line only for the last scan selection time of one frame, so a level shift (-dVp ') may occur. However, in a high-definition liquid crystal display device with a large number of scanning wirings, this is only a short time immediately before writing the signal voltage to the pixel electrode, so it is practically inconspicuous, and defects such as burn-in are also practical. It rarely happens. Further, another scanning line is required before the scanning line in the first row, but it goes without saying that this has practically no adverse effect on the manufacturing process and the occupied area.

When the active matrix type liquid crystal display device of the first embodiment as described above is driven and a test pattern is displayed on the screen and the display quality is visually inspected, it is bright and free from flicker and burn-in. An image display of extremely good display quality was obtained.

(Embodiment 2) FIG. 6 is a diagram showing the structure of an active matrix type liquid crystal display device of the second embodiment in an equivalent circuit manner, and FIG. 7 is a diagram showing its planar structure. For the sake of simplicity of illustration and description, the same parts as those in the first embodiment are designated by the same reference numerals in the second embodiment.

In the active matrix type liquid crystal display device of the second embodiment, the insulating film 70 is formed on the scanning wiring 101.
The second scanning wiring 703 is formed so as to substantially overlap with the first scanning wiring 703 through which the second TFT element 127 (the gate 121 thereof) is connected, and the second scanning wiring 703 is connected to the second scanning wiring 703. Is characterized in that a second scan driver circuit 705 is connected, and the other structure is almost the same as that of the first embodiment.

As shown in FIG. 8, the scanning wiring 101 is formed on the glass substrate 707, and the insulating film 701 is formed so as to cover the scanning wiring 101. The scanning wiring 101 is formed on the insulating film 701. Second so that it almost overlaps the formation position of
Scan wiring 703 is formed. The second scanning wiring 703 is formed independently of the scanning wiring 101 as shown in FIG.
A compensating scanning voltage having a waveform as shown in (1) is applied from the second scanning driver circuit 705.

As described above, in the active matrix type liquid crystal display device of the second embodiment, the second TF is used.
Since the second scanning wiring 703 connected to the gate 121 of the T element 127 is formed independently of the scanning wiring 101 connected to the TFT switching element 105, the voltage waveform applied to the second TFT switching element 105. The scanning voltage for compensation can be set independently of. Therefore, the degree of freedom of the scanning voltage waveform for compensation is higher than that of the first embodiment, and fine level shift voltage compensation is possible, and the parasitic capacitance of the second TFT element 127 is not necessarily the parasitic capacitance of the TFT switching element 105 ( Cgs) need not be limited to the same, and therefore the waveform and potential of the compensation scanning voltage are adjusted to values suitable for compensating the level shift (dVp) so that the pixel electrode voltage A more effective compensation effect for the level shift (dVp) can be obtained.

Further, at this time, since the second scanning wiring 703 is provided so as to overlap the scanning wiring 101, the occupied area for attaching the second scanning wiring 703 is not sacrificed.
Therefore, it is possible to avoid a decrease in the aperture ratio of the pixel and an excessive increase in wiring density.

Here, in the case of such a structure, the scanning wiring 101 and the second scanning wiring 70 arranged so as to overlap therewith are arranged.
3 must be electrically insulated, and for that purpose an insulating film 701 and the like must be interposed between them. At this time, there is a concern that an electric capacity may be formed between the second scan wiring 703 and the scan wiring 101 via the insulating film 701 to cause a signal transmission delay, that is, a waveform dullness such as a scanning voltage or a transmission delay. However, scan wiring 1
The voltage having the same phase as the scanning voltage applied to the first scan line 01 is also applied to the second scan line 703 formed on the scan line 101, that is, the scan line 101 and the second scan line 101 which overlap with each other in the period of Tg. The potentials of the scanning wirings 703 of both are VG-
Since the potential is turned on and the potential is the same, the above-mentioned transmission delay does not occur, and thus the deterioration of the writing ability of the TFT switching element 105 due to the transmission delay can be avoided. Such an action can be realized by using a voltage waveform as shown in FIG. 9, for example. Here, the voltage of the signal applied to the scan line 101 and the second scan line 703 is the same VG-on and VG-off.
This is for the most effective compensation of dVp and is not limited to this voltage alone.

When the active matrix type liquid crystal display device of the first embodiment as described above is driven and a test pattern is displayed on the screen and the display quality is visually inspected, it is bright and free from flicker and burn-in. An image display of extremely good display quality was obtained.

(Embodiment 3) FIG. 10 is a diagram showing the structure of an active matrix type liquid crystal display device of the third embodiment in an equivalent circuit manner, and FIG. 11 is a diagram showing the scanning voltage waveform thereof. For simplification of illustration and description, the same parts as those in the first embodiment are designated by the same reference numerals in the third embodiment.

In the active matrix type liquid crystal display device of the third embodiment, the inverter element 1 is connected to the scanning wiring 101 to which the gate of the TFT switching element 107 is connected.
The second TFT element 127 is connected to the pixel electrode 105 by connecting the gate 121 via 001 and the drain 123 and the source 125 are short-circuited, and is the gate of the TFT switching element 107.
The second TFT element 127 having a gate-source parasitic capacitance substantially equal to the source-source parasitic capacitance (Cgs) is provided, and the scan driver circuit performs scanning using a combination of a general scan pulse and a scan non-selection voltage. It is characterized in that a voltage waveform is output. And other structures are
This is almost the same as the first embodiment described above.

As described above, in the active matrix type liquid crystal display device of the third embodiment, as the scan driver circuit 115, a general conventional scan driver circuit for outputting a scan voltage waveform may be used. There is no need to additionally install the second scan driver circuit as used in the embodiment, or to change the output waveform of the scan driver circuit to a special waveform, and the second TFT element 127 and the inverter element 1001 for compensation are used. Since only this is required, the structure is extremely simple, the overall size of the device can be reduced, and such a liquid crystal display device can be easily manufactured.

Here, the level shift (dVp) compensation effect is determined by the magnitude of the parasitic capacitance determined by the element size and material of the second TFT element and the magnitude of the scanning voltage applied to its gate. Therefore, when the same scanning voltage as that applied to the TFT switching element is also applied to the second TFT element as in the case of the present embodiment, the level shift (dVp) compensation effect is the same as that of the second TFT element. It depends on the size of the parasitic capacitance which depends on the element size and the material of the second TFT element. For this reason,
The size of the parasitic capacitance of the TFT switching element and the second T
It is necessary to adjust the size of the parasitic capacitance of the FT element to be almost the same.

In this embodiment, the layer structure of the TFT switching element and the layer structure of the second TFT element are almost the same as those shown in FIGS. The channel width (W ') of the TFT element is T
1/2 of the channel width (W) of the FT switching element,
The sum of the channel length (L) of the TFT switching element 105, the overlap length of the gate 106 and the drain 145 and the overlap length of the gate 106 and the source 143 (L ′), and the gate 12 of the second TFT element 127.
1 and the overlap length (L ″) of the drain 123 and the source 125 are formed to have substantially the same length, and TF
Level shift (dVp by T switching element 105)
) With a value almost equal to the value of
dVp) is generated in the second TFT element 127.

Further, as the inverter element 1001,
The structure of a general inverter element, which is formed by connecting two TFTs in parallel, is adopted. In the inverter element 1001 composed of this TFT, the output waveform of the inverter element is from the scan driver circuit 115 to the scan wiring 101.
The waveform was set to be almost the same as the waveform of the scanning voltage input to (but in the opposite direction). In the present embodiment, the size of the TFT forming the inverter element 1001 is set so that the compensation scanning signal which is the output of the inverter approaches the signal obtained by inverting the scanning signal as close as possible. For example, the channel width of this one TFT is equal to that of the TFT switching element, and the channel length of that TFT is set to three times that of the TFT switching element. The channel width of the other TFT is T
Channel length is 4 times that of FT switching element
Same as FT switching element. However, it goes without saying that the element size of the TFT forming such an inverter element is not limited to the above embodiment.

By forming such a structure, as shown in FIG. 11, the TF connected to the j-th scanning wiring is connected.
A scanning pulse (VG-
on; this is shown in FIG. 11 (a),
Inverter element 1 connected to the jth scan line 101
11 to the second TFT element 127 through 001.
A scan pulse (-VG-on) having an amplitude substantially equal to that of the scan pulse (VG-on) as shown in (b) is applied, and the scan pulse (-VG-on) having the reverse waveform causes the second pulse. Voltage level shift (-dVp) to the TFT element 127 of
Occurs, and the level shift (dV) of the pixel electrode voltage due to the parasitic capacitance (Cgs) of the TFT switching element 105 occurs.
p) can be effectively eliminated as shown in FIG. Here, the scanning pulse of inverted waveform (-VG-on)
As shown in FIG. 11B, the waveform has a slightly dull waveform due to the internal resistance of the inverter element and the like, but this waveform dullness has practically no problem in the compensation effect of the voltage level shift (dVp). Alternatively, the inverter element 10
The internal resistance of 01 may be further reduced to obtain a waveform closer to the scan pulse (VG-on).

When the active matrix type liquid crystal display device of the third embodiment as described above was driven and a test pattern was displayed on the screen and the display quality was visually inspected, it was bright and free from flicker and burn-in. An image display of extremely good display quality could be obtained.

In the above embodiments, the liquid crystal applied voltage holding characteristics in the liquid crystal layer are good, and the voltage level shift (dVp) is reduced by the auxiliary capacitance (Cs) according to the present invention.
Since it can be solved without depending on the
Although s) is omitted, the present invention is not limited to this. It goes without saying that the technique of the present invention may be used together with the auxiliary capacitance (Cs).

In addition, it goes without saying that various changes can be made to the material forming each part of the liquid crystal display device of the present invention without departing from the scope of the present invention.

[0056]

As described above in detail, according to the present invention, the parasitic capacitance (Cg
s) caused by the level shift of the pixel electrode voltage (Δ
The flicker, uneven brightness, and burn-in of the display image caused by Vp) are eliminated without increasing the auxiliary capacitance (Cs), and a stable high-quality image display with a high aperture ratio and good screen brightness is realized. An active matrix type liquid crystal display device can be provided.

[Brief description of drawings]

FIG. 1 is an equivalent circuit diagram of an active matrix type liquid crystal display device according to a first embodiment.

FIG. 2 is a diagram showing a planar structure of an active matrix type liquid crystal display device of the first embodiment.

FIG. 3 is an aa ′ sectional view showing the layer structure of the active matrix liquid crystal display device of the first embodiment.

FIG. 4 is a bb ′ sectional view showing a layer structure of the active matrix type liquid crystal display device of the first embodiment.

FIG. 5 is a diagram showing a scanning voltage waveform and a signal voltage waveform used in the active matrix type liquid crystal display device of the first embodiment.

FIG. 6 is a diagram showing a structure of an active matrix type liquid crystal display device of a second embodiment in an equivalent circuit diagram.

FIG. 7 is a diagram showing a planar structure of an active matrix type liquid crystal display device of a second embodiment.

FIG. 8 is a cross-sectional view showing the structure in the vicinity of a second scanning wiring in the active matrix type liquid crystal display device of the second embodiment.

FIG. 9 is a diagram showing a scanning voltage waveform and a signal voltage waveform used in the active matrix type liquid crystal display device of the second embodiment.

FIG. 10 is a diagram showing a structure of an active matrix type liquid crystal display device of a third embodiment in an equivalent circuit manner.

FIG. 11 is a diagram showing a scanning voltage waveform and a signal voltage waveform used in the active matrix type liquid crystal display device of the third embodiment.

FIG. 12 is a diagram showing a planar structure of one pixel portion of a conventional active matrix type liquid crystal display device.

FIG. 13 is an equivalent circuit diagram of one pixel portion of a conventional active matrix type liquid crystal display device.

FIG. 14 is a diagram showing a scanning voltage waveform and a signal voltage waveform used for one pixel of a conventional active matrix type liquid crystal display device.

[Explanation of symbols]

101 ... Scan wiring, 103 ... Signal wiring, 105 ... TFT
Switching element, 106 ... Gate electrode, 107 ... Pixel electrode, 109 ... TFT switching element array substrate, 1
11 ... Counter electrode, 113 ... Liquid crystal layer, 115 ... Scan driver circuit, 117 ... Signal driver circuit, 119 ... Scan wiring, 121 ... Gate, 123 ... Drain, 125 ... Source, 127 ... Second TFT element, 129 ... Opposed Electrode voltage application circuit

Claims (4)

[Claims] 1. A plurality of scanning wirings and a plurality of signal wirings formed so as to intersect with each other on a substrate, and each scanning wiring and a crossing portion of the signal wirings formed at each intersection and connected to the scanning wirings and the signal wirings. A thin film transistor switching element array substrate having a plurality of thin film transistor switching elements and a plurality of pixel electrodes connected to the thin film transistor switching element, and a counter electrode having a counter electrode disposed facing the thin film transistor switching element array substrate with a gap therebetween. A substrate, a liquid crystal composition enclosed between the thin film transistor switching element array substrate and the counter substrate, a scan driver circuit for applying a scan voltage to the scan wiring, and a signal driver for applying a signal voltage to the signal wiring. In an active matrix liquid crystal display device having a circuit A second thin film transistor element having a gate connected to a scan line different from the scan line connected to the thin film transistor switching element and having a drain and a source short-circuited to be connected to the pixel electrode; A scan driver circuit is provided for applying a scan pulse to the scan line connected thereto and for applying a compensating scan pulse that is displaced in a direction opposite to the scan pulse to the scan line connected to the gate of the second thin film transistor element. An active matrix type liquid crystal display device characterized by the above. 2. The active matrix type liquid crystal display device according to claim 1, wherein a gate of the second thin film transistor element is connected to an adjacent scanning wiring before or after a scanning wiring connected to the thin film transistor switching element. The scanning driver circuit is connected, the scanning pulse is applied to the scanning wiring connected to the thin film transistor switching element, and the scanning pulse for compensation is displaced in the reverse direction of the scanning pulse during the scanning selection period. An active-matrix liquid crystal display device, characterized in that the voltage is applied to adjacent scan lines in front of or behind scan lines. 3. A plurality of scanning wirings and a plurality of signal wirings formed so as to intersect with each other on a substrate and each scanning wiring and a crossing portion of the signal wirings formed at each intersection and connected to the scanning wirings and the signal wirings. A thin film transistor switching element array substrate having a plurality of thin film transistor switching elements and a plurality of pixel electrodes connected to the thin film transistor switching element, and a counter electrode having a counter electrode disposed facing the thin film transistor switching element array substrate with a gap therebetween. A substrate, a liquid crystal composition enclosed between the thin film transistor switching element array substrate and the counter substrate, a scan driver circuit for applying a scan voltage to the scan wiring, and a signal driver for applying a signal voltage to the signal wiring. In an active matrix liquid crystal display device having a circuit A second scanning line electrically insulated from and substantially overlapping the adjacent scanning lines in front of or in the rear of the scanning lines connected to the thin film transistor switching element; and the second scanning line. The scan driver circuit applies a scan pulse to a second thin film transistor element in which a gate is connected to a wire and a drain and a source are short-circuited to be connected to the pixel electrode, and a scan wire connected to the thin film transistor switching element. An active matrix type, comprising: a second scan driver circuit that applies a compensating scan pulse, which is displaced in a direction opposite to that of the scan pulse, to the second scan line during a scan period immediately before or after the scan pulse. Liquid crystal display device. 4. A plurality of scanning wirings and a plurality of signal wirings formed so as to intersect with each other on a substrate, and a gate connected to the scanning wirings formed at each intersection of the scanning wirings and the signal wirings. A thin film transistor switching element array substrate in which a plurality of thin film transistor switching elements whose drains are connected to and pixel electrodes connected to the sources of the thin film transistor switching elements are arranged,
A counter substrate on which counter electrodes are formed on the thin film transistor switching element array substrate so as to face each other with a gap; a liquid crystal composition enclosed between the thin film transistor switching element array substrate and the counter substrate; A scan driver circuit for applying a scan voltage to the wiring,
In an active matrix type liquid crystal display device having a signal driver circuit for applying a signal voltage to the signal wiring, a gate is connected via an inverter element to a scanning wiring to which the gate of the thin film transistor switching element is connected, and a drain and A source is short-circuited and connected to the pixel electrode, and a second thin film transistor element having a gate-source parasitic capacitance substantially equal to a gate-source parasitic capacitance of the thin film transistor switching element is provided. Matrix type liquid crystal display device.