JPH07129427A - Comparative check method for data with ecc code - Google Patents

Abstract

PURPOSE:To unnecessitate a large scale comparator circuit composed of a comparator corresponding to bits by comparing data read out of two processors while using an ECC check circuit. CONSTITUTION:Concerning the data comparative check method for duplex processors 1 and 1' provided with no data check mechanism, an ECC code (2) is generated by data (1) for transfer from one processor 1 of the duplex processors, and data (1)' for comparison from the other processor 1' are linked to that ECC code (2) and inputted to an ECC check circuit 21. Corresponding to the checked result at this ECC check circuit 21, the normality of the data (1) for transfer from one processor 1 is confirmed. Namely, the data (1) and (1)' for transfer and comparison are compared not by using any comparator circuit for all the bits of normal data but by using an ECC mechanism to be used only for reading data written in a RAM 3.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data comparison check method in a duplex processor which does not have a data check mechanism.

With the recent diversification of data processing, it is required to mount various circuit blocks on a highly integrated circuit (LSI) that constitutes a data processing device. Therefore, even in a highly integrated circuit (LSI) for data comparison check in a redundant processor that does not have a data check mechanism, unnecessary circuits are deleted as much as possible, and other important circuit blocks can be mounted. Is required.

[0003]

2. Description of the Related Art FIG. 5 is a diagram for explaining a conventional data comparison method. Normally, the integrated processor (MPU) 1 does not have a data guarantee circuit such as parity and ECC, and in order to improve the reliability of the data processing device using the processor (MPU) 1, the processor (MPU) 1 MPU) 1 plus processor
(MPU) 1'is prepared and duplicated, and each processor (M
PU) 1,1 'executes the same program, and the output data,' from each processor (MPU) 1, 1'is compared bit by bit by the comparison circuit 23 to confirm the normality of the data. ing.

At this time, the data from one processor (MPU-A) 1 is used as transfer data, and the data from the other processor (MPU-B) 1'is used as comparison data. .

Hereinafter, a duplicated processor (MPU-
A conventional comparison check method of the transfer data and the comparison data 'output from A) 1, (MPU-B) 1'will be specifically described.

First, the data for transfer from one processor (MPU-A) 1 is compared with the highly integrated circuit for data comparison check.
(Hereinafter simply referred to as LSI) 2. Also, compare data 'from the other processor (MPU-B) 1'with the same
Transfer to LSI 2.

Two transfer data and comparison data
'And are compared by a comparison circuit 23 composed of a bit corresponding comparator. At the same time, the transfer data is transferred to the EC
The C code is input to the C generation circuit 20 to generate the ECC code (ECC-A), and the comparison circuit 23 succeeds in the comparison (that is,
Then, the transfer data and the ECC code (ECC-A) are transferred to a random access memory (hereinafter, RA).
Write to 3).

Next, when reading the data {transfer data + ECC code (ECC-A)} written in the RAM 3, the read data is checked by the ECC check circuit 21 in the LSI 2 and read. After confirming the normality of the data and confirming that it is normal, the data is transferred to the redundant processor (MPU-A) 1, (MPU-B) 1 '.

When an error is detected in the confirmation of the normality of the read data, the correction circuit 22 corrects the error, and then the redundant processor (MPU-A) 1, (MPU-B) is used.
Transferred to 1 '.

In this way, even in a processor that does not have a data guarantee circuit such as parity and ECC, data when writing to RAM 3 and when transferring to processor (MPU-A) 1, (MPU-B) 1 ' You can check the normality of.

[0011]

However, the comparison circuit 23 is required to confirm the normality when the above-mentioned conventional transfer data and comparison data 'are written to the RAM 3,
Data read from the processor (MPU-A) 1, (MPU-A
B) The ECC check circuit 21 and the collect circuit 22 are required at the time of transfer to 1 ', and the ECC check circuit 21
And the collect circuit 22 includes a processor (MPU-A) 1 and (MPU-A)
B) There was a problem that it was not used when writing from 1'to RAM 3 and was not efficient.

In view of the above-mentioned conventional drawbacks, the present invention provides a method of comparing data in a duplex processor which does not have a data check mechanism, in which data written in RAM 3 is used without using a comparison circuit for all bits of normal data. Method to check the comparison between the transfer data and the comparison data 'using the ECC mechanism that is used only at the time of reading, to reduce the circuit in LSI 2 and to use the circuit efficiently It is intended to provide.

[0013]

FIG. 1 is a diagram for explaining the principle of the present invention. The above problem is the EC configured as follows
It is solved by a method of comparing and checking data by C code.

(1) A data comparison check method in a duplexed processor 1,1 ′ which does not include a data check mechanism, wherein an ECC code is generated by using transfer data from one processor 1 of the duplexed processor, and the generation is performed. The comparison data 'from another processor 1'is connected to the ECC code and input to the ECC check circuit 21, and the check result in the ECC check circuit 21 indicates that the transfer data from the one processor 1 is normal. It is configured to check the sex.

(2) A data comparison check method in a duplexed processor 1,1 'which does not include a data check mechanism, in which transfer data from one processor 1 of the duplexed processor is input to an ECC generation circuit 20. ,
An ECC code is generated, the comparison data 'from the other processor 1'is input to the ECC check circuit 21 to generate an ECC code', and the EC of the transfer data is
The C code and the ECC code of the comparison data are compared to confirm the normality of the transfer data.

[0016]

That is, in the comparison check method of two data according to the present invention, if the two data, 'are correct, the ECC code generated by one of the transfer data is connected to the other comparison data', and the ECC is connected. Paying attention to the fact that the ECC check succeeds even if input to the check circuit, an ECC code is generated by the transfer data from one processor 1 of the duplex processor, and the generated ECC code is used by the other processor 1 ′. Data for comparison 'from the one processor 1 is connected and input to the ECC check circuit 21, and the normality of the transfer data from the one processor 1 is confirmed by the check result in the ECC check circuit 21. .

Further, if the two data, 'are correct, paying attention to the fact that the ECC code generated by one of the transfer data and the ECC code generated by the comparison data' match with each other, paying attention to the duplex processor. The data for transfer from one processor 1 is transferred to the ECC generation circuit 2
Input to 0 to generate an ECC code, and input the comparison data 'from the other processor 1'to the ECC check circuit 21 to generate an ECC code' and compare it with the ECC code of the transfer data. Data 'for E
The CC code 'is compared to confirm the normality of the transfer data.

In either method, the data comparison method according to the present invention uses two processors (MPU-A) 1 and (MPU-B).
Based on the data read from 1'and the comparison result of ', the data from processor (MPU-A) 1 for data transfer is written to RAM 3 at the timing
E for checking the normality of the data read from
In consideration of the fact that the CC check circuit 21 is not used, the ECC check circuit 21 is used to compare the data read from the two processors (MPU-A) 1 and (MPU-B) 1 ', Therefore, a large-scale comparator circuit composed of bit-compatible comparators used in the conventional method 2
3 is no longer necessary and the circuit in the LSI is reduced,
By using the ECC check circuit 21 at the time of writing to the RAM 3 and at the time of data transfer to the two processors (MPU-A) 1 and (MPU-B) 1 ', the ECC check circuit 21 There is an effect that the usage efficiency can be improved.

[0019]

Embodiments of the present invention will be described in detail below with reference to the drawings. The above-mentioned FIG. 1 is a diagram for explaining the principle of the present invention.
FIG. 3 is a diagram showing an embodiment of the present invention.

In the present invention, the data for transfer from one processor (MPU-A) 1 of the duplex processor is E
A CC code is generated, and the generated ECC code is
The comparison data 'from the other processor (MPU-B) 1'is connected and input to the ECC check circuit 21, and the check result in the ECC check circuit 21 causes the one processor (MPU-A) 1 A means for confirming the normality of the transfer data or the transfer data from one processor (MPU-A) 1 of the redundant processor is input to the ECC generation circuit 20 to generate an ECC code, and the other processor (MPU-B) 1'Comparison data 'from ECC
A means for inputting to the check circuit 21 to generate an ECC code 'and comparing the ECC code of the transfer data with the ECC code of the comparison data' to confirm the normality of the transfer data is It is a necessary means for carrying out the present invention. The same reference numerals indicate the same objects throughout the drawings.

The data comparison check method using the ECC code according to the present invention will be described below with reference to FIGS. 2 and 3 with reference to FIG. Even when the present invention is used, the EC for transfer data read from the transfer processor (MPU-A) 1
When the C code is added and the data written in RAM 3 is read and the ECC check circuit 21 performs an ECC check and the check result is normal, the two processors (MPU-A) 1, (MPU-B) 1 Since there is no particular difference from the conventional method, the means for transferring to
PU-A) 1, (MPU-B) 1 ', and the transfer data read from
The operation for comparing and comparing the comparison data 'with the ECC check circuit 21 will be mainly described.

One data comparison check method will be described with reference to FIG. First, the transfer data (32 bits) is transferred from the processor (MPU-A) 1 to the LSI 2. Transfer the comparison data (32 bits) 'from the processor (MPU-B) 1'provided for data comparison to the LSI 2.

The transfer data is transferred to the ECC generation circuit 20.
To generate the ECC code A (ECC-A) (6 bits), add the generated ECC code A (ECC-A) to the comparison data ', and add it to the OR circuit (OR). The data is input to the ECC check circuit 21 via 24 and a known ECC check is performed using the comparison data '+ ECC code A.

When the normality of the comparison data '+ ECC code A can be confirmed by the ECC check in the ECC check circuit 21, the comparison data' and the transfer data are originally the same data. It can be said that the transfer data is normal.

Next, another data comparison check method will be described with reference to FIG. First, the transfer data (32 bits) is transferred from the processor (MPU-A) 1 to the LSI 2. Processor provided for data comparison (MPU-B) 1 '
Compare data (32 bits) 'is transferred to LSI 2.

The ECC code A (ECC-A) (6 bits) is generated from the transfer data by the ECC generation circuit 20. The ECC check circuit 21 is conceptually shown in FIG. That is, the input data register 210,
Input data (32 bits) to the ECC code register 211.
When the ECC code (6 bits) is set, the circuit having the same configuration as the ECC code generation circuit and the ECC
It is input to a syndrome signal generation unit 213 composed of a code conversion circuit for codes (6 bits), and depending on the contents of the input data register 210 and the ECC code register 211, the input data register 210, or the ECC
If the content of the code register 211 has an error, a syndrome signal is generated by the syndrome signal generation unit 213, and if there is no error, the syndrome signal is not generated.

In the collect circuit 22, the input data at the bit position indicated by the syndrome signal or the EC
The C code is inverted to correct the error bit occurring at any bit position of the input data and ECC code.

Since the ECC check circuit 21 is configured in this way, the comparison data 'is input to the ECC check circuit 21 and the syndrome signal generator 213 is input.
By setting all the output signals of the ECC code register 211 to “0”, the syndrome signal generated above acts as an ECC code, and an ECC code 'for the comparison data' is generated.

In this embodiment, the ECC generation circuit
The ECC code for the transfer data generated in 20 and the EC for the comparison data 'generated in the syndrome signal generation unit 213 of the ECC check circuit 21.
By comparing the C code 'with an ECC code comparison circuit (however, a circuit having a small size of 6 bits) 25, the transfer data and the comparison data' are compared and a small comparison circuit performs comparison check. be able to. When a coincidence output is obtained by this comparison, it can be said that the transfer data is correct.

As described above, according to the present invention, in the data comparison method in the duplicated processor having no data check mechanism, the ECC code is generated by the transfer data from one of the duplicated processors, and the generated ECC code is generated. , Connect the comparison data 'from another processor, and input it to the ECC check circuit,
Check the normality of the transfer data. An ECC code is generated from the transfer data, and the comparison data is generated.
'Into the ECC check circuit and enter the ECC code
'Is generated and the ECC code of the transfer data is compared with the ECC code of the comparison data' to check the normality of the transfer data.

[0031]

As described above in detail, according to the data comparison check method using the ECC code of the present invention,
Based on the comparison result of the data read from the two processors (MPU-A) 1 and (MPU-B) 1 ', write the data from the processor (MPU-A) 1 for data transfer to RAM 3. At the timing, considering that the ECC check circuit for checking the normality of the data read from the RAM 3 is not used, the ECC check circuit is not used.
21 using two processors (MPU-A) 1, (MPU-A)
B) Since the data read from 1 ',' is compared, a large-scale comparison circuit composed of a bit-corresponding comparator used in the conventional method is not required, and
Reducing the circuit in the LSI and using the ECC check circuit in RAM
Usage efficiency for the ECC check circuit 21 by using it at the time of writing to 3 and at the time of transferring the read data from RAM 3 to two processors (MPU-A) 1 and (MPU-B) 1 '. There is an effect that can improve.

[Brief description of drawings]

FIG. 1 is an explanatory view of the principle of the present invention.

FIG. 2 is a diagram showing an embodiment of the present invention (No. 1).

FIG. 3 is a diagram showing an embodiment of the present invention (part 2).

FIG. 4 is a diagram conceptually showing an ECC check circuit.

FIG. 5 is a diagram illustrating a conventional data comparison method.

[Explanation of symbols]

1 Data transfer processor (MPU-A) 1'Data comparison processor (MPU-B) 2 Highly integrated circuit (LSI) for data comparison check 20 ECC generation circuit 21 ECC check circuit 210 Input data register 211 ECC code register 213 Syndrome signal generator 22 Correct circuit 23 Comparison circuit 24 OR circuit (OR) 25 ECC code comparison circuit 3 Random access memory (RAM) Transfer data'Comparison data Transfer data ECC code'Comparison data 'ECC code

Claims (2)

[Claims] 1. A data comparison check method in a duplex processor (1, 1 ') not provided with a data check mechanism, wherein an ECC code () is used for transfer data () from one processor (1) of the duplex processor. ) Is generated, and the generated ECC code () is connected to the comparison data (') from another processor (1') to generate an ECC check circuit (21).
ECC to confirm the normality of the transfer data () from the one processor (1) based on the check result in the ECC check circuit (21).
How to compare and check data by code. 2. A data comparison check method in a duplex processor (1,1 ′) not provided with a data check mechanism, wherein transfer data () from one processor (1) of the duplex processor is converted into an ECC generation circuit. Enter in (20), EC
C code () is generated, and comparison data (') from the other processor (1') is converted into E
The ECC code (') is generated by inputting it to the CC check circuit (21), and the ECC code () of the transfer data () is generated.
And the ECC code (') of the comparison data (') are compared with each other to confirm the normality of the transfer data ().