JPH0712038B2 - Semiconductor substrate processing method - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for treating a semiconductor substrate, and a surface treatment for removing contamination, crystal defects, etc. generated in a silicon substrate by dry etching such as plasma etching. It is particularly suitable for use in.

Background art and its problems Reactive ion etching (hereinafter referred to as "RIE"), reactive or radiation damage that occurs in a semiconductor substrate during processing by normal ion milling, or contamination by organic substances or heavy metals, etc. It is an unavoidable by-product for anisotropic etching, selection of material, etchability, fine workability and proper process speed (etching rate). Moreover, it is generally known that the above-mentioned contamination and radiation damage bring about various unfavorable results due to the electrical characteristics of the semiconductor device.

Taking etching of a SiO ₂ thin film on a Si substrate as an example, (1) increase in contact resistance and non-ohmicity, and increase in variations in distribution of contact resistance within IC chip and within wafer. For example, in an AD converter, variations in the contact resistance value in the IC chip greatly affect the operating characteristics of the AD converter, and also affect the yield (works as a single transistor, but does not work as an IC. ).

(2) Reduction of carrier life in Si.

(3) Increase of leakage current of pn junction and increase of SiO ₂ -Si interface charge density.

(4) Other devices sensitive to defects in Si, such as C
Even if a CD or laser is used with a structure in which radiation damage or contamination reaches the electrically active region, the operating characteristics will be affected if no measures are taken after etching such as RIE.

In addition, the fact that contamination and crystal defects in Si are caused by dry etching such as RIE is that a large number of OSFs are generated when oxidation-induced stacking faults (hereinafter referred to as “OSF”) are investigated by oxidizing Si after RIE. It is also clear from.

The following method can be considered as a means for solving the above problems.

Hereinafter, the RIE process of a device having a structure in which a SiO ₂ film is formed on a Si (including the case of polycrystalline Si; the same applies hereinafter) will be described as an example.

(A) Set the RIE processing condition to a condition with less damage and contamination. However, with this method, an RIE that simultaneously satisfies the anisotropy of etching, material selection etching property, etching uniformity, and appropriate process speed necessary for microfabrication.
Although it depends on the structure of the RIE device, it is practically difficult to obtain the conditions.

(B) When etching SiO ₂ , SiO of several hundred Å
_The RIE process is stopped by leaving ₂ , and the remaining SiO ₂ is etched off by another etching method with less damage and contamination. However, this method has a problem in reproducibility of how to control and leave SiO ₂ in the wafer with good uniformity and process stability.

(C) An etching buffer layer is provided between SiO ₂ and Si, and contamination and defects due to RIE are absorbed by this buffer layer. Although this method is very useful for a semiconductor device having a specific structure, it generally causes an increase in process steps such as formation and removal of a buffer layer.

OBJECT OF THE INVENTION The present invention has been made in view of the above problems,
It is an object of the present invention to provide a method for treating a semiconductor substrate, which can effectively remove contamination, crystal defects, etc. generated in a silicon substrate by dry etching such as RIE.

SUMMARY OF THE INVENTION The above object is achieved by the present invention as follows.
That is, in the present invention, following the dry etching step, the surface layer of the silicon substrate is treated with ammonia water (NH ₄ O
H) and hydrogen peroxide solution (H ₂ O ₂ ) NH ₄ OH / H ₂ O ₂ = 2/1 to 2.9
The surface layer of the silicon substrate is removed by etching with an aqueous solution containing 5 / 0.05.

With this structure, the surface of the silicon substrate can be etched without damaging or contaminating the silicon substrate.

Example The present invention is based on the following findings.

That is, in the RIE treatment of the device having the structure in which the SiO ₂ film is formed on the Si substrate as described above, after the SiO ₂ is completely etched off by the RIE, contamination and defects generated on the underlying Si surface or Si The layer (up to several hundred liters) was etched off by using a mixed aqueous solution of ammonia water and hydrogen peroxide solution at a temperature rise or boiling. As a result, it was possible to solve the problem of the deterioration of the electrical characteristics of the semiconductor device, especially the contact resistance, while the fine processing conditions of SiO ₂ were being satisfied.

Ammonia water (NH ₄ OH), hydrogen peroxide water (H ₂ O ₂ ) and water (H
₂ O) mixed solution with room temperature, elevated temperature or boiling
Processing is commonly known as one of the wafer cleaning steps. However, this known Si substrate processing is
The purpose is to remove the usual organic contaminants on the wafer and particles such as Si particles, dust, and dust that adhere to the Si surface, and are used for wafer cleaning as a pretreatment such as oxidation, vapor deposition, and epitaxial treatment. Therefore, it is desirable to minimize the amount of Si etched by this cleaning.
The depth of Si that is usually removed is several Å to several tens of Å. Therefore, the solution composition also reduces the amount of NH ₄ OH and reduces the H
_Use a mixture ratio that is high in ₂ O ₂ . The mixing ratio is usually NH ₄
OH: H ₂ O ₂ : H ₂ O = 1: 2: 7 or = 1: 1: 5 is often used.

The semiconductor substrate processing according to the present invention should be clearly distinguished from the above-described known Si substrate processing in the following points.

That is, the method of the present invention is not limited to normal organic matter contamination, heavy metal contamination, and the like, but also positively removes the surface of the silicon substrate in order to remove the crystal defect layer near the substrate surface caused by dry etching such as RIE. Etching is removed. For this reason, for example, the preferable etching amount of the Si substrate is about 100 to 500Å. This Si etching amount is SiO ₂
Corresponds to the depth of contamination and defects in Si generated during the RIE process of Al.
I was able to know it by analysis means such as S and RBS.

Further, in the present invention, in order to etch a predetermined amount of the silicon substrate with good control within a suitable time in the semiconductor process, the mixing amount of NH ₄ OH is H ₂ O _{2 as} compared with the conventionally known solution composition. That's quite a lot. That is, the ratio NH ₄ OH / H ₂ O ₂ of NH ₄ OH and H ₂ O ₂ in the treated aqueous solution is 2 /
The range of 1 to 2.95 / 0.05 is preferable, and the range of 2.5 / 0.05 / to 2.95 / 0.05 is more preferable. Further, this treated aqueous solution may be used at room temperature, but it is heated or boiled (about 75 to 100).
It is more preferable to use at (° C).

Hereinafter, the present invention will be described with reference to specific experimental examples.

Experimental Example 1 FIG. 1 shows the relationship between the composition of the treatment aqueous solution according to the present invention and the etching depth of the Si substrate. The aqueous solution compositions at points a to e in FIG. 1 are NH ₄ OH: H ₂ O ₂ : H ₂ O = 1: 2: 7, respectively.
(A), 2: 1: 7 (b), 2.5: 0.5: 7 (c), 2.85: 0.15: 7
(D) and 2.95: 0.05: 7 (e). The treatment aqueous solution was prepared by boiling the Si substrate for 10 minutes.

In general, NH ₄ OH acts as an etchant for Si, and H ₂ O ₂ acts as an inhibitor for Si etching due to the oxidation action.
From the results shown in FIG. 1, when the ratio of H ₂ O is 7, the mixture ratio of NH ₄ OH: H ₂ O is well controlled and the mixing ratio of the treated aqueous solution is such that etching can be performed in a time without any practical problems.
It can be seen that it is in the range of ₂ : H ₂ O = 2: 1: 7 to 2.95: 0.05: 7.
However, this is the case where the mixing ratio of H ₂ O is 7, but the mixing ratio of H ₂ O may be other than this. Even if the mixture ratio of H ₂ O is 7, even if NH ₄ OH: H ₂ O ₂ = 2: 1 or less, desired etching (100 to 500Å) of Si can be removed by etching for a long time. It is possible, but the disadvantage of etching for a long time is that when it is boiled and used, the composition of the treatment solution changes during the etching (for example, due to thermal decomposition of H ₂ O ₂ or evaporation of each component). Therefore, the controllability of etching may be lacking.

From the above results, the mixing ratio of NH ₄ OH and H ₂ O ₂ is NH ₄ OH: H ₂ O ₂
It turns out that the range of 2/1 to 2.95 / 0.05 is good.

Second FIG, P (100) wafer and ion implantation and by the subsequent annealing connexion forming the P ⁺ wafer (N (100) substrate in the P ⁺ layer ^{_{formed: BF 2 +, 50KeV, 5}} × 10 15 cm - ² ) and N ⁺ wafer (N ⁺ layer formation on P (100) substrate: As ⁺ , 50 KeV, 5 × 10 ¹⁵ c
Three samples NH ₄ OH in _{^{m -2): H 2 O 2}} : H 2 O = 2.85: 0.15: 7
The relation between the treatment time and the etching amount when treated with the treatment aqueous solution (75 ° C or higher) is shown. In addition, RI of the above three types of samples
The relationship between the treatment time when the same surface treatment as above was applied after exposure to E plasma (using a mixed gas of CF ₄ and H ₂ , 300 W) for 10 minutes, and the etching amount by the above treatment solution was also shown. There is.

As a result, the N aqueous solution of the Si wafer was
Type, P-type, impurity concentration, RIE treatment (presence or absence of RIE)
It was found that the Si layer can be removed.

The etching amount of Si and doped SiO ₂ was treated for 10 minutes in a treatment solution (boiled state) of NH ₄ OH: H ₂ O ₂ : H ₂ O = 2.85: 0.15: 7. Shown in.

As a result, for the doped oxidation as the interlayer insulating film, if the annealing treatment is performed, the treatment solution of the present experimental example sufficiently satisfies the fine processing conditions necessary for VLSI and the like. I understand.

In this experimental example, NH ₄ OH, H ₂ O ₂ and H ₂ O used were as follows.

H ₂ O: DI water, filtered H ₂ O ₂ : H ₂ O ₂ 31% content, electronics industry NH ₄ OH: NH ₃ 29%, special grade Experimental example 2 Structure with SiO ₂ formed on Si substrate It was confirmed that the crystal defects of Si generated in Si by the RIE treatment in the sample of No. 1 or the contamination which may be nuclei causing crystal defects in Si caused by the subsequent heat treatment are removed by the treatment of the present invention. Examined. Regarding the crystal defects in Si, the OSF generated by the oxidation treatment after RIE was investigated by Wright Etch.

First, a method of preparing a sample will be described. 8 ~ as starting material
A P (100) substrate of 12 Ωcm on which 650 Å SiO ₂ was formed by thermal oxidation (Sample No. OSF-1) was used. RIE this
It was processed (CF ₄ / H ₂ , 6pa, 300W) (Sample No. OSF-2).
However, SiO ₂ was completely etched off, and Si was RI for 5 minutes.
The test was carried out under the conditions as indicated by E (overetch condition for 5 minutes). Next, after removing the photoresist and ashing it with O ₂ plasma to reduce contamination, boiled with a mixed acid of H ₂ SO ₄ and HNO ₃ and then light-etched (SiO ₂ on Si).
The (natural oxide film) was removed (Sample No. OSF-3). Then, NH ₄ OH: H ₂ O ₂ : H ₂ O = 2.85: 0.15: 7 was used for a treatment for 10 minutes with a treatment aqueous solution (boiled state) to remove about 300 Å Si by etching. Next, light etching was performed by the same mixed acid boiling as described above (Sample No. OSF-4).

The samples were 4 pieces of OSF-1 to 4 prepared by the above process. Of these, OSF-1 is a sample without RIE contamination and defects, and is a sample for comparison with OSF-2 to 4 below. Is. OSF-4 is a sample for investigating the effect of the treatment according to the present invention.

In order to examine the OSF, each sample was steam-oxidized at 1000 ° C for 2 hours, and then the oxide film was peeled off to remove the Wright E
tch). As a result, it became as follows.

Sample No. OSF amount OSF-1 OSF None OSF-2 2 × 10 ⁴ pieces / cm ² OSF-3 4 × 10 ⁴ pieces / cm ² OSF-4 OSF None As can be seen from these results, the treatment according to the present invention ( NH ₄ OH: H
₂ O ₂ : H ₂ O = 2.85: 0.15: 7, 10 min), and about 300 Å of Si etched off, the contamination and crystal defect layer caused by RIE are clearly removed, and RIE is applied. The former state, that is, the crystal state as good as that of OSF-1 was recovered.

Experimental Example 3 Etching the interlayer insulating film with SiO ₂ RIE
⁺ Diffusion layer, P ⁺ Diffusion layer or contact hole (1.5 μ × 1.5 μ, 2.0 μ × 2.0 μ or 2.5 μ × 1.5 μ
μ × 2.5 μ) was formed, and the contact resistance when forming a contact with Al (containing 1% Si) was examined.

An example of the pattern used for measuring the contact resistance is shown in FIG. In the figure, A to D are terminals, which are formed of Al (containing 1% Si). Further, the shaded portion 2 is a base and is an N ⁺ diffusion layer, a P ⁺ diffusion layer or polycrystalline Si. Reference numeral 1 is a contact hole.

The contact resistance was measured by a four-terminal method, that is, a method of flowing a constant current (I = 1.0 mA) between the terminals A and B and measuring the potential difference between the terminals C and D.

To investigate the usefulness of the treatment according to the invention, RIE of SiO ₂
After treatment NH ₄ OH: H ₂ O ₂ : H ₂ O = 2.85: 0.15: 7 (boiling state)
The contact resistances of the sample treated for 10 minutes (etching off Si up to 300 Å) and the sample not treated according to the present invention were compared and examined.

The sample was a combination of N ⁺ diffusion layer and Al (containing 1% Si, the same applies below) (one that was not subjected to the treatment according to the present invention only by RIE treatment: f, one that was subjected to the treatment according to the present invention after the RIE treatment: f ′,
The same shall apply hereinafter), a combination of polycrystalline Si and Al (g, g '), P ⁺
The combinations (h, h ') of the diffusion layer and Al were examined respectively. The RIE and the subsequent processing method were the same as in the case of Experimental Example 2 above. However, RIE was conducted for 10 minutes under overetch conditions. The N ⁺ layer was formed by ion-implanting As ⁺ at 50 KeV and 5 × 10 ¹⁵ cm ^-2 , and then annealing at 1000 ° C. for 20 minutes. On the other hand, the P ⁺ layer was formed by ion implantation of BF ₂ ⁺ at 50 KeV and 5 × 10 ¹⁵ cm ⁻² and annealing at 1000 ° C. for 20 minutes. Furthermore, the polycrystalline Si doped with phosphorus is pure polycrystalline Si3000Å
It is formed by subjecting PSG to thermal diffusion treatment.

Fig. 4 shows the contact resistance value of each sample (average of the measured values at 50 points in the wafer), and Fig. 5 shows the variation of contact resistance within each wafer (2σ /, where σ: standard) Deviation ,: average value) are shown.

As is clear from FIGS. 4 and 5, N ⁺ -Al,
Sizes of P ⁺ -Al and phosphorus-doped polycrystalline Si-Al (1.
5μ ^{□ to} 2.5μ ^□ ), the sample treated by the present invention, (1) prevention of high contact resistance and ohmic property (2) improvement of uniformity of contact resistance within wafer (between wafers) Was demonstrated. Also, in the above sample preparation, the RIE conditions were set so that the Si surface was intentionally subjected to RIE plasma for 10 minutes (10 minutes overetch condition), but nevertheless, the above (1) and (2) The effect of was confirmed. Therefore,
It is clear that these effects can be naturally obtained if the RIE condition is the just-etch condition without any overetch.

Therefore, the surface treatment according to the present invention also has an effect that it is possible to compensate for the instability (overetching within about 10 minutes) factor of the RIE conditions.

Other electrical characteristics when the surface treatment according to the present invention was performed after RIE, that is, the IV characteristics of the PN junction and the lifetime of a few carriers were measured, but no particular abnormality was observed.
It was confirmed that the MOS FET and the ring oscillator are also operating normally.

As described above, in the present invention, following the dry etching process, ammonia water (NH ₄ OH) and hydrogen peroxide water (H ₂ O ₂ ) are mixed with NH ₄ OH / H ₂ O ₂ = 2. The surface layer of the silicon substrate is removed by etching with an aqueous solution containing at a ratio of /1-2.95/0.05.

Therefore, it has good reproducibility and sufficient controllability, and has a very small depth of silicon substrate (for example, 100Å ~ 500Å
Etching is possible. Moreover, the silicon substrate is less damaged and contaminated as compared with dry etching such as RIE. Therefore, it can be used for removing contamination and crystal defects caused by dry etching such as RIE.

Furthermore, the method according to the present invention is used in combination with dry etching such as RIE to keep fine processing conditions such as etching anisotropy and material selection etchability.
It is possible to obtain good electrical characteristics of the semiconductor device (for example, reduction in contact resistance, variation, and junction leak current).

[Brief description of drawings]

Fig. 1 is a graph showing the relationship between the NH ₄ OH / H ₂ O ₂ mixture ratio and the etching depth of the Si substrate, Fig. 2 is a graph showing the relationship between the processing time and the etching amount, and Fig. 3 is the contact resistance. FIG. 4 is a schematic plan view showing a pattern for measuring the contact resistance, FIG. 4 is a graph showing changes in contact resistance, and FIG. 5 is a graph showing variations in contact resistance. In the reference numerals used in the drawings, 1 ... Contact hole 2 ... Base (diffusion layer or polycrystalline Si) 3 ... Al electrode (containing 1% Si) A to D ... Terminal

Claims (1)

[Claims] 1. A dry etching process is followed by adding ammonia water (NH ₄ OH) and hydrogen peroxide water (H ₂ O ₂ ) to NH ₄ OH / H ₂
A method for treating a semiconductor substrate, characterized in that the surface layer of the silicon substrate is removed by etching with an aqueous solution containing O ₂ = 2/1 to 2.95 / 0.05.