JPH07113722B2 - Active matrix display device and driving method thereof - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Outline] Scan bus lines and data bus lines in an active matrix display device are formed on glass substrates which are arranged to face each other, thereby eliminating crossing portions on the same glass substrate. In addition, by omitting the ground bus line, the manufacturing yield and the drive area ratio are improved, and the difference between the potential immediately before the application of the address pulse applied to the scan bus line and the potential at the time of non-address is determined by the data bus. The amplitude of the data voltage applied to the line is made larger than the value obtained by subtracting the threshold voltage of the switching element to ensure the operation of the switching element in the configuration in which the ground bus line is omitted.

[Industrial application field]

The present invention relates to an active matrix display device in which a data bus line is formed on an insulating transparent substrate such as one glass substrate and a scan bus line is formed on an insulating transparent substrate such as the other glass substrate, and a driving method thereof. .

The active matrix display device is used as a display device such as a display terminal of an information processing device together with a simple matrix display device, and liquid crystal is often used as a display medium.

Since this active matrix type display device can drive a large number of pixels independently of each other, even if the number of lines increases as the display capacity increases, the drive duty ratio decreases like the simple matrix type display device. Then, there is an advantage that problems such as reduction of contrast and reduction of viewing angle do not occur.

However, since the switching element is provided for each pixel, the cost is increased and the structure is complicated, so that there is a problem in the manufacturing yield, and the size of the panel is restricted by such a point. Therefore, improvement in manufacturing yield is desired.

[Conventional technology]

FIG. 4 shows an equivalent circuit of a panel of a conventional active matrix type display device, 31 is a thin film transistor (hereinafter abbreviated as “TFT”) as a switching element, 32 is a gate electrode, 33 is a drain electrode, and 34 is a source. Electrodes, 35 is a liquid crystal element as a display element, 36 is a scan bus line, 37
Is a data bus line.

The liquid crystal element 35 is configured by sandwiching liquid crystal as a display medium between a common electrode and a display electrode corresponding to a pixel, the common electrode is shown as ground, and the display electrode is connected to the source electrode 34 of the TFT 31. There is. The gate electrode 32 of the TFT 31 is connected to the scan bus line 36, and the drain electrode 33 is connected to the data bus line 37.

The TFT 31, the display electrode of the liquid crystal element 35, the scan bus line 36, and the data bus line 37 are formed on one glass substrate, and the common electrode of the liquid crystal element 35 is formed on the other glass substrate, and one and the other are formed. The glass substrates are arranged so as to face each other with a minute interval and the periphery is sealed so as to sandwich the liquid crystal.

The pulse width of the canvas line 36 is, for example, 30 to 60.
By sequentially scanning with an address pulse having a short pulse width of μS and applying a data voltage according to the display information to the data bus line 37 in synchronization with this address pulse, the display information can be written and displayed corresponding to the line. it can. That is, the address pulse applied to the scan bus line 36 turns on the TFT 31 in which the gate electrode 32 is connected to the scan bus line 36, and the data voltage applied to the data bus line 37 is applied to the liquid crystal element 35. The capacitance of the liquid crystal element 35 is charged. Therefore, even after the TFT 31 is turned off, the liquid crystal element 35 can continue the display state corresponding to the data voltage according to the display information by this charging voltage. Then, when an address pulse is applied to the scan bus line 36 in the next cycle, the liquid crystal element 35 is applied with a data voltage according to the new display information and is brought into a new display state.

In such a conventional active matrix display device, as described above, the scan bus line 36 and the data bus line 37 are formed on the same glass substrate so as to intersect with each other, and the intersecting portions are mutually insulated. Has been done. At this intersection, scan bus line 36 and data bus line
One of the 37 and the upper bus line has a step due to the thickness of the lower bus line and the insulating layer at the intersection, so that the resistance value may increase or the wire may be disconnected due to the step. Yes, the bus line becomes defective.

In addition, insulation failure or short circuit may occur between the bus lines at the intersection, and in that case also, defects occur along the bus lines. Further, since the two types of bus lines, the scan bus line 36 and the data bus line 37, are formed on the same glass substrate, there is a problem that the drive area ratio, which represents the ratio of the display electrode area to the pixel area, cannot be increased. . In addition, the manufacturing yield is also a product of the yields of both bus lines, which makes it difficult to obtain a high manufacturing yield.

Therefore, the active matrix type display device shown in the equivalent circuit of the panel of FIG. 5 is disclosed in Japanese Patent Application No. 60-27401 by the present applicant.
Proposed by No. 1. That is, the TFT 31, the scan bus line 36, and the liquid crystal element 35 are provided on one of the glass substrates arranged opposite to each other.
Display electrode of the TFT 31, the gate electrode 32 of the TFT 31 is connected to the scan bus line 36, and the drain electrode 33 is connected to the liquid crystal element.
The source electrode 34 is connected to the display electrode of 35, the data electrode line 37 is formed on the other glass substrate as the common electrode of the liquid crystal element 35, and the liquid crystal is sandwiched between the one and the other glass substrates. It is a thing.

Therefore, even if the scan bus line 36 and the data bus line 37 are arranged so as to cross each other, since they are formed on different glass substrates, it is not necessary to insulate the crossing portion. As a result, the step difference of the bus lines, the insulation failure between the bus lines, or the short circuit does not occur, and the yield can be improved. Scan bus line 36
The drive area ratio can be increased by forming the data bus line 37 and the data bus line 37 on different glass substrates. Also, the manufacturing yield is not the product of both bus lines.

[Problems to be solved by the invention]

In the panel shown in FIG. 5 in which the drawbacks of the conventional example shown in FIG. 4 are improved, a ground bus line for connecting the source electrodes 34 of the TFT 31 to each other is required. That is, it is possible to eliminate the intersection of the bus lines on the same glass substrate, but since it is necessary to form the ground bus line for connecting the source electrodes 34 of the TFT 31 together with the scan bus line 36, the driving area There was a drawback that the rate could not be increased sufficiently.

It is an object of the present invention to increase the driving area ratio of an active matrix display device and simplify the bus line structure.

[Means for solving problems]

An active matrix display device and a driving method thereof according to the present invention will be described with reference to FIG. 1. A switching element 1 such as a thin film transistor and a display element such as a liquid crystal element are provided on an insulating transparent substrate such as one glass substrate. 5 (Lmn, ...
.) One electrode and the scan bus line 6 (SL (n-
1), SLn, SL (n + 1), ...), and the striped data bus lines 7 (DLm, ...) On the other insulating transparent substrate such as the glass substrate, the display element 5 is formed. The control electrode 2 of the switching element 1 is connected to the scan bus line 6, one controlled electrode 3 is connected to one electrode of the display element 5, and the other controlled electrode 4 is formed.
Connected to the scan bus line 6 of the adjacent line,
A display medium such as a liquid crystal is sandwiched between one and the other insulating transparent substrate such as a glass substrate to form an active matrix type display device.

When the scan bus lines 6 are sequentially scanned in the arrow direction, for example, immediately before the application of the address pulses Vg1, Vg2, ... Applied to the scan bus lines of SL (n-1), SLn ,. The potential Vgc is made different from the potential Vgoff at the time of non-address, and the difference (Vgc-Vgoff) is applied from the peak-to-peak value of the data voltages Vd1, Vd2, ... Applied to the data bus line 7 to the switching element. It is selected and driven so as to be equal to or higher than a value obtained by subtracting the threshold voltage of.

[Action]

One of the controlled electrodes 3 of the switching element 1 is connected to the display element 5
By connecting one of the electrodes and the other controlled electrode 4 to the scan bus line 6 of the adjacent line, it is not necessary to provide a ground bus line.
The drive area ratio can be increased. Also, the bus line configuration can be simplified.

Further, in order to make the scan bus line 6 act in the same manner as the ground bus line, the potential immediately before the application of the address pulse is made different from the potential at the time of non-address, and the other controlled side of the switching element 1 in the address pulse application line is controlled. The potential of the electrode 4 can be set to a desired potential. That is, the potential immediately before the application of the address pulse on the adjacent scan bus line is used as the reference voltage for the data voltage, and the controlled electrode 4 that is at the same potential as the reference voltage at the time of address is addressed and then the data voltage is coupled by the capacitance of the liquid crystal. The reference potential is set so that the switching element can continue to maintain the off state within this variation range even if it is varied according to the waveform. More specifically, the fluctuation range of the data voltage is Va,
If the reference voltage (reference potential) is Vgc, the potential of the scan bus line during non-address is Vgoff, and the threshold voltage of the switching element is Vth, then the relationship of Vgoff−Vgc + 2Va ≦ Vth (1) is set. .

Further, since the address pulse having a high potential with respect to the data voltage applied to the data bus line 7 can be applied to the control electrode 2 of the switching element 1, even in the configuration in which the ground bus line is omitted, the switching element It is possible to surely turn on 1 and apply the voltage of the difference between the data voltage and the reference voltage to the display element.

〔Example〕

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 2 is an exploded perspective view of the panel of the embodiment of the present invention,
A switching element 1 such as a thin film transistor, a scan bus line 6, and a display element 5 are provided on one glass substrate 9.
The display electrode 8 as one electrode (see FIG. 1) is formed, and the data bus line 7 is formed as the common electrode of the display element 5 on the other glass substrate 10, and the display electrode 8 and the data bus line are formed. A display medium such as liquid crystal is interposed between the display element 5 and the display element 5.

The control electrode and the controlled electrode of the switching element 1 are connected as shown in FIG. 1, one controlled electrode of the switching element 1 is connected to the display electrode 8, and the switching element is connected to the scan bus line 6. 1 control electrode,
The other controlled electrode of the switching element 1 on the adjacent line is connected. As described above, it is preferable that the other controlled electrode of the switching element 1 is connected to the scan bus line 6 which is the rearmost line in the scanning direction, as shown in FIG.

As described above, since the scan bus line 6 and the data bus line 7 can be formed on different glass substrates 9 and 10, no intersecting portion to be insulated is generated, and the manufacturing yield is improved. You can Further, since the ground bus line is not required, the bus line structure is simplified and the drive area ratio is improved.

As the switching element 1 in the active matrix type display device, when a liquid crystal element is used as the display element 5, a thin film transistor is generally used. Also in the present invention, the display element 5 is used as the liquid crystal element and the switching element 1 A thin film transistor (TFT) can be used as the thin film transistor.
In that case, the control electrode 2 serves as a gate electrode, one controlled electrode 3 serves as a drain electrode, and the other controlled electrode 4 serves as a source electrode. In the following, reference numeral 1 in FIGS. 1 and 2 is a TFT,
2 is a gate electrode, 3 is a drain electrode, 4 is a source electrode,
5 will be described as a liquid crystal element. Further, in FIG. 1, SL (n-1), SLn, SL (n
+1), the m-th data bus line 7 is indicated by DLm, and the liquid crystal element 5 at the intersection of the scan bus line SLn and the data bus line DLm is indicated by Lmn.

The TFT1 is in an off state when the gate-drain voltage or the gate-source voltage is 0 V or less, and thus is an example using an enhancement TFT having a threshold voltage Vth of 0 V.

Further, the liquid crystal element 5 is alternately applied with positive and negative data voltages to perform a display operation. For example, an address pulse is applied to the scan bus line 6 according to the horizontal synchronizing signal, a data voltage according to the display information of one horizontal scanning line is applied to the data bus line 7, and writing and display corresponding to the line is performed, and each frame is displayed. Then, the polarity of the data voltage is inverted.

FIG. 3 is an operation explanatory diagram of the embodiment of the present invention, in which (a) is a data voltage, (b) and (c) are address pulses, and (d).
Is the display electrode potential of the liquid crystal element, and (e) is the voltage across the liquid crystal element. As shown in (a), the data voltages applied to the liquid crystal element Lmn (see FIG. 1) are + Va and − for each frame.
If it is inverted to Va and applied to the data bus line DLm, the address pulse shown in (b) is applied to the scan bus line SLn in synchronization with this data voltage.
The address pulse shown in (c) is applied to the scan bus line SL (n + 1) at the rear of the scanning direction with a delay of one horizontal scanning period.

As an address pulse, the potential immediately before the address is Vgof the potential Vgof for turning off the TFT1 when the address is not addressed.
c, and the electric potential Vgon at the time of address, and the above formula (1) is selected so that Vth = 0, and Vgc−Vgoff ≧ 2Va. When the data voltages + Va, −Va are + 5V, −5V, the potential Vgoff for turning off the TFT1 is generally −10V or less, and can be −12V, for example. As a result, the TFT1 at the time of non-address can be maintained in the OFF state and the charging voltage of the liquid crystal element can be held for one frame. Further, the potential Vgc is the TFT1 of the preceding line in the scanning direction.
Corresponding to the source voltage of, for example, 0V. And TF
The potential Vgon of the address pulse for turning on T1 is, for example, 10V.

At time t0, the potential of the scan bus line SLn near the center of the display panel is set to Vgc, and one horizontal scanning period after that, at time t1, the data voltage + Va is applied to the data bus line DLm and the potential Vgon is applied to the scan bus line SLn. Address pulse is added to scan bus line SL (n
When +1) is set to the potential Vgc, the TFT1 in which the gate electrode 2 is connected to the scan bus line SLn is turned on. This time
At t1, for example, the potential Vpm of the display electrode of the liquid crystal element Lmn
As shown in (d) of FIG. 3, n increases near the data voltage + Va via the capacitance of the liquid crystal element Lmn, and when the TFT1 is completely turned on, the potential of the scan bus line SL (n + 1) is increased. For example, Vgc becomes 0V.

Therefore, the liquid crystal element Lmn is charged by applying a difference between the potential + Va of the data bus line DLm and the potential Vgc of the scan bus line SL (n + 1), that is, 0V, and the charging voltage of the liquid crystal element Lmn is shown in FIG. It becomes + Va as shown in (e).

At time t2 after the next one horizontal scanning period, the potential Vgon is applied to the scan bus line SL (n + 1) and the scan bus line SL
The potential Vgc is applied to (n + 2) to turn on the TFT1 whose gate electrode is connected to the scan bus line SL (n + 1) and turn off the TFT1 whose gate electrode is connected to another scan bus line. The data voltage applied to the data bus line 7 and the scan bus line SL (n +
The difference from the potential Vgc of 2) is applied to the liquid crystal element 5 via the turned-on TFT1 to be charged.

The potential Vpmn of the display electrode of the liquid crystal element Lmn is (a) in FIG.
And (d), it changes according to the data voltage applied to the liquid crystal element on the other scan bus line added to the data bus line DLm. That is, as shown in FIG. 3A, the liquid crystal element on the final scan bus line at time t3 and the liquid crystal element on the first scan bus line at the next frame at time t4 are selected. At that time, + Va and −V as shown in the figure are applied to the data bus line DLm.
Assuming that the data voltage of a is applied, the potential Vpmn of the display electrode of the liquid crystal element Lmn changes by Va on the positive electrode side and the negative electrode side with reference to −Va as shown in FIG. 3 (d). ,
In other words, the vertical scanning frame changes within the period until the next address, and the polarity is inverted, so that the amplitude swings at 2Va.

As described above, the electrode potential Vpmn changes according to the data voltage, but if the above relationship of Vgc-Vgoff ≧ 2Va is satisfied, the potential of the gate electrode with respect to the drain electrode and the source electrode becomes the threshold voltage Vth (in this embodiment, the threshold voltage Vth). Since the TFT1 whose drain electrode is connected to its display electrode is off, the charging voltage of the liquid crystal element Lmn is maintained until the next address period.

The same operation is performed at time t5, t6, t7 of the next frame,
At that time, the data voltage is inverted similarly to the data voltage at time t4, for example, at time t6, the data voltage −Va is applied to the data bus line DLm, the potential Vgon is applied to the scan bus line SLn, and the scan bus line SL (n + 1). When the potential Vgc is applied to the TFT and the TFT1 having the gate electrode connected to the scan bus line SLn is turned on, the potential Vpmn of the display electrode of the liquid crystal element Lmn becomes −Va data via the capacitance of the liquid crystal element Lmn. Since a voltage is applied, the voltage temporarily drops below -Va, and then the TFT1 is completely turned on, so that the potential Vgc
For example, it becomes 0V. Further, the charging voltage of the liquid crystal element Lmn becomes -Va of the data voltage, which is maintained for one frame period until the next address.

In the above embodiment, the address pulse has a constant waveform regardless of the polarity of the data voltage, but when the data voltage has a negative polarity, the gate voltage for turning on the TFT1 is low. Therefore, it is also possible to set the waveform of the address pulse according to the polarity of the data voltage. In addition, the intermediate potential Vgc of the address pulse
As a result, even if the TFT 1 whose potential Vgc is applied to the gate electrode is turned on and the charge stored in the liquid crystal element 5 is discharged, it is controlled so as to be surely turned on during the next horizontal scanning period, and the liquid crystal element is controlled. Since it is controlled so as to apply the data voltage to 5, there is no problem.

〔The invention's effect〕

As described above, the present invention provides the scan bus line 6
Since the data bus line 7 and the data bus line 7 are formed on different insulating transparent substrates such as glass substrates 9 and 10 and the ground bus line can be omitted, the manufacturing yield can be improved and the drive area ratio can be easily increased. There is an advantage that can be increased. Further, there is an advantage that the switching element 1 can be surely controlled by controlling the scan bus lines 6 so as to sequentially function as the ground bus lines.

[Brief description of drawings]

1 is an explanatory view of the principle of the present invention, FIG. 2 is an exploded perspective view of a panel of an embodiment of the present invention, FIG. 3 is an operation explanatory view of an embodiment of the present invention, and FIG. Equivalent circuit, FIG. 5 is an equivalent circuit of the previously proposed panel. 1 is a switching element (TFT), 2 is a control electrode (gate electrode), 3 and 4 are controlled electrodes (drain electrode, source electrode), 5 is a display element (liquid crystal element), 6 is a scan bus line, and 7 is data. Bus lines, 8 are display electrodes, and 9 and 10 are glass substrates.

Claims (2)

[Claims] 1. A switching element (1), one electrode of a display element (5) and a scan bus line (6) are formed on one insulating transparent substrate, and a control electrode of the switching element (1). (2) is connected to the scan bus line (6), and one controlled electrode (3) of the two controlled electrodes (3, 4) of the switching element (1) is connected to the display element (5). ) Is connected to one of the electrodes, and a striped data bus line (7) is formed as the other electrode of the display element (5) on the other insulating transparent substrate, and the insulating property between the one and the other is formed. In an active matrix type display device in which a display medium is sandwiched between transparent substrates to form the display element (5), the other controlled electrode (4) of the switching element (1) is provided.
Is connected to a scan bus line of a line adjacent to the line to which the switching element (1) belongs, The active matrix type display device. 2. A switching element (1), one electrode of a display element (5) and a scan bus line (6) are formed on one insulating transparent substrate, and a control electrode of the switching element (1). (2) is connected to the scan bus line (6), and one controlled electrode (3) of the two controlled electrodes (3, 4) of the switching element (1) is connected to the display element (5). ) Is connected to one electrode, the other controlled electrode (4) is connected to an adjacent scan bus line, and the striped data bus line (7) is displayed on the other insulating transparent substrate. An active matrix type display device in which the display element (5) is formed by being formed as the other electrode of the element (5) and a display medium is sandwiched between the one and the other insulating transparent substrates, Canvas line (6) The potential (Vgc) immediately before the application of the address pulse sequentially scanned and applied is made different from the potential (Vgoff) at the time of non-address, and the potential (Vgc) immediately before the application of the address pulse and the potential (Vgoff at the time of non-address). ) Is greater than or equal to a value obtained by subtracting the threshold voltage of the switching element (1) from the peak-to-peak value of the data voltage waveform applied to the data bus line (7) according to the display information. And a method for driving an active matrix type display device.