JPH07111656A - Convergence correction device - Google Patents

Abstract

PURPOSE:To obtain a convergence correction device automatically following up a scanning frequency even when it changes, generating a convergence correction signal, unnecessitating the adjustment for every change of the scanning frequency which has been performed so far and coping with a stable operation and various kinds of signal sources. CONSTITUTION:This device has a screen location detection circuit 2 detecting the center location of a screen according to the size of deflecting current, a convergence yoke driving circuit 11 performing current amplification for the correction signal from an analog convergence circuit part 4 and supplying corrected current to a convergence yoke 12 and a data location detection circuit 13 detecting the location of the minimum value of this corrected current. The phase difference of the two kinds of detection pulses obtained by a phase comparator 14 is transmitted to a phase control circuit 3, the phase of the minimum value of the convergence correction signal is controlled so as to always be the center location of the screen even when a scanning frequency changes and digital convergence correction data is added when the phases of the convergence correction data and deflection current match.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a convergence correction device for automatically correcting a convergence of a color television receiver with high accuracy corresponding to various signal sources.

[0002]

2. Description of the Related Art Generally, in a color television receiver, color misregistration occurs because three colors (red, green and blue) are not superposed on a display screen. So-called convergence is
The convergence correction waveform is created in an analog manner in synchronization with the horizontal and vertical scanning cycles, and the size and shape of this waveform are changed to make adjustments.However, in the case of compatibility with various signal sources, it is necessary to improve the convergence accuracy. There's a problem. Therefore, as a method capable of dealing with various signals and having high convergence accuracy, for example, there is a digital convergence apparatus disclosed in JP-A-2-32693.

FIG. 7 is a block diagram of this conventional digital convergence correction apparatus, in which 21 is an address generator, 22 is an adder, 23 is a frame memory, and 24 is a frame memory.
Is a DA converter and 25 is an LPF. Further, 26 is a zero cross comparator, 27 is a center address detection unit, 28 is a comparator, 29 is a correction center fixed address,
Reference numeral 30 is a crosshatch generator, and 31 is a marker generator.

In the conventional convergence correction apparatus configured as described above, the horizontal synchronizing signal and the vertical synchronizing signal are input to the address generating unit 21, and the address generating unit 21 adds the address corresponding to the screen display position to the adder 22. Is output to the center address detection unit 27. The zero-cross comparator 26 obtains a timing pulse indicating a deflection center point from the deflection current of the screen display signal with respect to the horizontal and vertical directions to detect the center point, and the AND circuit detects the screen center. With this signal, the data from the address generator 21 is latched by the center address detector 27 to detect the center address.

The comparator 28 compares the center address with the correction center fixed address, outputs the deviation amount of the adjustment point as the center offset value, and inputs it to the adder 22 to the address output by the address generator 21. By providing an offset, the address of the frame memory 23 is always configured to be in synchronization with the center of the screen. The addresses of the crosshatch generation unit 30 and the marker generation unit 31 are also supplied from the adder 22 so that the timing is always synchronized with the center of the screen. Therefore, since convergence correction can always be performed in synchronization with the deflection center, there is little misconvergence.
A high quality image can be obtained.

[0006]

However, in the conventional configuration as described above, it is possible to adjust the convergence with high accuracy during normal convergence adjustment. However, when the horizontal and vertical frequencies change, the convergence yoke that supplies the convergence correction current is related to the frequency. However, there is a problem that a constant delay time occurs and the data phase of the convergence correction current is different, resulting in a shift in the read address at the convergence adjustment point on the screen.

In view of the above point, the present invention is designed so that the timing pulse phases of the screen position detecting means for detecting the center of the display screen and the data position detecting means for detecting the data of the screen center of the analog convergence correction data are always matched. By using the controlling phase control means, it is possible to automatically follow the horizontal and vertical frequencies even if they change, and to generate a convergence correction signal synchronized with the deflection center, and perform readjustment due to the frequency change. It is an object of the present invention to provide a convergence correction device that does not require.

[0008]

In order to achieve the above object, the present invention comprises a screen position detecting means for detecting a position on a screen by a signal of a deflecting means, and a phase control means for controlling a phase of a synchronizing signal of a video signal. An analog convergence correction means for outputting a signal for analogically correcting the color shift on the screen with a timing pulse from the phase control means, a switch means for switching the timing pulse from the phase control means, and the switch means Digital convergence correction means for outputting a signal for digitally correcting the color misregistration on the screen with the timing pulse, and a convergence output for outputting a convergence correction current from the correction signals of the analog convergence correction means and the digital convergence correction means. Means and from the convergence correction current Data position detecting means for detecting the position of the convergence correction data, and a phase difference between signals connected to the output of the screen position detecting means and the data position detecting means to detect a phase difference between the phase control means and the switch means. Is provided.

[0009]

According to the present invention, with the above-described structure, the center position of the screen is detected by the screen position detecting means for detecting the position on the screen even when the horizontal and vertical frequencies are changed, and the analog signal is converted from the correction signal of the analog convergence correcting means. The position of the correction data at the center of the screen is detected by the data position detection unit that detects the position of the convergence correction data,
The phase difference is detected from the output signals of the screen position detection means and the data position detection means, the control signal is supplied to the phase control means to obtain the timing pulse of the correction data, and the digital convergence correction data is obtained by switching the switch means. By reading, the data phase of the correction data is controlled to match the phase of the signal indicating the screen display area even if the horizontal and vertical frequencies change.

[0010]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram of a convergence correction device according to an embodiment of the present invention.

In FIG. 1, 1 is a deflection circuit for displaying an image on a screen by horizontal and vertical synchronizing signals, 2 is a screen position detection circuit for detecting the screen position according to the magnitude of a deflection current obtained from the deflection circuit 1, 3 is a phase control circuit for controlling the phases of the horizontal and vertical synchronization signals, and 4 is a phase control circuit 3
An analog convergence circuit unit that generates an analog convergence correction signal that corrects a color shift in an analog manner by a timing pulse from 5 is a digital convergence circuit unit that digitally corrects a color shift, and 11 is an analog convergence circuit unit 4 and It is a convergence yoke drive circuit that generates a convergence correction signal from the circuit unit 5 as a correction current.

Reference numeral 12 denotes a convergence yoke drive circuit 11
A convergence yoke for performing convergence adjustment by passing a correction current from the device, 13 is a data position detection circuit for detecting the position of the correction data from the correction current of the convergence yoke drive circuit 11, and 14 is a screen position detection circuit 2 and a data position detection circuit 13. A phase comparator that detects the phase difference between the output signals and generates a control signal, and a switch circuit 15 that turns ON / OFF the timing pulse obtained from the phase control circuit 3 according to the control voltage of the phase comparator 14.

The operation of the convergence correction device of this embodiment having the above-described structure will be described below with reference to FIG. A synchronization signal is input from the input terminal and supplied to the deflection circuit 1. The deflection circuit 1 creates a deflection current ((a) in FIG. 2) to obtain a display image and supplies it to the deflection yoke to obtain a prescribed raster. Then, the deflection current from the deflection circuit 1 is applied to the screen position detection circuit 2. The screen position detection circuit 2 is composed of, for example, a zero-cross comparator, and detects the position of zero (the center of the display screen) of the deflection current. 2B shows an example of the pulse detected by the screen position detection circuit 2 from FIG.

The synchronizing signal from the input terminal is also input to the phase control circuit 3 to generate a timing pulse.
The timing pulse output from the phase control circuit 3 is supplied to the analog convergence circuit unit 4 and the switch circuit 15. The operation of the switch circuit 15 will be described later. Further, the analog convergence circuit unit 4 generates a parabolic waveform or a sawtooth waveform for analog correction by the timing pulse from the phase control circuit 3 and outputs correction data.

This analog correction data is supplied to the convergence yoke drive circuit 11, and the convergence drive circuit 11 amplifies the current to create a correction current. The correction current from the convergence yoke drive circuit 11 is supplied to the convergence yoke 12 to perform convergence adjustment.

Here, the convergence yoke drive circuit 1
The position of the minimum value of the correction current of 1 is the center point of the display screen. Therefore, the position of the minimum value of the correction current is detected by the data position detection circuit 13, the phase of the pulse detected by the screen position detection circuit 2 at the position of zero of the deflection current is phase-compared by the phase comparator 14, and the phase difference is determined by the voltage difference. And the control voltage is supplied to the phase control circuit 3. At this time, if the phase is controlled so that the phase difference is always zero, the phase of the correction current flowing through the convergence yoke 12 and the phase of the deflection current always match even if the frequency changes.

Next, the operation of the switch circuit 15 will be described. The switch circuit 15 is composed of, for example, a comparator and a switch, and the control voltage is supplied from the phase comparator 14 to the comparator. The comparator obtains the timing when the control voltage becomes zero, and the switch is turned on at that timing. When the switch is turned on, the timing pulse from the phase control circuit 3 is supplied to the digital convergence circuit section 5, and the digital convergence circuit section 5 generates digital correction data.
If the control voltage is not zero, the switch will be OFF,
The timing pulse from the phase control circuit 3 is not supplied,
The output of the digital convergence circuit unit 5 also becomes zero.

Next, the digital convergence circuit section 5 will be described with reference to FIG. 3. The digital convergence circuit section 5 is constructed as shown in FIG. 6 is an address generation circuit for generating an address signal synchronized with the timing pulse from the phase control circuit 3, 7 is a frame memory for reading the correction data of the address signal from the address generation circuit 6, and 8 is a correction obtained from the frame memory 7. A D / A conversion circuit for converting data into an analog amount, 9 is an LPF for smoothing correction data, and 10 is a crosshatch generation circuit for generating a crosshatch signal from an address signal from the address generation circuit 6.

Here, in the crosshatch generation circuit 10,
For example, as shown in FIG. 4, horizontal 13 rows and vertical 11
Generates a row cross-hatch pattern and displays it on the screen.
Point A in FIG. 4 is the center position of the screen. Further, the frame memory 7 stores the intersection data of the crosshatch signal, and outputs the intersection data in response to the address signal from the address generation circuit 6. Frame memory 7
The intersection data generated by is converted into an analog amount by the D / A conversion circuit 8, and the LPF 9 smoothes the correction data.
Correction data between intersections of crosshatch signals are created. This correction data is used for the analog convergence circuit unit 4
Is added to the analog correction data of and is given to the convergence yoke drive circuit 11. Then, a correction current from the convergence yoke drive circuit 11 is passed through the convergence yoke 12 to perform convergence adjustment.

Next, an embodiment of the data position detection circuit 13 according to the present invention is shown in FIG. In FIG. 5, 16 is a differentiating circuit and 17 is a zero-cross comparator. Also,
The operation of the data position detection circuit 13 will be described with reference to the waveform chart of FIG. FIG. 6A shows the waveform of the analog correction current. When this correction current is input to the differentiating circuit 16,
The rate of change of the correction current is as shown in FIG. The position of the minimum value of the correction current is the position where the rate of change is zero, so
The zero-cross comparator 17 detects the center position of the screen of the correction data ((c) of FIG. 6).

Next, the operation of the phase control circuit 3 will be described with reference to FIG.
7B, the position t _{c at} which the rate of change of the correction current is the minimum value is detected by the signal input from the data position detection circuit 13 and is supplied to the phase comparator 14. The phase is compared with the center position t _{h of the} screen input from the screen position detection circuit 2 of FIG. The phase comparator 14 outputs the voltage obtained by converting the phase difference into a voltage, and supplies the phase difference as an offset value to the phase control circuit 3. The phase control circuit 3 is configured such that the phase of the output pulse is controlled by an external DC control voltage, and the timing pulse of the output of the phase control circuit 3 is controlled by the offset value of the phase comparator 14. can do.

The timing pulse from the phase control circuit 3 is supplied to the analog convergence circuit section 4 and the switch circuit 1.
5, the analog convergence circuit section 4 and the digital convergence circuit section 5 generate a convergence correction signal. Therefore, the data phase of the correction data is t
_h = t _c . Therefore, the correction current finally flowing through the convergence yoke has a correction waveform as shown in (d) of FIG. 7, and the position of the minimum value of the correction current is the position of zero of the deflection current shown in (c) of FIG. Center point of)).

As described above, according to this embodiment, the screen position detecting circuit 2 and the data position detecting circuit 13 are provided, the center position of the screen is detected, and the phase of the correction data is controlled. Regardless of the change in frequency, it is possible to perform stable and highly accurate automatic adjustment without the need for readjustment.

[0024]

As described above, according to the present invention,
Detecting the center position of the screen and the position of the minimum value of analog correction data, controlling the phases of these two types of detection positions to match, and generating digital correction data when the phases match. As a result, a stable and highly accurate convergence correction device can be realized by automatically adjusting the data phase regardless of changes in horizontal and vertical frequencies, and its practical effect is great.

[Brief description of drawings]

FIG. 1 is a block diagram of a convergence correction device according to an embodiment of the present invention.

FIG. 2 is a waveform diagram of a deflection current and a screen position detection pulse according to the same embodiment.

FIG. 3 is a block diagram of a digital convergence circuit unit of the same embodiment.

FIG. 4 is a diagram showing an example of a display showing adjustment points in the same embodiment.

FIG. 5 is a block diagram of a data position detection unit of the same embodiment.

FIG. 6 is a waveform diagram of a correction current and a data position detection pulse of the same embodiment.

FIG. 7 is a waveform diagram of a deflection current and a convergence correction current according to the embodiment.

FIG. 8 is a block diagram of a conventional convergence correction device.

[Explanation of symbols]

 1 Deflection Circuit 2 Screen Position Detection Circuit 3 Phase Control Circuit 4 Analog Convergence Circuit Section 5 Digital Convergence Circuit Section 11 Convergence Yoke Drive Circuit 12 Convergence York 13 Data Position Detection Circuit 14 Phase Comparator 15 Switch Circuit 16 Differentiation Circuit 17 Zero Cross Comparator

Claims (2)

[Claims] 1. Deflection means for generating a signal indicating a region to be displayed on a screen from a synchronization signal of a video signal, screen position detection means for detecting a position on the screen by the signal of the deflection means, and synchronization of the video signals. Phase control means for controlling the phase of the signal, an analog convergence correction means for outputting a signal for analogly correcting the color shift on the screen with the timing pulse from the phase control means, and the timing from the phase control means Switch means for switching the pulse, digital convergence correction means for outputting a signal for digitally correcting the color misregistration on the screen with the timing pulse from the switch means, the analog convergence correction means and the digital convergence correction means Convergence that outputs the convergence correction current from the correction signal Force means, a data position detecting means for detecting the position of the convergence correction data from the correction current of the convergence output means, and a phase difference between the signals which is connected to the outputs of the screen position detecting means and the data position detecting means. A convergence correction apparatus comprising: the phase control means and a phase comparison means for supplying a control signal to the switch means. 2. The convergence correction device according to claim 1, wherein the data position detecting means includes a differentiating circuit and a zero-cross comparator connected to the differentiating circuit.