JPH07111132A - Field emission type cold cathode and manufacture thereof - Google Patents

Abstract

PURPOSE:To provide a field emission type cold cathode not only having the good uniformity of field emission, realizing low-voltage drive, and obtaining high field emission efficiency but also easy in high integration, and a manufacturing method thereof excellent in productivity. CONSTITUTION:This cold cathode is provided with a supporting base board 6, a protruded part 7 wherein an emitter-material-made tip formed on the surface of this supporting base board 6 is sharpened, an insulator layer 8 wherein the tip part of the emitter-material-made protruded part 7 is exposed to coat the emitter-material-made protruded part 7 surface, and a high concentration impurity diffusion layer 9. A gap, between the tip part of the emitter-material- made protruded part 7 and the high concentration impurity diffusion layer 9, can be correctly controlled by the film thickness of the insulator layer 8 to form a cold cathode, resultantly obtaining high field emission efficiency.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a field emission cold cathode and a method for manufacturing the same.

[0002]

2. Description of the Related Art For example, Journal of Applied Physics, Vol.
The development of a field emission cold cathode as announced in 248 (1976) is being actively pursued.

This type of field emission cold cathode is manufactured by means of means schematically showing the manufacturing process in FIGS. 6 (a) to 6 (c), for example.

First, a SiO ₂ layer 2, a gate electrode layer 3a and a sacrificial layer 3b are sequentially laminated and formed on a Si single crystal substrate 1, and then a hole 4 having a diameter of about 1.5 μm is formed in the hole 4. The emitter material 5 for field emission is formed in a conical shape by vapor deposition or the like.

More specifically, the SiO ₂ layer 2 is formed on the Si single crystal substrate 1 by a deposition method such as a CVD method.
By the sputtering method or the like.
The I-layer 3b is sequentially laminated. After that, FIG. 6 (a)
As shown in FIG. 3, the SiO ₂ layer 2, the gate electrode layer (Mo layer) 3a and the sacrificial layer (Al layer) 3b are selectively etched to form a pinhole 4 having a diameter of about 1.5 μm.

Next, as shown in FIG. 6B, the Si
While arranging the single crystal substrate 1 substantially horizontally and rotating it, a metal having an emitter function, for example, Mo is vacuum-deposited from the vertical direction. Due to the vacuum deposition of Mo, Mo is deposited in the pinhole 4 and on the Al layer 3b, and the opening surface of the pinhole 4 is sequentially closed as the deposition progresses. Mo is deposited in the shape of a cone with a sharp tip.

Thus, after depositing and arranging the required emitter material in the pinhole 4 in the shape of a conical tip, the Al layer is formed.
By removing 3b, a field emission cold cathode as shown in FIG. 6C is formed.

[0008]

However, the following inconvenient problems are recognized in practical use in the conventional field emission type cold cathode.

First of all, the field emission type cold cathode having the above-mentioned structure utilizes Si by utilizing the phenomenon of diameter reduction of the opening of the pinhole 4.
The emitter material 5 is formed in a conical shape in the pinhole 4 of the O ₂ layer 2 by a rotary evaporation method. Further, the height and shape of the tip portion of the emitter material 5 deposited in the shape of a conical tip has the material and thickness of the gate electrode layer 3a,
Also, the height and shape of the conical tip portion are likely to vary due to the shape and state of the drilled pinhole 4, the condition setting of the rotary evaporation method, etc., and in general, the uniformity of field emission is poor. There is.

In particular, there is a problem that the shape of the tip portion lacks sharpness (sharpness), resulting in a decrease in field emission efficiency and an increase in power consumption.

Further, the above-mentioned problem of variation has a great influence on so-called reproducibility and yield. For example, when a large number of field emission cold cathodes are manufactured (manufactured) on the same supporting substrate surface in the same process, the cost is increased. There is also the problem of inviting.

Second, the SiO ₂ layer 2 as an insulator layer
Since it is formed relatively thick by the CVD method or the like, it is difficult to accurately control the distance between the gate and the emitter, which greatly influences the efficiency of field emission, and thus the uniformity of field emission is poor (variation occurs. There is a problem that

It is considered that the field-emission cold cathode (device) can be driven at a low voltage by making the gate-emitter distance close to each other. Since it cannot be controlled with high accuracy, there is a problem that theoretically possible actions and effects cannot be obtained in practice.

The present invention has been made to solve the above problems, and exhibits good uniformity of field emission.
Further, it is an object of the present invention to provide a field emission cold cathode which can be driven at a low voltage, can obtain a high field emission efficiency, can be easily highly integrated, and has excellent productivity, and a manufacturing method thereof.

[0015]

A field emission type cold cathode according to the present invention comprises a support substrate, an emitter material protrusion formed with a sharp tip on the support substrate surface, and the emitter material protrusion. An insulating layer that exposes the tip of the emitter material and covers the surface of the convex portion made of emitter material, and a high-concentration impurity diffusion layer that exposes the tip of the convex portion of the emitter material and covers the insulator layer. Is characterized by.

Further, the method for manufacturing a field emission cold cathode according to the present invention includes the step of forming a concave portion having a sharp tip on the first main surface side of the first supporting substrate, and the concave inner wall surface. First
A step of forming a high-concentration impurity diffusion layer on the support substrate surface, a step of forming an insulator layer on the impurity diffusion layer surface, and a step of depositing an emitter material while filling the recess on the insulator layer surface, A step of joining and integrating a second supporting substrate to the emitter material layer surface; a step of etching away the first supporting substrate from the second main surface side to expose an impurity diffusion layer including a convex portion; And selectively removing the diffusion layer of the impurity and the insulator layer at the tip of the emitter to expose the tip of the protrusion made of the emitter material.

Alternatively, a step of engraving a recess having a sharp bottom on the first main surface side of the first supporting substrate, and on the first main surface including the inner wall surface of the recess of the first supporting substrate. Forming an insulating layer on the insulating layer surface, depositing the emitter material on the insulating layer surface while filling the recessed portion to form an emitter material layer having a convex portion having a pointed tip, and the emitter material layer A step of joining a second supporting substrate to the surface opposite to the surface on which the convex portion is formed, and supporting the emitter material layer by the second supporting substrate; and covering the convex portion of the emitter material layer. Etching the first support substrate from the second main surface side of the substrate until at least the tip of the insulating layer is exposed, and etching from the portion exposed from the first support substrate. To selectively remove the insulating layer by etching And exposing the tip of the convex portion of the emitter material layer covered with the insulating layer to form an emitter, and the first support substrate having at least a gap with the tip of the emitter. And a step of forming a gate layer by leaving them so as to face each other.

Alternatively, the step of forming an etching stopper layer on the first main surface of the first supporting substrate, and the step of penetrating the etching stopper layer on the first main surface side of the first supporting substrate The step of engraving a recess having a sharp bottom with a depth reaching the middle of the thickness of the first supporting substrate, the etching stopper layer exposed as the inner wall surface of the recess, and the first Forming an insulating layer on the etching stopper layer including a supporting substrate; and depositing an emitter material on the surface of the insulating layer while depositing the emitter material, the emitter material having a protrusion having a pointed shape. A step of forming a layer, and etching the first supporting substrate from the second main surface side of the substrate to the etching stop layer to remove the tip of the insulating layer covering the convex portion of the emitter material layer. Part is the surface of the etching stop layer Exposing step and etching from the portion exposed from the etching stop layer to selectively etch away the insulating layer, and the tip of the convex portion of the emitter material layer covered with the insulating layer Is formed to form an emitter, and the gate stop layer is formed by leaving the etching stop layer so as to be opposed to at least the tip of the emitter with a gap.

In the field emission cold cathode according to the present invention, a pyramid-shaped or conical-shaped recess having a sharp tip can be formed on the surface of a supporting substrate such as a Si single crystal plate by utilizing the anisotropy of etching. The impurity diffusion layer formation region functions as an etching stop layer, the impurity diffusion layer also functions as a gate electrode layer depending on its resistance value, and a sharp oxide along a predetermined surface is formed by using the thermal oxidation method. This was done by focusing on the formation of layers (insulator layers).

Further, in the field emission cold cathode and the method for manufacturing the same according to the present invention, the supporting substrate is capable of selectively forming a concave portion having a pointed tip, and an insulating supporting substrate or a high structure which is integrated. Any material may be used as long as it has a selective etching property with respect to the concentration impurity diffusion layer and the like. But,
Si, Ge that facilitates formation of a high-concentration impurity diffusion layer or control of formation of an insulating layer with high precision such as film thickness and shape
A single crystal plate such as is preferable. Further, the high-concentration impurity diffusion layer is formed, for example, with a B (boron) concentration of 3 × 10 ¹⁹ cm ^−3.
The Si layer contains the above p-type impurities, and the concentration of the impurities is high, for example, about 10 ²⁰ to 10 ²¹ cm ⁻³ , and the resistivity is 10 ^−4.
When it is as low as Ω · cm, it can be used (also used) as a gate electrode layer. The impurity diffusion layer is
Not only the p-type but also the n-type and the i-type as long as they function as an etching stop layer when the supporting substrate is removed by etching.
It may be a mold.

Further, the insulator layer may be formed by depositing SiO ₂ on the surface of the impurity diffusion layer by, for example, a CVD method, but it is dense and the thickness can be easily controlled. For example, since it is possible to form an insulator layer having a sharp tip along the inner wall surface of the pyramid-shaped recess, it is preferable to use the thermal oxidation method of thermally oxidizing the surface of the impurity diffusion layer as described above.

[0022]

In the field emission cold cathode and the method for manufacturing the same according to the present invention, a high-concentration impurity diffusion layer serving as an etching stopper layer on a surface including a recess formed on the surface of a supporting substrate such as a Si single crystal substrate, And an insulator layer such as a thin thermal oxide insulating layer is formed, and then an emitter material layer is deposited, so that the gate-emitter distance can be accurately controlled because the thermal oxide insulating layer and the like can be formed and controlled. It is possible to Further, since the gate-emitter distance is reduced, the impurity diffusion layer functions as an etching stop layer even when the layer thickness of the thermal oxidation insulating layer or the like is made as thin as possible, so that the insulator layer and further the emitter material layer are not affected. The support substrate can be removed without etching. And, the fact that the thermal oxide insulating layer and the emitter material layer are protected from the erosion of the etching solution and the distance between the gate and the emitter can be made closer brings about a great improvement in the field emission efficiency and the uniformity.

On the other hand, since the emitter material is embedded (filled) in the recess formed on the surface of the supporting substrate and the recess can be formed with high precision, the height, shape, sharpness of the tip, etc. A uniform (uniform) emitter is formed with good reproducibility. In the recess formed in the surface of the supporting substrate, the tip of the recess is sharpened due to the growth action of the thermal oxidation insulating layer on the inner wall surface of the recess, so that the recess is embedded and filled. The tip of the emitter is also sharper.

Further, the high-concentration impurity diffusion layer functions as an etching stop layer, but when the P-type impurity concentration is high and the electric conductivity is good, it can be used as it is as a gate electrode layer. is there. When this etching stopper layer is also used as a gate electrode layer, when the gate-emitter distance is formed close to each other with a gap, together with the well-controlled insulator layer. Precise control of the gate electrode layer becomes unnecessary and the labor required for that is eliminated.
Manufacturing work time, material cost, etc. can be reduced, and as a result, manufacturing cost can be reduced.

[0025]

Embodiments of the field emission cold cathode and the method for manufacturing the same according to the present invention will be described below in detail with reference to FIGS. 1 and 2A to 2H.

(Embodiment 1) FIG. 1 is a perspective view showing the outline of the structure of a field emission type cold cathode of the first embodiment according to the present invention including its sectional structure.

In FIG. 1, 6 is an insulating support substrate having a high heat resistance such as a Pyrex glass plate, and 7 is a projection made of an emitter material integrally formed with a sharp tip on the surface of the insulating support substrate 6. The portion (that is, the emitter main body portion), which is formed of a metal material such as W, Mo, or Ta, has a pointed convex shape (in a so-called pyramid shape). 8 is a convex portion made of the above-mentioned emitter material 7
Is an insulator layer which is covered with and whose tip is exposed, and this insulator layer is formed of, for example, a SiO ₂ layer. Reference numeral 9 denotes a high-concentration impurity diffusion layer which covers the surface of the insulator layer 8 and exposes the tip of the emitter material-made convex portion 7, and is formed of, for example, a Si layer formed by diffusing B (boron). It is formed. Reference numeral 10 denotes a gate electrode layer formed so as to expose the tip of the convex portion 7 made of the emitter material and cover the surface of the impurity diffusion layer 9.

As described above, in the field emission cold cathode according to the present invention, the above-mentioned pyramid-shaped emitter material-made convex portion 7 is formed as the emitter main body portion on one surface of the insulating support substrate 6. There is. The tip end of the pyramid-shaped emitter material protrusion 7 is exposed so that electrons can be emitted in a direction substantially perpendicular to the surface of the insulating support substrate 6, and the tip end of the emitter material protrusion 7 is exposed. The gate electrode layers 10 are formed so as to face each other with a gap.

A field emission type cold cathode according to the present invention having a main part formed in the above structure is shown in FIG.
It is manufactured through the steps as schematically shown in (a) to (h). Next, an example of the manufacturing method will be described in detail with reference to FIG.

First, a Si single crystal substrate 11 is prepared as the first supporting substrate 6, and one plane of the Si single crystal substrate 11 (referred to as a first main surface) is changed as shown in FIG. 2A. Etching is performed by means of isotropic etching, and recesses 11a having a sharp pointed shape (which looks like an inverted pyramid type in the drawing) toward the bottom are formed at a required pitch.

This is, for example, a thermal oxidation treatment by a dry oxidation method or the like from the first main surface side of the Si single crystal substrate 11 of the p-type and (100) crystal plane orientation to obtain a thin thermal film having a thickness of about 0.1 μm. An oxide film (SiO ₂ ) film is formed, and a photoresist is applied on the surface of this thermal oxide film by spin coating or the like. Then, for example, using a stepper, the photoresist is patterned by performing exposure / development processing so as to obtain a rectangular opening of 0.8 μm, and then, for example, NH ₄ F
Selective etching of the exposed region of the thermal oxide film (SiO ₂ ) is performed using the HF mixed solution as an etchant.
And after removing the photoresist, KO of 30%
By performing anisotropic etching treatment with H aqueous solution,
As shown in FIG. 2 (a), it has an inverted pyramid shape and a depth of about
A recess 11a of 0.56 μm is formed on the first main surface side of the Si single crystal substrate 11.

After that, the thermal oxide film functioning as the mask is removed by using a mixed solution of NH ₄ F and HF as an etchant, and then Si containing the concave portion 11a having an inverted pyramid shape is formed.
On the surface of the single crystal substrate 11, for example, 3 × 10 5
B-diffused Si layer 12 containing B (boron) at a concentration of ¹⁹ cm ^-3 or more
Is formed to have a substantially uniform thickness, for example, a thickness of 0.3 μm. The B-diffused Si layer 12 is an etching stop layer (or a sacrificial layer) when the Si single crystal substrate 11 is removed by etching from the second main surface side in a step described later, and thus has a high concentration of impurities as shown in FIG. Although it functions as the diffusion layer 10, the concentration of p-type impurities is set to, for example, 10 ²⁰ to 10 ²¹ cm ^−3.
When the resistivity is increased to about 10 ⁻⁴ Ω · cm and the resistivity is decreased to about 10 ⁻⁴ Ω · cm, it can be used as it is as the gate electrode layer 10. In that case, not only the number of steps is reduced, but also the distance between the gate and the emitter can be made closer, that is, the gap between the gate and the emitter can be further miniaturized.

Next, the Si single crystal substrate 11 is subjected to a thermal oxidation treatment to thermally oxidize the surface of the B-diffused Si layer 12 to a thickness of
An insulator layer 13 of 0.2 μm is formed. This insulator layer 13
Is a layer to be the insulator layer 8 shown in FIG.

Then, a metal material such as W, Mo or Ta is sputtered on the insulator layer 13 to fill the pyramid-shaped recess 11a with a thickness of 0.8 μm.
An emitter material layer 14 of about m is formed. The convex portion of the emitter material layer 14 formed so as to fill the portion of the pyramid-shaped concave portion 11a becomes the emitter material-made convex portion 7 shown in FIG.

Further, ITO having a thickness of about 1 μm is formed on the emitter material layer 14 by a sputtering method or the like.
(Indium-tin based oxide) is deposited to form the conductive layer 15 to form a laminated body as shown in FIG. The conductive layer 15 made of ITO or the like may be omitted depending on the material of the emitter material layer 14. However, in that case, the surface of the emitter material layer 14 also serves as the conductive layer 15.

On the other hand, as the second supporting substrate, an Al layer 16 for an electrostatic bonding electrode having a thickness of about 0.4 μm is formed on the back surface (back surface).
Prepare a Pyrex glass plate 17 having a thickness of about 1 mm coated with a conductive layer 15 as shown in FIG. 2 (c).
The Pyrex glass plate 17 is arranged so as to be bonded to the surface of, and a voltage of about several hundred V is applied between the conductive layer 15 and the Al layer 16 to bond these interfaces by a so-called electrostatic bonding method. This bonding may be performed with an adhesive, but the electrostatic bonding method as described above is preferable from the viewpoint of weight reduction and thinning of the manufactured field emission cold cathode. After bonding the Pyrex glass plate 17 in this manner, the Al coated on the back surface of the Pyrex glass plate 17
The layers 16, for example, is etched away with HNO ₃ · CH ₃ COOH · HF mixed acid solution.

Then, an aqueous solution of ethylenediamine / pyrocatechol / pyrazine (mixing ratio: 75 cc: 12 g:
3 mg: 10 cc) was used as an etchant to remove the Si single crystal substrate 11 as a supporting plate from the second main surface side by etching, and the insulator layer 13 was formed as shown in FIG.
Thus, a laminate having a shape having the emitter material-made convex portion 18 (that is, the portion that becomes the concave portion 11a in FIG. 1) covered by the lamination of the B diffusion Si layer 12 and the B diffusion Si layer 12 is obtained. In this etching step, the B diffusion Si layer 12 functions as an etching stop layer of the Si single crystal substrate 11, and the insulating layer 13 having a small film thickness and the pyramid-shaped convex portion 18 made of an emitter material having a sharp tip are formed. It serves to protect against erosion by the etching solution.

Then, a W layer 19 is formed to a thickness of about 0.5 μm on the surface of the B diffusion Si layer 12 exposed by removing the Si single crystal substrate 11 by, for example, a sputtering method. Then, on the surface of the W layer 19, for example, by spin coating, as shown in FIG. 2 (e), the pyramid-shaped emitter material-made convex portion 18 has a thickness such that the tip end portion is hidden, for example, a thickness of about 0.9 μm The photoresist layer 20 is applied to the thickness of.

After that, a dry etching process using oxygen plasma is performed, and as shown in FIG. 2F, a part of the photoresist layer 20 is etched so that the tip of the protrusion 18 made of the emitter material is exposed to about 0.7 μm. Remove.

Then, a reactive ion etching process is performed to selectively remove the tip portion of the W layer 19 exposed by the etching removal of the photoresist layer 20, as shown in FIG. 2 (g). In this way, an opening is formed in the W layer 19 so as to expose the tip end of the protrusion 18 made of the emitter material, and the gate electrode layer 10 as shown in FIG. 1 is obtained. Then, even after the remaining portion of the photoresist layer 20, that is, the W layer 1 after functioning as a mask in the selective etching of the tip portion of the W layer 19 is performed.
The photoresist layer 20 left on 9 is removed.

Then, the B diffusion Si layer 12 and the insulator layer 13 in the region corresponding to the tip of the protrusion 18 made of the emitter material are selectively removed by etching using a mixed solution of NH ₄ F and HF, and the emitter is removed. The tip of the material-made convex portion 18 is exposed.

That is, as shown in FIG. 2H, the opening 19 of the gate electrode layer 10 formed using the W layer 19 is formed.
A field emission type cold cathode according to the present invention having a structure in which the tip of the pyramid-shaped emitter material-made convex portion 18 is exposed can be obtained from a.

According to the manufacturing method of the present invention as described above, the bottom surface (tip) engraved by anisotropic etching is used.
On the first main surface side of the support substrate 11 having a sharp concave portion, B
Forming a B-diffused Si layer 12 by diffusing such impurities as a high concentration impurity and further forming an insulator layer 13 by a thermal oxidation method, and then forming an emitter material layer 14 so as to fill the recess. Form. By this process, a concave portion with a sharp tip can be engraved with good reproducibility by anisotropic etching, and dense SiO ₂ growth due to thermal oxidation when forming the insulator layer 13, and further, B
Due to the etching resistance of the diffusion Si layer 12 to the insulator layer 13 and the emitter material layer 14, it is possible to easily and easily form an emitter having a sharp tip and a uniform height and shape and excellent uniformity. it can.

Therefore, according to the present invention, it is possible to provide a field emission type cold cathode having stable quality. Further, the distance between the gate electrode layer 10 and the emitter function portion (emitter-gate distance) can be formed with a thickness controlled accurately by the thermal oxidation method, so that the insulator layer 13 can be formed at a relatively low voltage. It is possible to provide a field emission cold cathode that is driven and has high electron emission efficiency.

In the above, on the surface of the B diffusion Si layer 12,
Although the structure in which the W layer 19 is arranged as the gate electrode layer 10 is shown as an example, when the impurity concentration of the B diffusion Si layer 12 is high and the resistance value thereof is low, the B diffusion Si layer 1 is
2 has a structure in which the W layer 19 is disposed on the surface of the insulator layer 13 exposed by removing the impurity diffusion layer 12 which is mainly involved in the selective etching of the supporting substrate 11 even if 2 is made to function as the gate electrode layer. Even if taken, the same action and effect can be obtained.

The impurities are p-type B, Al, and G.
With a, In, or n-type P, As, Ti, or i-type Ge, Sn, etc., the effect of almost the same tendency can be obtained.

Further, instead of the Si single crystal plate, GaAs is used.
A substrate or the like may be used as the first support substrate, or a material having a low work function and usable as an emitter, such as Mo, Ta, or Si, may be used as the emitter material instead of W.

Furthermore, when a soda glass plate or the like is used as the second supporting substrate instead of the Pyrex glass plate, the same effect as in the above embodiment can be obtained.

Further, although the field emission type cold cathode is described as a single element in the above-mentioned embodiment, for example, the field emission type cold cathode according to the present invention having the above-mentioned structure on one Si single crystal plate. It goes without saying that a plurality of, for example, may be arranged in a matrix and used.

(Embodiment 2) FIG. 3 is a diagram showing a manufacturing process of a field emission type cold cathode of a second embodiment according to the present invention.
The manufacturing method of the second embodiment will be described with reference to FIG.

First, as shown in FIG. 3A, a low resistance (100) crystal plane orientation Si single crystal substrate 301 is prepared as a first supporting substrate.

Next, as shown in FIG. 3B, one flat surface of the Si single crystal substrate 301 (this surface is referred to as a first main surface).
At this point, a sharp concave portion 302 is formed toward the bottom. As a method of engraving such a recess 302, a method using anisotropic etching of Si as described below can be applied. That is, a SiO ₂ thermal oxide film 301b having a thickness of about 0.1 μm is formed on the Si single crystal substrate 301 made of Si single crystal having the (100) crystal plane orientation from the first main surface side by a dry oxidation method. Then, a photoresist is further applied by spin coating. Then, using a stepper or the like, for example, the photoresist is exposed and developed so as to obtain a rectangular opening of 1 μm square, and patterning is performed. After that, an NH ₄ F / HF mixed solution is used as an etchant. , The SiO ₂ thermal oxide film 301b is etched. Then, after removing the photoresist, anisotropic etching is performed using a 30 wt% KOH aqueous solution as an etchant, so that the reverse pyramid-shaped portion having a depth of, for example, 0.71 μm is formed on the first main surface side of the Si single crystal substrate 301. The concave portion 302 can be engraved. Then, using, for example, a NH ₄ F / HF mixed solution, the Si single crystal substrate 3
The SiO ₂ thermal oxide film 301b left on the surface of 01 is once removed.

Subsequently, as shown in FIG. 3C, a thermal oxidation process is performed on the first main surface of the Si single crystal substrate 301 including the inner wall surface of the recess 302 to form a thermal oxide layer 303. Form. In this embodiment, the thermal oxide layer 303 has a thickness of 0.5 μm.
Was formed by the wet thermal oxidation method. Then, for example, a W layer or a Mo layer is formed as an emitter material layer 304 on the thermal oxide layer 303. The emitter material layer 304 is formed so as to cover the upper surface of the thermal oxide layer 303 while filling the recess 302. In this embodiment, the emitter material layer 304 is formed on the thermal oxide layer 303 other than the recess 302 so as to have a thickness of 2 μm by the sputtering method.

Next, as shown in FIG. 3D, as a second supporting substrate, a glass made of a highly heat-resistant material such as Pyrex glass having a 0.3 μm thick Al layer 305 coated on the back surface. A substrate 306 is prepared. The glass substrate 306 is arranged and adhered so as to overlap the surface of the emitter material layer 304 opposite to the surface on which the pointed convex portion 307 is formed. For this adhesion, for example, an electrostatic adhesion method can be applied. Then, the Al layer 305 on the back surface of the glass substrate 306 is covered with HNO ₃ --CH ₃ O.
Remove with a mixed acid solution of OH-HF.

Next, as shown in FIG. 3 (e), the entire substrate is turned upside down (the front and back are inverted), and the Si single crystal substrate 301 is provided on the side opposite to the first main surface (on the back side). A mixed aqueous solution of ethylenediamine, pyrocatechol and pyrazine called EDP with the second main surface facing upward (in this example, ethylenediamine: pyrocatechol: pyrazine: water = 75 m)
(l: 12 g: 0.45 g: 10 ml) is used as an etchant to remove the Si single crystal substrate 301 from the second main surface opposite to the first main surface by etching. At this time, the etching time is controlled so that the Si single crystal substrate 301 is not entirely etched in the thickness direction, but the tip portion of the protrusion 307 of the emitter material layer 304 is partially exposed as shown in (e). The remaining portions are left as a Si single crystal layer 308 having such a thickness as to be covered. This Si single crystal layer 308 is used as a gate electrode. In this way, the thermal oxide layer 303 covering the pointed tip of the protrusion 307 of the emitter material layer 304 is covered with the Si single crystal layer 308.
Partially exposed from.

Next, as shown in FIG. 3 (f), NH ₄ F
/ HF mixed solution is used as an etchant to etch away the thermal oxide layer 303 in the portion of the emitter material layer 304 that covers the tip of the protrusion 307, and the pointed tip of the protrusion 307 is made into a Si single crystal layer. Partially exposed from 308. Thus the emitter is obtained.

According to the manufacturing method as described above, in addition to the effect of the manufacturing method of the first embodiment, the field emission cold cathode according to the present invention can be formed more easily.

(Embodiment 3) FIG. 4 is a view showing a third embodiment of the method for manufacturing a field emission cold cathode according to the present invention.

In the figure, the same parts as those in the first and second embodiments are designated by the same reference numerals. In the manufacturing method of this embodiment, the thin etching stop layer in which B (boron) is diffused at a high concentration is provided in the above-described first and second embodiments so that the Si single crystal substrate 301 is exposed from the second main surface side. The etching is stopped at this etching stop layer. Therefore, since it is not necessary to perform complicated control of the etching time as in the second embodiment, it is possible to more easily form the field emission cold cathode according to the present invention.

First, as shown in FIG.
0) A thin etching stop layer 401 is formed by diffusing impurity ions such as B (boron) on the first main surface of the Si single crystal substrate 301 having a crystal plane orientation at a high concentration of, for example, 10 ¹⁹ cm ³ or more. . This high-concentration impurity diffusion is performed by, for example, a thermal diffusion method or an ion implantation method.

Next, as shown in FIG. 4B, one plane (first main surface) side of the etching stopper layer 401 formed on the Si single crystal substrate 301, as in the first embodiment. From this, a sharp concave portion 302 is engraved toward the bottom. As a method of engraving the concave portion 302, a method using anisotropic etching of Si can be applied as in the second embodiment. That is, the Si single crystal substrate 301 on the surface of the etching stop layer 401 and the portion exposed in the recess 302.
The surface is subjected to a thermal oxidation process by a dry oxidation method, and a SiO ₂ thermal oxide film 301b having a thickness of about 0.1 μm from the surface
To form. Further, a photoresist (not shown) is applied thereon by spin coating. Then, using a stepper or the like, the photoresist is exposed and developed, and patterned so that a rectangular opening of 1 μm square is obtained, for example. Then, the SiO ₂ thermal oxide film 301b is patterned using the NH ₄ F / HF mixed solution as an etchant. Then, the photoresist is removed, and anisotropic etching is performed using the pattern of the SiO ₂ thermal oxide film 301b as an etching mask and a 30 wt% KOH aqueous solution as an etchant. Thus, the etching stop layer 401 reaches the first main surface of the Si single crystal substrate 301 or more, for example, the depth is 0.71 μm.
An inverted pyramid-shaped recess 302 is engraved. Then, for example, using a NH ₄ F / HF mixed solution, the Si single crystal substrate 30
The SiO ₂ thermal oxide film 301b left on the surface of No. 1 is removed.

Since the etching rate of the KOH aqueous solution in the etching stopper layer 401 in which B is diffused at a high concentration is not much different from the etching rate for the Si single crystal, the etching stopper layer 401 is formed on the Si single crystal substrate 301. Even if it does, a good etching speed can be obtained. Therefore, even when the etching stopper layer 401 as in this embodiment is formed on the Si single crystal substrate 301, the recess 302 can be well formed. Of course, other etchants may be used as the etchant as long as they can etch the etching stop layer 401.

Next, as shown in FIG. 4C, the recess 30 is formed.
Etch stop layer 401 and S exposed by 2
Wall surface of i single crystal substrate 301 and etching stop layer 401
A thermal oxidation process is applied to the flat surface to form a thermal oxide layer 303. The etching stop layer 401 becomes thick during this thermal oxidation, but even after the expansion is completed in this way, the pyramidal protrusions 3 are formed.
The thickness of the etching stop layer 401 is set in advance when the film is formed on the Si single crystal substrate 301 so that the thermal oxide layer 303 in the portion covering the tip of 07 is projected from the etching stop layer 401. . Then, similarly to the above-described second embodiment and the like, a material suitable for the emitter material such as W or Mo is deposited on the thermal oxide layer 303 by deposition or the like to form the emitter material layer 304.

Next, as shown in FIG. 4D, as in the case of the second embodiment, as the second supporting substrate, the back surface has a thickness of 0.3.
A glass substrate 3 made of a material having high heat resistance such as Pyrex glass coated with an Al layer 305 having a thickness of 3 μm.
Prepare 06. The glass substrate 306 is arranged and bonded so as to overlap the surface of the emitter material layer 304 opposite to the surface on which the pointed (pyramidal) convex portion 307 is formed. For this adhesion, for example, the electrostatic adhesion method can be applied as in the second embodiment. Then, the Al layer 305 on the back surface of the glass substrate 306 is covered with HNO ₃
It is removed by mixed acid solution of -CH ₃ OOH-HF.

Next, as shown in FIG. 4 (e), a mixed aqueous solution of ethylenediamine, pyrocatechol and pyrazine called EDP (in this example, ethylenediamine: pyrocatechol: pyrazine: water = 75 ml: 12 g: 0.45 g:
10 ml) as an etchant, and is removed by etching from the side of the second main surface of the Si single crystal substrate 301 opposite to the first main surface (on the back side).

Here, since the etching stopper layer 401 is formed of a Si material obtained by diffusing high concentration B,
The etching rate of an etchant such as EDP used in the second embodiment is considerably lower than that of single crystal Si. Therefore, the etching from the second main surface side of the Si single crystal substrate 301 is stopped by the etching stop layer 401, and the etching stop layer 401 remains in the almost same shape. Thus, the protrusion 3 of the emitter material layer 304
The thermal oxide layer 303 that covers the sharp tip of 07 can be partially exposed from the etch stop layer 401.

Next, as shown in FIG. 4 (f), NH ₄ F
/ HF mixed solution is used as an etchant to remove the thermal oxide layer 303 in the portion of the emitter material layer 304 covering the tip of the protrusion 307, and remove the sharp tip of the protrusion 307 from the etching stop layer 401. Partially exposed from. Thus the emitter is obtained.

On the other hand, since the etching stop layer 401 is formed of a Si material in which a high concentration of B is diffused and has good conductivity, the etching stop layer 401 is left as it is and used as a gate electrode. can do.

According to the manufacturing method of the third embodiment as described above, in addition to the effects of the manufacturing methods of the first and second embodiments, the Si single crystal substrate 301 as in the second embodiment is obtained.
Since the complicated control of the etching depth and the like at the time of etching from the second main surface side can be eliminated, the field emission cold cathode according to the present invention can be formed more easily.

(Embodiment 4) FIG. 5 is a view showing a fourth embodiment of the method for manufacturing a field emission cold cathode according to the present invention.
For simplification of description, in FIG. 5, the same parts as those in the above-described embodiments are designated by the same reference numerals.
In addition, in the fourth embodiment, characteristic portions different from the above-described embodiments will be mainly described.

In the manufacturing method of this embodiment, an etching stop layer 501 formed of an n-type Si material is used instead of the etching stop layer 401 of the third embodiment, and the etching stop layer 501 is reversed. By applying a voltage, S
It is characterized in that the etching from the second main surface of the i single crystal substrate 301 is stopped.

First, as shown in FIG. 5A, an n-type Si layer 501 is formed on a Si single crystal substrate 301 made of a p-type (100) crystal plane orientation Si single crystal substrate 301 by a heat diffusion method. A thin film is formed by an ion implantation method or the like, and a pn junction is formed at the interface between the Si single crystal substrate 301 and the Si layer 501.

Subsequent steps shown in FIGS. 5B to 5D are almost the same as those in the above-described third embodiment.

The present embodiment is characterized in that electrochemical etching is used in the step of removing the Si single crystal substrate 301 shown in FIG. 5 (e).

This is because, for example, in a KOH aqueous solution, a reverse voltage is applied to the pn junction generated at the interface between the etching stop layer 501 and the Si single crystal substrate 301, and p-type Si is formed.
In this method, only the single crystal substrate 301 is selectively etched, and the n-type Si layer 501 is left as it is without being etched.

In this way, the Si single crystal substrate 301 as shown in FIG. 5E is etched from the second main surface side, and the Si single crystal substrate 301 is removed over almost the entire thickness. Only the tip portion of the protrusion 307 of the emitter material layer 304 is exposed from the etching stopper layer 501.

The subsequent steps are the same as those in the above-mentioned embodiments. That is, as shown in FIG. 5 (f), NH ₄
Using the F / HF mixed solution as an etchant, the thermal oxide layer 303 in the portion covering the tip of the protrusion 307 of the emitter material layer 304 is removed by etching. In this way, the convex portion 3
The pointed tip of 07 is partially exposed from the Si single crystal layer 308 to obtain an emitter.

Also by the manufacturing method shown in the fourth embodiment, the gap between the emitter and the gate electrode can be formed with high accuracy and easily, as in the above-described embodiments. You can

In the second to fifth embodiments described above, the etching stop layer 401 or the n-type Si layer 501 in which B is diffused at a high concentration is processed by the process shown in FIGS. It may be already formed by epitaxial growth on the first main surface of the Si single crystal substrate 301.

In addition, it goes without saying that various changes can be made to the material for forming each part, the film formation thereof, the patterning method and the like without departing from the scope of the present invention.

[0081]

As described above in detail, according to the present invention, it is possible to form a pyramid-shaped or conical-shaped recess having a sharp tip on the surface of a supporting substrate by utilizing the anisotropy of etching. The impurity diffusion layer formation region functions as an etching stop layer, the impurity diffusion layer also functions as a gate electrode layer depending on its resistance value, and a sharp oxide layer along a predetermined surface is formed by using a thermal oxidation method or the like. The purpose is to enable the (insulator layer) to be formed accurately.

That is, the field emission cold cathode according to the present invention is
It has excellent performance that it always exhibits good uniformity of field emission, can be driven at a low voltage, and has high field emission efficiency. And according to the method for manufacturing a field emission cold cathode according to the present invention, a field emission cold cathode having the functional features as described above, and also easy to be highly integrated,
It is possible to manufacture with a good yield and productivity (mass productivity).

[Brief description of drawings]

FIG. 1 is a partial cross-sectional perspective view showing a configuration example of a main part of a field emission cold cathode according to the present invention.

FIG. 2 is a diagram showing a manufacturing process of the field emission cold cathode according to the first embodiment of the present invention.

FIG. 3 is a diagram showing a manufacturing process of a field emission cold cathode according to a second embodiment of the present invention.

FIG. 4 is a view showing a manufacturing process of the field emission cold cathode according to the third embodiment of the present invention.

FIG. 5 is a diagram showing a process of manufacturing a field emission cold cathode according to a fourth embodiment of the present invention.

FIG. 6 is a diagram showing an outline of a manufacturing process of a conventional field emission cold cathode.

[Explanation of symbols]

1 ………… Si single crystal substrate, 2 ………… SiO ₂ deposition layer, 3a ………… Mo layer (gate electrode layer), 3b ………… Al layer (etching stop layer), 4 ………… hole (Pinhole), 5 ... Emitter material, 6, 17 ... Insulating support substrate, 7, 18 ... Convex part made of emitter material, 8, 13 ... Thermal oxide layer (insulator layer), 9, 12 ... High-concentration impurity diffusion layer, 10, 19 '... Gate electrode layer, 11a ... Recessed portion, 14 ......... Emitter material layer, 15 ......... Conductive layer, 16 ... Electrostatic bonding electrode layer, 19 ... ...... W coating layer, 19a …… opening, 20 ………… photoresist layer, 301 …… Si single crystal substrate, 301b ・ ・ ・ SiO ₂ thermal oxide film, 302 …… recess, 303 …… Si thermal oxidization layer, 304 ... Emitter layer, 305 ... Al layer, 306 ... Glass substrate, 307 ... Emi The convex portion of the layer, 308 ...... Si single crystal layer, 401 formed by diffusing ...... B at a high concentration etch stop layer, an etch stop layer formed by using the 501 ...... n-type Si material

Claims (4)

[Claims] 1. A support substrate, a projection made of an emitter material formed with a sharp tip on the surface of the support substrate, and a tip of the projection made of the emitter material is exposed to expose a surface of the projection made of the emitter material. A field emission type cold cathode comprising: an insulating layer for covering; and a high-concentration impurity diffusion layer for exposing the tip of the emitter material-made convex portion and covering the insulating layer. 2. A step of forming a concave portion having a sharp tip on the first main surface side of the first supporting substrate, and a high-concentration impurity diffusion layer on the surface of the first supporting substrate including the concave inner wall surface. A step of forming, an step of forming an insulator layer on the surface of the impurity diffusion layer, a step of depositing an emitter material while filling a recess on the surface of the insulator layer, and a step of bonding a second support substrate to the surface of the emitter material layer. A step of unifying, a step of exposing the first support substrate by etching from the second main surface side to expose an impurity diffusion layer including a convex portion, and an impurity diffusion layer and an insulator layer at the tip of the convex portion Is selectively removed to expose the tip of the convex portion made of the emitter material, and a method for manufacturing a field emission cold cathode. 3. A step of engraving a recess having a sharp bottom on the first main surface side of the first supporting substrate, and a first main surface including the recess inner wall surface of the first supporting substrate. A step of forming an insulating layer on the insulating layer surface, a step of filling the concave portion on the surface of the insulating layer with an emitter material to form an emitter material layer having a convex portion with a pointed tip, and the emitter material layer A step of bonding a second supporting substrate to the surface opposite to the surface on which the convex portion is formed, and supporting the emitter material layer by the second supporting substrate; and covering the convex portion of the emitter material layer. Etching the first support substrate from the second main surface side of the substrate until at least the tip of the insulating layer is exposed, and etching from the portion exposed from the first support substrate. To selectively remove the insulating layer by etching. , Together to expose the tip of the convex portion of the emitter material layer that has been coated on the insulating layer to form an emitter,
And a step of forming a gate layer by leaving the first support substrate so as to face the tip of the emitter with a gap, and a method of manufacturing a field emission cold cathode. 4. A step of forming an etching stop layer on a first main surface of a first support substrate, and a step of penetrating the etching stop layer on the first main surface side of the first support substrate The step of engraving a recess having a sharp bottom with a depth reaching the middle of the thickness of the first supporting substrate, and the etching stopper layer and the first exposure layer exposed as an inner wall surface of the recess. A step of forming an insulating layer on the etching stopper layer including a supporting substrate; and an emitter material having a convex portion with a pointed tip, by depositing an emitter material on the surface of the insulating layer while filling the concave portion. Forming a layer, and etching the first support substrate from the second main surface side of the substrate to the etching stop layer to remove the tip of the insulating layer covering the convex portion of the emitter material layer. Exposed from the surface of the etching stop layer And a step of performing etching from a portion exposed from the etching stop layer to selectively remove the insulating layer by etching, and to remove the tip end of the convex portion of the emitter material layer covered with the insulating layer. Forming an emitter to expose and forming a gate layer by leaving the etching stop layer so as to face the tip of the emitter with a gap. Emission type cold cathode manufacturing method.