JPH07106384A - Bonding pad - Google Patents

Bonding pad

Info

Publication number
JPH07106384A
JPH07106384A JP27753693A JP27753693A JPH07106384A JP H07106384 A JPH07106384 A JP H07106384A JP 27753693 A JP27753693 A JP 27753693A JP 27753693 A JP27753693 A JP 27753693A JP H07106384 A JPH07106384 A JP H07106384A
Authority
JP
Japan
Prior art keywords
bonding pad
pad
substrate
insulating layer
raised
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP27753693A
Other languages
Japanese (ja)
Inventor
Ryuichiro Oshige
隆一郎 大重
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP27753693A priority Critical patent/JPH07106384A/en
Publication of JPH07106384A publication Critical patent/JPH07106384A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/0212Auxiliary members for bonding areas, e.g. spacers
    • H01L2224/02122Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
    • H01L2224/02163Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
    • H01L2224/02165Reinforcing structures
    • H01L2224/02166Collar structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0555Shape
    • H01L2224/05552Shape in top view
    • H01L2224/05554Shape in top view being square

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Wire Bonding (AREA)

Abstract

PURPOSE:To improve a bonding pad so as to prevent the probe deviation of a probe from being generated when the test of the electrical characteristics of a semiconductor device is made using a prober. CONSTITUTION:A bonding pad 10 is constituted of a flat center region part 22 and a peripheral part 20 made to rise in such a way as to encircle the region part 22. When the peripheral part is made to rise, protuberances 24 are provided on regions, where are positioned under the lower part of the peripheral part of the pad 10, on a substrate 12, then, an insulating layer 14 is formed on the substrate 12 including the upper parts of the protuberances 24 and moreover, the pad 10 is formed. After that, a protective layer 18 is formed in such a way that the center region part of the pad and the inner edge part of the peripheral part of the pad are exposed.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、半導体装置のボンディ
ングパッドに関し、更に詳細には、ペレットチュックを
行うときプローブ針の針ずれが生じ難いように工夫され
たボンディングパッドに関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bonding pad for a semiconductor device, and more particularly to a bonding pad devised so that needle misalignment of a probe needle does not easily occur during pellet chucking.

【0002】[0002]

【従来の技術】従来のボンディングパッド50は、図5
に示すように、基板12上の絶縁層14上に平坦に形成
されていて、ボンディングパッド50の周辺部16には
保護層18の周縁部19がオーバーコートしている。
2. Description of the Related Art A conventional bonding pad 50 is shown in FIG.
As shown in FIG. 3, the insulating layer 14 is formed flat on the substrate 12, and the peripheral portion 16 of the bonding pad 50 is overcoated with the peripheral edge portion 19 of the protective layer 18.

【0003】[0003]

【発明が解決しようとする課題】このような平坦なボン
ディングパッドを備える半導体装置をプローバにより検
査しようとすると、図6に示すように、プローブ針Aが
ボンディングパッド50上で針ずれして保護層のオーバ
ーコート部19に衝突し、そこにクラック(図6でB)
を発生させる事故が、しばしば生じていた。ところで、
プローバとは、半導体ウエーハ上に形成されたIC、L
SI等の電子回路ダイの電気的特性を効率良く試験する
ために、各ダイの電極にプローブ針を自動的に接触させ
て、プローブ針に接続した外部のテスタによる各ダイの
電気的特性試験を可能とすると共に、テスタが不良と判
断したダイを識別するできる装置である。
When a semiconductor device having such a flat bonding pad is to be inspected by a prober, the probe needle A is misaligned on the bonding pad 50 as shown in FIG. It collided with the overcoat part 19 and cracked there (B in Fig. 6)
Accidents that caused by the way,
A prober is an IC or L formed on a semiconductor wafer.
In order to efficiently test the electrical characteristics of electronic circuit die such as SI, the probe needle is automatically brought into contact with the electrode of each die, and the electrical characteristic test of each die is performed by an external tester connected to the probe needle. This is a device that enables the die that can be judged by the tester to be defective.

【0004】このような問題に鑑み、本発明の目的は、
プローバによる半導体装置の電気的特性試験に際し、プ
ローブ針の針ずれが生じないように改良されたボンディ
ングパッドを提供することである。
In view of these problems, the object of the present invention is to
It is an object of the present invention to provide an improved bonding pad that does not cause needle misalignment of a probe needle when an electric characteristic test of a semiconductor device is performed by a prober.

【0005】[0005]

【課題を解決するための手段】本発明者は、プローブ針
がボンディングパッド上で針ずれを起こす原因を調べた
結果、ボンディングパッドが平坦なために、プローブ針
が滑って、それにより針ずれを起こすことを突き止め、
本発明を完成するに到った。
As a result of investigating the cause of the needle displacement of the probe needle on the bonding pad, the present inventor found that the probe needle slips due to the flatness of the bonding pad, which causes the needle displacement. Find out what's going to happen,
The present invention has been completed.

【0006】上記目的を達成するために、上の知見に基
づき、本発明に係るボンディングパッドは、基板上に絶
縁層を形成し、その絶縁層上に形成してなるボンディン
グパッドにおいて、ボンディングパッドの周辺部の下方
に位置する前記基板領域に隆起部を設け、次いで前記絶
縁層及び前記ボンディングパッドを形成して、ボンディ
ングパッドが、平坦な中央領域部と、中央領域部を取り
囲むように隆起した周辺部とから構成されていることを
特徴としている。
To achieve the above object, based on the above findings, the bonding pad according to the present invention has an insulating layer formed on a substrate, and the bonding pad formed on the insulating layer is Protrusions are formed in the substrate region located below the peripheral portion, and then the insulating layer and the bonding pad are formed, and the bonding pad is raised so as to surround the flat central region and the central region. It is characterized in that it is composed of parts.

【0007】ボンディングパッドの周辺部と中央領域部
との高さの差は、特に限定はなく、プローブ針の滑りを
止めることが出来る程度の差であれば十分であるが、望
ましくは00〜00である。基板領域に設ける隆起部の
材料は、特に限定は無いが、形成が容易であると言う理
由からポリシリコン(多結晶シリコン)が望ましい。隆
起部の高さは、ボンディングパッドの中央領域部と周辺
部の高さの差に応じて決めるべき寸法である。また、隆
起部の形成方法も特に限定はなく、通常の気相成長方法
或いはスパッタリングにより成膜し、パターニングによ
り隆起部を形成する。また、隆起部は、必ずしも連続的
である必要はなく、中央領域部を取り囲むようにボンデ
ィングパッドの周辺部を隆起させることができる限り、
不連続であってもよい。
The difference in height between the peripheral portion and the central region of the bonding pad is not particularly limited, and it is sufficient if the difference is such that the sliding of the probe needle can be stopped, but it is preferably 00-00. Is. The material of the raised portion provided in the substrate region is not particularly limited, but polysilicon (polycrystalline silicon) is desirable because it is easy to form. The height of the raised portion is a dimension to be determined according to the difference in height between the central region portion and the peripheral portion of the bonding pad. Further, the method of forming the raised portion is not particularly limited, and a film is formed by a normal vapor phase growth method or sputtering, and the raised portion is formed by patterning. In addition, the raised portion does not necessarily have to be continuous, and as long as the peripheral portion of the bonding pad can be raised so as to surround the central region portion,
It may be discontinuous.

【0008】[0008]

【作用】本発明では、ボンディングパッドの周辺部が、
中央領域部を取り囲むように隆起していて、プローブ針
の滑りに対して障壁の機能を果たしている。よって、プ
ローブ針が滑っても周辺部の根元で停止し、それ以上滑
って保護層のオーバーコート部に衝突してクラックを発
生させるようなことは生じない。
In the present invention, the peripheral portion of the bonding pad is
It is raised so as to surround the central region and functions as a barrier against sliding of the probe needle. Therefore, even if the probe needle slides, it does not stop at the root of the peripheral portion and further slide to collide with the overcoat portion of the protective layer to generate a crack.

【0009】[0009]

【実施例】以下、添付図面を参照し、実施例に基づいて
本発明をより詳細に説明する。図1は本発明に係るボン
ディングパッドの一実施例の平面図、図2は図1のX−
X線でのボンディングパッドの断面図、図3は図2の矢
視Y−Yでの断面平面図であって、基板上に隆起させた
隆起部の平面形状を示し、及び図4は図1のボンディン
グパッドとプローブ針との関係を示す断面図である。本
実施例のボンディングパッド10は、図1及び図2に示
すように、平坦な中央領域部22と、中央領域部22を
取り囲むように隆起した周辺部20とから構成されてい
る。中央領域部22と周辺部20との高さの差は、本実
施例では00である。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will now be described in more detail based on embodiments with reference to the accompanying drawings. FIG. 1 is a plan view of an embodiment of the bonding pad according to the present invention, and FIG.
FIG. 3 is a cross-sectional view of the bonding pad taken along the X-ray, FIG. 3 is a cross-sectional plan view taken along the line Y-Y of FIG. FIG. 4 is a cross-sectional view showing the relationship between the bonding pad and the probe needle of FIG. As shown in FIGS. 1 and 2, the bonding pad 10 of the present embodiment is composed of a flat central region portion 22 and a peripheral portion 20 which is raised so as to surround the central region portion 22. The height difference between the central area portion 22 and the peripheral portion 20 is 00 in this embodiment.

【0010】ボンディングパッド10においては、以下
に述べる方法により、中央領域部22を取り囲むように
周辺部20を隆起させている。まず、基板12上にポリ
シリコン(多結晶シリコン)を使用して隆起部24を常
用の方法により形成する。例えば、減圧CVD装置を用
い、シラン(SiH4)ガスを熱分解することにより、
ポリシリコン層を基板上に堆積させ、通常のパターニン
グにより図3に示すように枠型に隆起させる。隆起部2
4の寸法は、その外形がボンディングパッド10の周辺
部20の隆起している部分の輪郭とほぼ同じであり、そ
の幅Wが周辺部20の隆起している部分の幅とほぼ同じ
であり、その高さは、本実施例では、00である。次い
で、従来の方法によって、隆起部24上を含め、基板1
2上に絶縁層14を成膜し、更にボンディングパッド1
0を形成する。その後、ボンディングパッド10の中央
領域部22と周辺部20の内縁部とが露出するように、
保護層18を形成する。以上の工程により、図1及び図
2に示すボンディングパッド10を得ることができる。
In the bonding pad 10, the peripheral portion 20 is raised so as to surround the central region 22 by the method described below. First, the raised portion 24 is formed on the substrate 12 using polysilicon (polycrystalline silicon) by a conventional method. For example, by using a low pressure CVD apparatus to thermally decompose silane (SiH 4 ) gas,
A layer of polysilicon is deposited on the substrate and raised in a frame shape by conventional patterning as shown in FIG. Ridge 2
4, the outer shape of the bonding pad 10 is substantially the same as the contour of the raised portion of the peripheral portion 20 and the width W thereof is substantially the same as the width of the raised portion of the peripheral portion 20, The height is 00 in this embodiment. The substrate 1 is then included, including over the ridges 24, by conventional methods.
The insulating layer 14 is formed on the bonding layer 2 and the bonding pad 1 is further formed.
Form 0. After that, the central region portion 22 of the bonding pad 10 and the inner edge portion of the peripheral portion 20 are exposed.
The protective layer 18 is formed. Through the above steps, the bonding pad 10 shown in FIGS. 1 and 2 can be obtained.

【0011】以上の構成を備えたボンディングパッド1
0にプローブ針Bにて触診すると、図4に示すように、
仮にプローブ針Aが滑って針ずれしても、周辺部20の
根元26で停止する。従って、それを越えて保護層16
のオーバーコート部18に衝突してそこにクラックを発
生させるようなことはない。
Bonding pad 1 having the above structure
When the probe needle B is palpated at 0, as shown in FIG.
Even if the probe needle A slips and is displaced, it stops at the root 26 of the peripheral portion 20. Therefore, beyond that, the protective layer 16
It does not collide with the overcoat portion 18 and cause a crack there.

【0012】[0012]

【発明の効果】本発明によれば、基板上に絶縁層を形成
し、その絶縁層上に形成してなるボンディングパッドに
おいて、平坦な中央領域部と中央領域部を取り囲むよう
に隆起した周辺部とからボンディングパッドを構成する
ことにより、周辺部が障壁の機能を果たし、プローバに
よる電気的特性試験に際し、プローブ針が仮に滑って針
ずれしても周辺部の根元で停止する。従って、プローブ
針による触診において、プローブ針が滑って、保護層の
オーバーコート部に衝突してクラックを発生させるよう
なことが無くなる。よって、本発明に係るボンディング
パッドを使用することにより、プローバによる電気的特
性試験での製品損傷が減り、製品の歩留りが向上する。
According to the present invention, an insulating layer is formed on a substrate, and a bonding pad formed on the insulating layer has a flat central region and a peripheral portion which is raised to surround the central region. By configuring the bonding pad from the above, the peripheral portion functions as a barrier, and at the time of the electrical characteristic test by the prober, even if the probe needle slips and slips, it stops at the base of the peripheral portion. Therefore, in the palpation with the probe needle, the probe needle does not slip and collide with the overcoat portion of the protective layer to cause a crack. Therefore, by using the bonding pad according to the present invention, the product damage in the electrical characteristic test by the prober is reduced, and the product yield is improved.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明に係るボンディングパッドの一実施例の
平面図である。
FIG. 1 is a plan view of an embodiment of a bonding pad according to the present invention.

【図2】図1のボンディングパッドのX−X線の断面図
である。
2 is a cross-sectional view of the bonding pad of FIG. 1 taken along line XX.

【図3】基板上に隆起させた隆起部の図2の矢視Y−Y
での平面図である。
FIG. 3 is a view of a raised portion raised on a substrate, taken along the arrow YY of FIG.
FIG.

【図4】図1のボンディングパッドとプローブ針との関
係を示す断面図である。
FIG. 4 is a cross-sectional view showing the relationship between the bonding pad and the probe needle of FIG.

【図5】従来のボンディングパッドの断面図である。FIG. 5 is a cross-sectional view of a conventional bonding pad.

【図6】図5に示すボンディングパッドにおいて、保護
層のオーバーコート部にクラックが発生した状態を示す
説明用斜視図である。
FIG. 6 is an explanatory perspective view showing a state in which cracks are generated in the overcoat portion of the protective layer in the bonding pad shown in FIG.

【符号の説明】[Explanation of symbols]

10 本発明に係るボンディングパッドの一実施例 12 基板 14 絶縁層 16 平坦なボンディングパッドの周辺部 18 保護層 19 保護層のオーバーコート部 20 ボンディングパッドの隆起した周辺部 22 ボンディングパッドの中央領域部 24 隆起部 26 周辺部の根元 10 One Example of Bonding Pad According to the Present Invention 12 Substrate 14 Insulating Layer 16 Peripheral Part of Flat Bonding Pad 18 Protective Layer 19 Overcoat Part of Protective Layer 20 Raised Peripheral Part of Bonding Pad 22 Central Region of Bonding Pad 24 Raised part 26 Root of the peripheral part

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 基板上に絶縁層を形成し、その絶縁層上
に形成してなるボンディングパッドにおいて、 ボンディングパッドの周辺部の下方に位置する前記基板
領域に隆起部を設け、次いで前記絶縁層及び前記ボンデ
ィングパッドを形成して、ボンディングパッドが、平坦
な中央領域部と、中央領域部を取り囲むように隆起した
周辺部とから構成されていることを特徴とするボンディ
ングパッド。
1. A bonding pad formed by forming an insulating layer on a substrate and forming the insulating layer on the insulating layer, wherein a ridge is provided in the substrate region located below a peripheral portion of the bonding pad, and then the insulating layer is formed. And a bonding pad formed by forming the bonding pad, the bonding pad including a flat central region portion and a peripheral portion protruding so as to surround the central region portion.
JP27753693A 1993-10-08 1993-10-08 Bonding pad Pending JPH07106384A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP27753693A JPH07106384A (en) 1993-10-08 1993-10-08 Bonding pad

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP27753693A JPH07106384A (en) 1993-10-08 1993-10-08 Bonding pad

Publications (1)

Publication Number Publication Date
JPH07106384A true JPH07106384A (en) 1995-04-21

Family

ID=17584928

Family Applications (1)

Application Number Title Priority Date Filing Date
JP27753693A Pending JPH07106384A (en) 1993-10-08 1993-10-08 Bonding pad

Country Status (1)

Country Link
JP (1) JPH07106384A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0907207A2 (en) * 1997-08-27 1999-04-07 Nec Corporation Semiconductor device having alternating long and short contact pads with a fine pitch

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0907207A2 (en) * 1997-08-27 1999-04-07 Nec Corporation Semiconductor device having alternating long and short contact pads with a fine pitch
EP0907207A3 (en) * 1997-08-27 1999-05-06 Nec Corporation Semiconductor device having alternating long and short contact pads with a fine pitch
US6008542A (en) * 1997-08-27 1999-12-28 Nec Corporation Semiconductor device having long pads and short pads alternated for fine pitch without sacrifice of probing
KR100304679B1 (en) * 1997-08-27 2001-11-02 가네꼬 히사시 Semiconductor device having long pads and short pads alternated for fine pitch without sacrifice of probing

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