JPH07106368A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH07106368A JPH07106368A JP24766093A JP24766093A JPH07106368A JP H07106368 A JPH07106368 A JP H07106368A JP 24766093 A JP24766093 A JP 24766093A JP 24766093 A JP24766093 A JP 24766093A JP H07106368 A JPH07106368 A JP H07106368A
- Authority
- JP
- Japan
- Prior art keywords
- region
- bonding pad
- bonding
- lead terminals
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は半導体装置に関し、特に
一方向にリード端子を有し外部装置との高速動作を行う
半導体装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a semiconductor device having lead terminals in one direction and operating at high speed with an external device.
【０００２】[0002]
【従来の技術】図３に示すように、従来の一方向に端子
を有する半導体装置の半導体ペレット１は、素子領域２
と素子領域２を囲むようにボンディングパッドが形成さ
れたボンディングパッド領域３を有し、パッケージから
導出されるリード端子５に近い側のボンディングパッド
領域３にリード端子に近い辺に並ぶボンディングパッド
８を並べリード端子５とボンディングワイヤ６で接続し
ている。特にボンディングパッドの数が多くパッケージ
から導出されるリード端子５に近い側のボンディングパ
ッド領域３にリード端子に近い辺に並ぶボンディングパ
ッド８が並びきれない場合やパッケージから導出される
リード端子５が半導体ペレット１の一辺に並べることが
できない場合に、パッケージから導出されるリード端子
５に近い側のボンディングパッド領域３に隣接するボン
ディングパッド領域３に隣接する辺に並ぶボンディング
パッド７の様に並べ、隣接する辺に並ぶボンディングパ
ッド７に近くなるように長く伸ばしたリード端子９をボ
ンディングワイヤ６で接続していた。2. Description of the Related Art As shown in FIG. 3, a semiconductor pellet 1 of a conventional semiconductor device having terminals in one direction has an element region 2
And a bonding pad region 3 in which a bonding pad is formed so as to surround the element region 2, and the bonding pad region 3 on the side closer to the lead terminal 5 led out from the package has the bonding pads 8 arranged on the side closer to the lead terminal. The arrayed lead terminals 5 and the bonding wires 6 are connected. In particular, when the number of bonding pads is large and the bonding pads 8 arranged on the side close to the lead terminals cannot be arranged in the bonding pad region 3 near the lead terminals 5 derived from the package, or the lead terminals 5 derived from the package are semiconductors. When the pellets 1 cannot be arranged on one side, they are arranged like the bonding pads 7 arranged on the side adjacent to the bonding pad region 3 adjacent to the bonding pad region 3 on the side close to the lead terminal 5 derived from the package, and are arranged adjacent to each other. The lead terminals 9 extended so as to be close to the bonding pads 7 lined up on the side to be connected were connected by the bonding wires 6.
【０００３】[0003]
【発明が解決しようとする課題】従来の半導体装置で
は、パッケージから導出されるリード端子を長く伸ばす
ことで半導体ペレット上のポンディングパッドとリード
端子をボンディングワイヤで接続しているため、リード
端子の長さがそれぞれ異なっていた。つまりリード端子
が長いものは端子容量値が大きくなり、リード端子が短
いものは端子容量値が小さくなる。このため、リード端
子ごとに外部装置との動作速度が変わってしまうため、
外部装置との高速動作を行う場合の障害になるという問
題点があった。また、パッケージのリード端子の長さを
統一すると半導体ペレットの一辺に全てのボンディング
パッドを並べることになるため半導体ペレットの面積が
大きくなるという欠点があった。In the conventional semiconductor device, the lead terminal led out from the package is extended by a long wire to connect the bonding pad to the bonding pad on the semiconductor pellet. The lengths were different. That is, a terminal having a long lead terminal has a large terminal capacitance value, and a terminal having a short lead terminal has a small terminal capacitance value. For this reason, the operating speed with the external device changes for each lead terminal,
There is a problem that it becomes an obstacle when performing high-speed operation with an external device. Further, if the lead terminals of the package are made uniform in length, all the bonding pads are arranged on one side of the semiconductor pellet, so that the area of the semiconductor pellet becomes large.
【０００４】本発明の目的は、半導体ペレットの面積を
増加させることなく外部装置との高速動作が可能な半導
体装置を提供することにある。An object of the present invention is to provide a semiconductor device which can operate at high speed with an external device without increasing the area of the semiconductor pellet.
【０００５】[0005]
【課題を解決するための手段】本発明の半導体装置は、
素子領域とこの素子領域の一辺に形成された少くともこ
の一辺と同じ長さのボンディングパッド領域とこのボン
ディングパッド領域内に配置され前記素子領域内の素子
と配線を介して接続するボンディングパッドとを備えた
半導体ペレットと、前記ボンディングパッドにボンディ
ングワイヤを介して接続する同一形状のリード端子とを
有する。The semiconductor device of the present invention comprises:
An element region, a bonding pad region formed on one side of the element region and having at least the same length as the one side, and a bonding pad arranged in the bonding pad region and connected to an element in the element region via a wiring. The semiconductor pellet is provided, and the lead terminal of the same shape is connected to the bonding pad via a bonding wire.
【０００６】[0006]
【実施例】次に、本発明の実施例について図面を参照し
て説明する。Embodiments of the present invention will now be described with reference to the drawings.
【０００７】図１は本発明の第１の実施例の要部平面図
である。本発明の第１の実施例は、図１に示すように、
半導体ペレット１は、素子と配線等が形成された素子領
域２と、この素子領域２が中心の位置で凸字形を形成す
るようにして素子領域２内の素子と配線を介して接続す
るボンディングパッド４の全てが配置できる長さのボン
ディングパッド領域３とによっで構成される。FIG. 1 is a plan view of the essential portions of the first embodiment of the present invention. The first embodiment of the present invention, as shown in FIG.
The semiconductor pellet 1 is an element region 2 in which elements and wirings are formed, and a bonding pad for connecting elements in the element region 2 via wiring so that a convex shape is formed at the center of the element region 2. 4 of the bonding pad region 3 having a length in which all 4 can be arranged.
【０００８】半導体ペレット１をこのような構成にする
ことにより、図３に示す長く伸ばしたリード端子９を排
除できるので、ボンディングパッド４をボンディングワ
イヤ６を介して同一形状，同一容量値のリード端子５に
接続することが可能となる。With the semiconductor pellet 1 having such a structure, the elongated lead terminal 9 shown in FIG. 3 can be eliminated, so that the bonding pad 4 is connected via the bonding wire 6 with the same shape and the same capacitance value. 5 can be connected.
【０００９】図２は本発明の第２の実施例の要部平面図
である。本発明の第２の実施例は、図２に示すように、
半導体ペレット１は、素子と配線等が形成された素子領
域２と、この素子領域２のリード端子が導出される側の
一辺に素子領域２が一方の側に片寄った位置でＬ字形を
形成するようにして素子領域２内の素子と配線を介して
接続するボンディングパッド４の全てが配置できる長さ
のボンディングパッド領域３とによって構成される。FIG. 2 is a plan view of the essential portions of the second embodiment of the present invention. The second embodiment of the present invention, as shown in FIG.
The semiconductor pellet 1 forms an element region 2 in which elements and wirings are formed, and an L-shape at one side of the element region 2 where the lead terminals are led out, with the element region 2 being offset to one side. In this way, the bonding pad region 3 having a length such that all the bonding pads 4 connected to the device in the device region 2 via the wiring can be arranged.
【００１０】この第２の実施例の構成においても、第１
の実施例と同様、ボンディングパッド４をボンディング
ワイヤ６を介して同一形状，同一容量値のリード端子５
に接続することが可能となる。Also in the configuration of the second embodiment, the first
In the same manner as in the above embodiment, the bonding pad 4 is connected via the bonding wire 6 to the lead terminal 5 having the same shape and the same capacitance value.
It is possible to connect to.
【００１１】[0011]
【発明の効果】以上説明したように本発明は、半導体ペ
レットを素子領域と、この素子領域の一辺に少くともこ
の一辺と同じ長さのボンディングパッド領域とで構成
し、このボンディングパッド領域内に全てのボンディン
グパッドを配置しこのボンディングパッドにリード端子
を接続することにより、全てのリード端子を同一形状，
同一容量にすることができるので、小形で外部装置との
高速動作が可能な半導体装置を提供できるという効果が
ある。As described above, according to the present invention, the semiconductor pellet is composed of the element region and the bonding pad region on one side of the element region and having at least the same length as the one side. By arranging all the bonding pads and connecting the lead terminals to this bonding pad, all the lead terminals have the same shape,
Since the capacities can be the same, it is possible to provide a small-sized semiconductor device that can operate at high speed with an external device.
【図１】本発明の第１の実施例の要部平面図である。FIG. 1 is a plan view of an essential part of a first embodiment of the present invention.
【図２】本発明の第２の実施例の要部平面図である。FIG. 2 is a plan view of an essential part of a second embodiment of the present invention.
【図３】従来の樹脂封止型半導体装置の一例の要部平面
図である。FIG. 3 is a main part plan view of an example of a conventional resin-sealed semiconductor device.
１ 半導体ペレット ２ 素子領域 ３ ボンディングパッド領域 ４ ボンディングパッド ５ リード端子 ６ ボンディングワイヤ ７ 隣接する辺に並ぶボンディングパッド ８ リード端子に近い辺に並ぶボンディングパッド ９ 長く伸ばしたリード端子 1 Semiconductor Pellet 2 Element Area 3 Bonding Pad Area 4 Bonding Pad 5 Lead Terminal 6 Bonding Wire 7 Bonding Pads Arranged on Adjacent Sides 8 Bonding Pads Arranged on Side Nearer Lead Terminals 9 Long Lead Terminals
Claims (1)
れた少くともこの一辺と同じ長さのボンディングパッド
領域とこのボンディングパッド領域内に配置され前記素
子領域内の素子と配線を介して接続するボンディングパ
ッドとを備えた半導体ペレットと、前記ボンディングパ
ッドにボンディングワイヤを介して接続する同一形状の
リード端子とを有することを特徴とする半導体装置。1. An element region, a bonding pad region formed on one side of the element region and having at least the same length as the one side, and a device arranged in the bonding pad region and connected to an element in the element region via a wiring. A semiconductor device comprising: a semiconductor pellet having a bonding pad for connecting to the bonding pad; and a lead terminal of the same shape connected to the bonding pad via a bonding wire.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP24766093A JPH07106368A (en) | 1993-10-04 | 1993-10-04 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP24766093A JPH07106368A (en) | 1993-10-04 | 1993-10-04 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH07106368A true JPH07106368A (en) | 1995-04-21 |
Family
ID=17166781
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP24766093A Withdrawn JPH07106368A (en) | 1993-10-04 | 1993-10-04 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH07106368A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2016162960A (en) * | 2015-03-04 | 2016-09-05 | エスアイアイ・セミコンダクタ株式会社 | Semiconductor element and semiconductor device |
-
1993
- 1993-10-04 JP JP24766093A patent/JPH07106368A/en not_active Withdrawn
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2016162960A (en) * | 2015-03-04 | 2016-09-05 | エスアイアイ・セミコンダクタ株式会社 | Semiconductor element and semiconductor device |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A300 | Withdrawal of application because of no request for examination |
Free format text: JAPANESE INTERMEDIATE CODE: A300 Effective date: 20001226 |