JPH07105464B2 - Semiconductor device for mounting semiconductor elements - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device for mounting a semiconductor element such as an integrated circuit device, which can efficiently dissipate heat generated by the mounted semiconductor element and
The present invention provides an excellent semiconductor device mounting semiconductor device which also has a property that the thermal expansion coefficient of the heat-radiating substrate and the enclosure material of Al ₂ O _{3 that} are joined are similar to each other.

[0002]

2. Description of the Related Art As a substrate material for mounting a semiconductor element,
It has been emphasized that Kovar (29% Ni-17% C
N such as o-Fe) and 42 alloy (42% Ni-Fe)
Ceramic materials such as i alloy, alumina and forsterite are used, and various Cu alloys have been used especially when high heat dissipation is required.

However, the remarkable development of semiconductor technology in recent years has driven the increase in the size of semiconductor elements and the amount of heat generation, and there is a need for substrate materials that satisfy both the characteristics of thermal expansion coefficient and heat dissipation. It is increasing.

Under these conditions, materials satisfying both of the above characteristics are tungsten (W) and molybdenum (M).
o) and beryllia (BeO) have been provided.

[0005]

However, the latter is practically unusable due to pollution problems, and the former has a coefficient of thermal expansion that is well matched to that of semiconductor devices, but is often used as an envelope material. Has a large difference from the thermal expansion coefficient of GaAs, and has a large difference in the coefficient of thermal expansion from GaAs, which is being used in increasing amounts as a semiconductor device recently. There are problems such as inferiority and large restrictions on package design.

Further, when Al ₂ O ₃ is used as the envelope material, the envelope material is usually larger than the semiconductor element like a pin grid array type package, and the heat of the substrate material is increased. The expansion coefficient needs to be as close as possible to Al ₂ O ₃ which is the envelope material rather than the semiconductor element. That is, even if the difference in thermal expansion between the Al ₂ O _{3 of the} envelope material and the substrate is relatively small, the substrate is elastically deformed due to thermal stress and warpage occurs. On the other hand, if the difference is considerably large, the bonding interface or the substrate may be damaged. This is because there is an obstacle that cracks occur. When warping occurs, the semiconductor element cannot be mounted, and when cracking occurs, the airtightness is impaired, and the joint strength at the interface cannot be guaranteed, resulting in a problem of reduced yield. Therefore, there has been a demand for a substrate material that can flexibly respond to the shape and size of Al ₂ O ₃ of the envelope material.

Further, what is desired of the substrate material for maintaining the airtightness is that it is necessary to match the coefficient of thermal expansion with each of the above-mentioned mounting members. is there.

As described above, there is a demand for a semiconductor heat dissipating substrate material that can meet the problems that are indispensable for IC packages that are being highly integrated.

[0009]

DISCLOSURE OF THE INVENTION The inventors of the present invention have eliminated the above-mentioned drawbacks of conventional semiconductor device mounting substrate materials and adapted the coefficient of thermal expansion mainly to the Al ₂ O ₃ envelope material and its form. At the same time, as a result of study to obtain a substrate material having good thermal conductivity and minimizing the amount of holes, the present invention has been achieved.

That is, in the semiconductor device mounting semiconductor device of the present invention, the coefficient of thermal expansion of the substrate is mainly close to that of Al ₂ O ₃ of the package envelope material, and is close to that of the mounted semiconductor device. It has excellent thermal conductivity and contains 10 to 20% by weight of copper in the pores of a porous sintered body of tungsten or molybdenum by an infiltration method, and has a thermal expansion coefficient of Al ₂ O. No. ₃ enclosure material, the Al ₂ O ₃ enclosure material is bonded to a heat dissipation substrate matched with that of the enclosure material.

[0011]

In such a device, when electrical insulation is required, a thin layer coating made of ceramic or organic insulator is applied to the surface of the substrate, so that the device can be used also in the conventional use of ceramics. It is also possible.

The heat dissipation substrate used in the semiconductor device of the present invention is manufactured by the following method.

First, a metal powder of W or Mo is press-molded and sintered in a non-oxidizing atmosphere to obtain a porous sintered body,
Next, the molten Cu is permeated into the porous sintered body to fill the gaps in the skeleton of the sintered body to obtain the substrate material for a semiconductor device according to the present invention.

In the present invention, Cu is infiltrated into the porous sintered body of W or Mo because, if there are pores in the sintered body, the pores remain as they are and the plating adhesion after processing is impaired. This is because, in addition to this, defects are generated at the bonding interface between the semiconductor element mounted on the substrate and the material of the envelope, so that the hermeticity of the package cannot be maintained.

Further, the Cu content of 10 to 20 wt% makes the coefficient of thermal expansion mainly approximate to the coefficient of thermal expansion of Al ₂ O ₃ of the envelope material, and can be used for other members such as semiconductor elements. This is because by making them as close as possible, the effect of stress due to the mismatch of thermal expansion with these members is minimized and the thermal conductivity of the sintered body is improved. Accordingly, the Cu content may be appropriately controlled.

This point will be described in more detail.

Generally, the heat dissipation board is another component (Fe-Ni-C).
Metal fittings such as o alloys, insulating substrates such as metalized alumina, etc.) and brazing (usually using Ag—Cu eutectic brazing material or the like at 800 to 900 ° C.) or soldering (200 to
In many cases, it is bonded by a method such as bonding at 450 ° C.). In this case, Cu-W and Cu-Mo materials have W or M on the surface.
Because of the presence of o, the wettability with the brazing material and the solder material is poor, and it is usually joined after nickel plating is performed and gold plating is performed with nickel as a base for the purpose of ensuring corrosion resistance after joining. At this time, when the holes are exposed on the surface of the substrate due to the presence of residual holes in the substrate material, the plating solution permeates from there and discoloration occurs in the subsequent heat treatment step, and the swelling and peeling of the plating layer, and stains. Discoloration due to liquid
Causes corrosion. Further, when these substrates are used as a member of a package that is housed in a semiconductor, the substrate itself is required to have airtightness in order to maintain the airtightness of the package, and it becomes difficult to maintain the airtightness if there are holes in the substrate. In particular, Al ₂ which is an envelope material occupying the main part of the package
It is important at the joint interface with O ₃ .

In order to obtain the substrate according to the present invention which meets the above-mentioned objects, a dense and strong skeleton of W or Mo (a porous sintered body) is used as a raw material and an embossing condition according to a desired porosity. In addition, it is necessary to form Cu by controlling the sintering conditions and to fill the voids with Cu without any gaps. From this point of view, the Cu infiltration method is preferable among the powder metallurgy. In the infiltration method of immersing in Cu molten metal,
It is difficult to produce an alloy having homogeneous properties due to the difference in melting points of Cu, W and Mo and the difference in specific gravity, while Cu powder,
Even with the usual powder metallurgy method that is made by mixing W or Mo powder,
Segregation of the components due to the difference in specific gravity between the components and residual gaps (voids) between the powder particles are unavoidable, and it is difficult to secure the desired properties. In addition, according to these methods, not only the non-uniformity and the existence of pores greatly impair the above-mentioned airtightness, but also the thermal conductivity and the coefficient of thermal expansion vary greatly within a single product and between multiple products. As well as their characteristics C
It is also difficult to precisely control the amount of u.

In the present invention, the sinterability of W and Mo is promoted by adding 20 % by weight or less of the iron group element in order to form a stronger skeleton of W and Mo.

As described above, in the semiconductor device of the present invention, the coefficient of thermal expansion can be precisely controlled according to the Al ₂ O ₃ envelope material, the thermal conductivity is good, and the residual holes are extremely suppressed. Because of this, and because there is little variation, it is possible to deal with the ever-increasing high-density and large-scale semiconductor device applications with high reliability by using this substrate. Moreover, in addition to the Si element, it can be practically used. For mounting GaAs devices, which are becoming more and more advanced, it is possible to combine with mounting members other than Al ₂ O ₃ that can be approximated within the range of the thermal expansion coefficient of the present device.

[0021]

EXAMPLES The present invention will be described in detail below with reference to examples.

Example 1 Tungsten and a mixed powder of tungsten-0.5% nickel were pressed into a size of 100 × 100 × 5 mm, and then sintered at 1000 to 1400 ° C. in a H ₂ gas atmosphere, and 1 An intermediate sintered body having a porosity of ˜50% was obtained.
Copper was infiltrated into this intermediate sintered body at 1200 ° C. under a H ₂ gas atmosphere to produce a Cu—W alloy having a copper content of 1 to 40 wt%.

The thermal expansion coefficient and the thermal conductivity of the thus obtained Cu-W alloy were measured and the results shown in Table 1 were obtained.

Table 1 shows Al ₂ O ₃ , Si and GaAs.
The coefficient of thermal expansion such as is also shown.

[0025]

[Table 1]

In the IC package using the Cu-W alloy sintered body containing 10 to 20% by weight of Cu as the substrate material of the mounting portion of the Si chip in the above table, the enclosure material Al ₂ O in the IC mounting process is used. _Since the difference in thermal expansion from that of No. ₃ is small, no thermal strain occurs, and the mounting temperature of the Si chip is as low as around 400 ° C. and the temperature rise during operation is at most 250.
The temperature was around ℃, and due to its small size, even if there was some difference in thermal expansion, the stress at the joint interface was small and no trouble occurred. As a result, the device has a very good heat dissipation property, so that the device has a long life and is excellent in reliability.
C could be obtained.

Further, in the same manner, Cu 1-5 wt% Cu
When the IC mounting was tried for a small amount of Cu and a Cu content of 25 wt% to 40 wt%, the enclosure material Al ₂ O
_Since the difference in the coefficient of thermal expansion from that of No. ₃ was large, the substrate with a small amount of Cu warped, and the Al ₂ O ₃ envelope material was not attached, and some cracks occurred. Even in the case of a substrate having a large amount of Cu, warpage occurred in the substrate and a gap was formed in the mounting portion of the semiconductor IC chip, resulting in a decrease in reliability.

Example 2 A mixed powder of molybdenum and molybdenum-0.45% nickel was pressed into a size of 100 × 100 × 5 mm, and then sintered at 1000 to 1400 ° C. in a H ₂ gas atmosphere to obtain 1 An intermediate sintered body having a porosity of ˜50% was obtained.

This intermediate sintered body was subjected to 1 in an H ₂ gas atmosphere.
Copper is infiltrated at 200 ° C, and the copper content is 1 to 50% by weight.
The Cu-Mo alloy of was produced.

The coefficient of thermal expansion and the thermal conductivity of the thus obtained Cu-Mo alloy were measured and the results shown in Table 2 were obtained.

[0031]

[Table 2]

In the IC package using the Cu-Mo alloy sintered body containing 10 to 20% by weight of Cu as the substrate material of the mounting portion of the Si chip in the above table, the enclosure material Al ₂ O in the IC mounting process is used. _Since the strain of thermal expansion with ₃ is small, no thermal strain is generated, and since the Si chip is small, the thermal strain is absorbed at the interface with the substrate material, and the device has a heat dissipation property. Since it was extremely good, the life was extended, and an excellent semiconductor device with high reliability could be obtained.

Similarly, Cu of 1 to 5 wt% Cu
When the IC mounting was attempted for a small amount of Cu and a Cu content of 25 wt% to 50 wt%, the enclosure material Al ₂ O ₃
Since the difference in the coefficient of thermal expansion from the above was large, the substrate with a small amount of Cu was warped, the Al ₂ O ₃ envelope material could not be attached, and some cracks occurred. Even in the case of a substrate having a large amount of Cu, warpage occurred in the substrate and a gap was formed in the mounting portion of the semiconductor IC chip, resulting in a decrease in reliability.

Example 3 A W-Cu alloy containing Cu in the range of 2 to 40% by weight was prepared by two methods of mixing, as compared with the infiltration method which is the method of the present invention.

Each cross section of this alloy was confirmed by an optical microscope of 400 times.
No holes were confirmed in both parts, but W
Voids of several μm or less were scattered in both the skeleton portion and the Cu infiltration portion.

The thermal conductivity of the obtained W--Cu alloy was measured and the results shown in Table 3 were obtained.

[0037]

[Table 3]

It can be seen from Table 3 that when the infiltration method A and the mixing method B are compared, there is a difference in the value of the thermal conductivity in the region where the Cu content is the same but the Cu content is particularly high. . That is, it can be seen that the thermal conductivity of the mixing method is smaller than that of the infiltration method when the Cu content is the same. It was also found that the degree of variation in each numerical value was more than double in the mixing method as compared with the infiltration method.

These results are considered to be because in the case of the mixing method, the gaps between the powder particles of the Cu and W powders and the gaps between the individual powder particles remain as voids without disappearing during the molding and sintering process. . In the case of the infiltration method of the present invention, by appropriately controlling the combination of the grain size of the W raw material, the density of the embossed body, and the sintering temperature, there are no residual pores, and the molten Cu penetrates into the skeleton of W ( It is considered that the voids are completely filled with Cu to maintain the skeleton of W due to a kind of capillary phenomenon), and the behavior of thermal conductivity close to the theoretical value (applicable to the compound rule) is exhibited.

Example 4 (1) 90% W- manufactured by both methods A and B of Example 3
The entire surface of a 10% Cu alloy was cut and then nickel-plated (electrolytic Watt bath, film thickness 1 μm). Then, it was heated in hydrogen at 800 ° C. and the swelling generated on the surface was observed. The results are shown in Table 4. The test sample used had a size of 25 mm × 25 mm × 1 mm and 5 pieces.

[0041]

[Table 4]

(2) As an airtightness test, a 25 mm × 10 mm × 2 mm nickel-plated sample manufactured by both the A and B methods was held in 5 atmospheres of helium gas for 4 hours and then taken out into the atmosphere. Was placed in a vacuum container and evacuated, and the amount of helium discharged was measured. The results are shown in Table 5.

In this test, if the surface of the sample has voids and the plating surface has a dent, or if there is a minute recess for trapping the helium gas such as bulging of the plating, it will appear in the discharge amount sensitively. The emission amount is 10 ⁻⁹ atm. c
If it is c / sec or less, it can be used as a substrate for a semiconductor device.

[0044]

[Table 5]

It was confirmed that the substrate obtained by the infiltration method of the present invention did not swell due to plating and was far superior in airtightness to the W-Cu alloy obtained by the mixing method. This is probably because there are almost no holes in the substrate material produced by the infiltration method.

[0046]

As described above, the semiconductor device mounting semiconductor device of the present invention has a coefficient of thermal expansion that is close to that of the substrate and alumina of the envelope material, and has a thermal conductivity and a plating property. Since it is excellent in airtightness, it can sufficiently cope with an increase in the size of a semiconductor element and an increase in heat generation in the semiconductor industry field such as an integrated circuit device.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Akira Otsuka 1-1-1 Kunyokita, Itami City, Hyogo Prefecture Sumitomo Electric Industries, Ltd. Itami Works (56) Reference Japanese Patent Laid-Open No. 50-62776 (JP, A) US Patent 2971251 (US, A)

Claims (3)

[Claims] 1. 10 to 20% by weight of copper is infiltrated into pores of a porous sintered body of tungsten or molybdenum by an infiltration method.
Be contained, the thermal expansion coefficient of the heat radiation substrate is matched to that of the Al ₂ O ₃ envelope material, the Al ₂ O ₃ element mounting semiconductor device is characterized in that bonding the envelope material. 2. The semiconductor device for mounting a semiconductor element according to claim 1, wherein 20% by weight or less of an iron group element is added. 3. The semiconductor device mounting semiconductor device according to claim 1, wherein the semiconductor device is Si or GaAs.