JPH0710024B2 - Substrate for electronic parts - Google Patents
Substrate for electronic partsInfo
- Publication number
- JPH0710024B2 JPH0710024B2 JP2174096A JP17409690A JPH0710024B2 JP H0710024 B2 JPH0710024 B2 JP H0710024B2 JP 2174096 A JP2174096 A JP 2174096A JP 17409690 A JP17409690 A JP 17409690A JP H0710024 B2 JPH0710024 B2 JP H0710024B2
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- break
- view
- electronic component
- grooves
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0097—Processing two or more printed circuits simultaneously, e.g. made from a common substrate, or temporarily stacked circuit boards
Landscapes
- Devices For Post-Treatments, Processing, Supply, Discharge, And Other Processes (AREA)
- Structure Of Printed Boards (AREA)
Description
【発明の詳細な説明】 （イ）産業上の利用分野 この発明は、チップ抵抗器、ジャンパチップ、ハイブリ
ッドIC等の電子部品の製造に適用される電子部品用基板
に関する。The present invention relates to an electronic component substrate applied to the manufacture of electronic components such as chip resistors, jumper chips and hybrid ICs.
（ロ）従来の技術 電子部品、例えばチップ抵抗器を製造するには、第６図
（ａ）に示すようなアルミナセラミック基板11が用いら
れる。この基板11の表面には、分割を容易とするため
に、格子状にブレイク溝12、…、12、13、…、13が形成
されている。各ブレイク溝12、13は、プレス加工により
形成されるスリットＳ、あるいはスリットＳ及びこのス
リットＳより生じるクラックＣにより構成され、その深
さは基板厚さの５〜50％程度とされている。(B) Prior Art In order to manufacture electronic parts such as chip resistors, an alumina ceramic substrate 11 as shown in FIG. 6 (a) is used. Break grooves 12, ..., 12, 13, ..., 13 are formed in a lattice pattern on the surface of the substrate 11 for easy division. Each break groove 12, 13 is formed by a slit S formed by press working, or a slit S and a crack C generated by this slit S, and the depth thereof is about 5 to 50% of the substrate thickness.
この基板11を用いてチップ抵抗器を製造するには、ま
ず、基板11表面の各格子に、電極、抵抗体、ガラス保護
膜を一括して形成する。この基板をブレイク溝12、…、
12に沿って分割して、たんざく状の基板とし、このたん
ざく状基板の側端面に端面電極を形成する。そして、こ
のたんざく状の基板をブレイク溝13、…、13に沿って分
割して最終の形状とする。To manufacture a chip resistor using this substrate 11, first, electrodes, resistors, and a glass protective film are collectively formed on each lattice on the surface of the substrate 11. Break this substrate into break grooves 12, ...
The substrate is divided along 12 to form a grid-shaped substrate, and end face electrodes are formed on the side end surfaces of the grid-shaped substrate. Then, this board-like substrate is divided along the break grooves 13, ..., 13 to obtain the final shape.
（ハ）発明が解決しようとする課題 上記従来の電子部品用基板では、ブレイク溝に沿って分
割する際に、例えば第６図（ｄ）に示すように斜めにク
ラックＣ′が走り、端面形状の不良を生じる問題点があ
った。第７図は、端面形状の不良を生じたチップ抵抗器
18を示しており、11″は分割された基板、17は端面電球
（斜線を付している）、16はガラス保護膜をそれぞれ示
している。このような、いびつな形状のチップ抵抗器18
は外観上問題があるだけではなく、自動実装機による取
り扱いに支障が生じる問題点がある。(C) Problem to be Solved by the Invention In the above-mentioned conventional electronic component substrate, when dividing along the break groove, for example, a crack C ′ runs diagonally as shown in FIG. There was a problem that caused the defect of. FIG. 7 is a chip resistor having a defective end face shape.
Reference numeral 18 denotes a divided substrate, 17 denotes an end light bulb (shaded), and 16 denotes a glass protective film. Such a distorted chip resistor 18
Not only has a problem in appearance, but also has a problem in that handling by an automatic mounting machine is hindered.
この発明は、上記に鑑みなされたものであり、形状不良
を生じさせることなく分割できる電子部品用基板の提供
を目的としている。The present invention has been made in view of the above, and an object thereof is to provide an electronic component substrate that can be divided without causing a defective shape.
（ニ）課題を解決するための手段及び作用 上記課題を解決するため、この発明の電子部品用基板
は、１の方向と他の方向にそれぞれ延伸するブレイク溝
を格子状に形成してなるものにおいて、前記ブレイク溝
は、基板周縁部を除いて形成され、このブレイク溝のう
ち、１の方向と他の方向のそれぞれ両端に位置するブレ
イク溝は、基板端縁まで延伸され、前記１の方向のブレ
イク溝の深さは、その両端のブレイク溝を除いて全て他
の方向のブレイク溝より深く形成することを特徴とする
ものである。(D) Means and Actions for Solving the Problems In order to solve the above problems, the electronic component substrate of the present invention has break grooves extending in one direction and the other direction, respectively, formed in a grid pattern. In the above, the break groove is formed excluding the peripheral portion of the substrate, and the break grooves located at both ends in one direction and the other direction of the break groove are extended to the edge of the substrate, respectively. The break groove is characterized in that it is deeper than the break grooves in the other directions except for the break grooves at both ends thereof.
ブレイク溝（スリット、あるいはスリット及びその延長
のクラック）は基板製造時に条件を制御して作成するた
め、ブレイク時の「折る」「割る」といった制御できな
い因子に比較すると、安定した形状を確保できることが
期待される。Break grooves (slits, or cracks of slits and their extensions) are created by controlling the conditions during board manufacturing, so a stable shape can be secured compared to uncontrollable factors such as "folding" and "cracking" during breaks. Be expected.
１の方向のブレイク溝の深さを他の方向のブレイク溝よ
り深く、例えば基板厚に達するようにしても、基板周縁
部が残されているため、基板はばらばらとはならない。
従って、従来と同様一体の基板として取り扱うことがで
き、電極等の形成を一括して行うことが可能である。ま
た１の方向のブレイク溝の深さを大きくしているので、
その端面の仕上がりが良く、電極形成が容易になせる。Even if the depth of the break groove in the 1 direction is deeper than that of the break groove in the other direction and reaches, for example, the thickness of the substrate, the peripheral portion of the substrate is left and the substrate does not become scattered.
Therefore, it can be handled as an integrated substrate as in the conventional case, and the electrodes and the like can be collectively formed. Moreover, since the depth of the break groove in the direction 1 is increased,
The end face has a good finish and the electrodes can be easily formed.
（ホ）実施例 この発明の一実施例を第１図乃至第５図に基づいて以下
に説明する。(E) Embodiment An embodiment of the present invention will be described below with reference to FIGS. 1 to 5.
第１図（ａ）は、この発明の一実施例に係る基板１の外
観斜視図、第１図（ｂ）、第１図（ｃ）は、それぞれ同
基板１のI b−I b線、I c−I ｃ線における要部拡大
断面図である。この基板１は、チップ抵抗器の製造に適
用されるものであり、アルミナセラミックから構成され
る。1A is an external perspective view of a substrate 1 according to an embodiment of the present invention, and FIGS. 1B and 1C are Ib-Ib lines of the substrate 1, respectively. It is a principal part expanded sectional view in the Ic-Ic line. This substrate 1 is applied to the manufacture of chip resistors and is made of alumina ceramic.
基板１の表面には、枠状の周縁部1a、1a、1b、1bを除い
て、ブレイク溝２′、２、…、２、２′、３′、３、
…、３、３′が格子状に形成される。ブレイク溝２、
２′、３、３′は共にプレス加工により形成されてお
り、それぞれスリットＳ及びこのスリットＳより生じる
クラックＣにより構成される〔第１図（ｂ）（ｃ）参
照〕。ブレイク溝２′、３、３′の深さは従来と同様、
基板厚さの５〜50％程度とされる〔第１図（ｃ）参
照〕。一方、ブレイク溝２の深さは、基板裏面に達する
程度とされる〔第１図（ｂ）参照〕。これは貫通してい
てもよい。基板周縁部1a、1b（特に1a）が残されている
ため、ブレイク溝２により基板１がばらばらになること
はない。なお、条件により、第５図に示すように、基板
周縁部1a、1aのみブレイク溝２、３を形成しない構成と
することもできる。On the surface of the substrate 1, except for the frame-shaped peripheral portions 1a, 1a, 1b, 1b, break grooves 2 ', 2, ..., 2, 2', 3 ', 3,
..., 3 and 3'are formed in a grid pattern. Break groove 2,
2 ', 3 and 3'are both formed by press working, and each of them is composed of a slit S and a crack C generated by the slit S [see FIGS. 1 (b) and (c)]. The depth of the break grooves 2 ', 3, 3'is the same as the conventional one.
It is about 5 to 50% of the substrate thickness [see FIG. 1 (c)]. On the other hand, the depth of the break groove 2 is set so as to reach the back surface of the substrate [see FIG. 1 (b)]. It may be pierced. Since the substrate peripheral portions 1a and 1b (particularly 1a) are left, the break groove 2 does not cause the substrate 1 to fall apart. Depending on the conditions, as shown in FIG. 5, the break grooves 2 and 3 may not be formed only in the substrate peripheral portions 1a and 1a.
次に、実施例基板１を用いたチップ抵抗器の製造を説明
する。第２図（ａ）は、基板１上に電極４、抵抗体５、
保護膜６を形成した状態を示しており、第２図（ｂ）
は、第２図（ａ）中II b−II b線における要部拡大断面
図である。電極４は、銀−パラジウム等の導体ペースト
をスクリーン印刷し、焼成してなるものである。抵抗体
５も抵抗体ペーストをスクリーン印刷し、焼成してなる
もので、電極４、４に誇がるように各格子内に形成され
る。各抵抗体５の抵抗値は、レーザトリミングによりそ
れぞれ調整される。保護膜６も、例えばガラスペースト
をスクリーン印刷し、焼成してなるもので、抵抗体５を
被覆・保護する。Next, manufacturing of the chip resistor using the example substrate 1 will be described. FIG. 2A shows an electrode 4, a resistor 5,
The state where the protective film 6 is formed is shown in FIG.
FIG. 2 is an enlarged cross-sectional view of a main part taken along the line IIb-IIb in FIG. 2 (a). The electrode 4 is formed by screen-printing a conductor paste such as silver-palladium and firing it. The resistor 5 is also formed by screen-printing a resistor paste and firing it, and is formed in each grid so as to be proud of the electrodes 4 and 4. The resistance value of each resistor 5 is adjusted by laser trimming. The protective film 6 is also formed by, for example, screen-printing a glass paste and firing it, and covers and protects the resistor 5.
次に、ブレイク溝２′、３′に沿ってブレイクし、周縁
部1a、1bを取り除いて、個々のたんざく状の基板１′と
する（第３図参照）。ブレイク溝２の深さは基板厚に達
しているので周縁部1a、1bを取り除くだけで、基板１は
ばらばらとなり、「折る」、「割る」といった操作は不
要である。従って、基板１′の形状不良は生じない。Next, breaks are made along the break grooves 2 ', 3', and the peripheral edge portions 1a, 1b are removed to form individual strip-shaped substrates 1 '(see FIG. 3). Since the depth of the break groove 2 reaches the thickness of the substrate, the substrate 1 is disassembled only by removing the peripheral edges 1a and 1b, and the operations such as "folding" and "breaking" are unnecessary. Therefore, the defective shape of the substrate 1'will not occur.
基板１′の側端面1cには、それぞれ端面電極７が形成さ
れる〔第４図（ａ）（ｃ）参照〕。この端面電極７は、
端面1cに導体ペーストを付着、焼成して形成される厚膜
電極7aと、この厚膜電極7a上に形成されるはんだめっき
層7bとから構成される。An end face electrode 7 is formed on each side end face 1c of the substrate 1 '(see FIGS. 4 (a) and 4 (c)). This end surface electrode 7 is
It is composed of a thick film electrode 7a formed by attaching a conductor paste to the end face 1c and firing it, and a solder plating layer 7b formed on the thick film electrode 7a.
さらに、この基板１′は、ブレイク溝３、…、３により
分割されて、個々のチップ抵抗器８、…、８とされる
（第４図（ｂ）参照〕。なお、。この場合には、「折
る」又は「割る」と言った操作が必要である。Further, the substrate 1'is divided by the break grooves 3, ..., 3 into individual chip resistors 8, ..., 8 (see FIG. 4 (b)). The operation of "folding" or "breaking" is necessary.
なお、上記実施例では、チップ抵抗器の製造に、この発
明の基板を適用した例を示しているが、ジャンパチッ
プ、ハイブリッドIC等各種電子部品の製造に適用するこ
とが可能である。In the above embodiments, the substrate of the present invention is applied to the manufacture of the chip resistor, but it can be applied to the manufacture of various electronic parts such as jumper chips and hybrid ICs.
（ヘ）発明の効果 以上説明したように、この発明の電子部品用基板は、ブ
レイク溝が基板周縁部を除いて形成され、このブレイク
溝のうち、１の方向と他の方向のそれぞれ両端に位置す
るブレイク溝が基板端縁まで延伸され、１の方向のブレ
イク溝の深さがその両端のブレイク溝を除いて全て他の
方向のブレイク溝より深く形成されることを特徴とする
ものであるから、１の方向のブレイク端面の形状不良を
生じさせることなく分割できる利点を有している。(F) Effects of the Invention As described above, in the electronic component substrate of the present invention, the break groove is formed excluding the peripheral portion of the substrate, and the break groove is formed at both ends in one direction and the other direction. The break groove located is extended to the edge of the substrate, and the depth of the break groove in one direction is deeper than the break grooves in the other directions except for the break grooves at both ends thereof. Therefore, there is an advantage that the break end face in the 1 direction can be divided without causing a defective shape.
又、ブレイク溝のうち、１の方向と他の方向のそれぞれ
両端に位置するブレイク溝が基板端縁まで延伸されてい
ることにより、どちらの方向からブレイクしてもパター
ンからずれてブレイクしてしまうことがなくなり、形状
不良の発生がなくなる。その上、１の方向と他の方向の
それぞれの両端のブレイク溝から基板周縁部を先に取り
除いてしまうと、結果的に中の部分（周縁部より内側の
部分）も、基板端縁までブレイク溝が形成されているの
と同様になり、ブレイクの際のずれや、所望のパターン
からずれることで発生する形状不良がなくなる。In addition, since the break grooves located at both ends in one direction and the other direction of the break grooves extend to the edge of the substrate, even if the break groove is broken from either direction, the break groove is broken. And the occurrence of defective shapes is eliminated. In addition, if the peripheral edge of the substrate is removed from the break grooves at both ends in the direction 1 and the other direction first, the inner portion (the portion inside the peripheral edge) is also broken up to the edge of the substrate. It becomes similar to the case where the groove is formed, and there is no misalignment at the time of break or shape defect caused by misalignment from a desired pattern.
第１図（ａ）は、この発明の一実施例に係る電子部品用
基板の外観斜視図、第１図（ｂ）及び第１図（ｃ）は、
それぞれ同電子部品用基板の第１図（ａ）中I b−I b
線、I c−I c線における要部拡大断面図、第２図（ａ）
は、同電子部品用基板表面に電極等を形成した状態を示
す斜視図、第２図（ｂ）は、同電子部品用基板の第２図
中II b−II b線における要部拡大断面図、第３図は、同
電子部品用基板より周縁部を取り除いた状態を示す斜視
図、第４図（ａ）は、同電子部品用基板より棒状に分割
された基板の側端面に端面電極を形成した状態を示す斜
視図、第４図（ｂ）は、この棒状に分割された基板をさ
らに分割し、チップ抵抗器とした状態を説明する図、第
４図（ｃ）は、この棒状に分割された基板の、第４図
（ａ）中IV c−IV c線における拡大断面図、第５図は、
同電子部品用基板の変形例を示す外観斜視図、第６図
（ａ）は、従来の電子部品用基板の外観斜視図、第６図
（ｂ）及び第６図（ｃ）は、それぞれ同従来の電子部品
用基板の、第６図（ａ）中VI b−VI b線、VI c−VI c線
における拡大断面図、第６図（ｄ）は、同従来の電子部
品用基板の斜め割れを説明する拡大断面図、第７図は、
斜め割れの状態で製造されたチップ抵抗器の外観斜視図
である。 1:電子部品用基板、 1a・1b:基板周縁部、 ２・２′・３・３′：ブレイク溝。FIG. 1 (a) is an external perspective view of an electronic component substrate according to an embodiment of the present invention, and FIGS. 1 (b) and 1 (c) are
Ib-Ib in FIG. 1 (a) of the electronic component substrate, respectively.
Line, Ic-Ic line main part enlarged sectional view, FIG. 2 (a)
2 is a perspective view showing a state in which electrodes and the like are formed on the surface of the electronic component substrate, and FIG. 2 (b) is an enlarged cross-sectional view of a main part of the electronic component substrate taken along line IIb-IIb in FIG. FIG. 3 is a perspective view showing a state in which a peripheral portion has been removed from the electronic component substrate, and FIG. 4 (a) shows an end face electrode on a side end face of the substrate divided into a rod shape from the electronic component substrate. FIG. 4 (b) is a perspective view showing the formed state, FIG. 4 (b) is a view for explaining a state in which the substrate divided into rod shapes is further divided into chip resistors, and FIG. 4 (c) shows the rod shape. FIG. 5 is an enlarged cross-sectional view of the divided substrate taken along line IV c-IV c in FIG. 4 (a).
An external perspective view showing a modified example of the electronic component substrate, FIG. 6 (a) is an external perspective view of a conventional electronic component substrate, and FIGS. 6 (b) and 6 (c) are the same. FIG. 6 (a) is an enlarged cross-sectional view of a conventional electronic component substrate taken along line VIb-VIb or VIc-VIc in FIG. 6 (a), and FIG. 6 (d) is an oblique view of the conventional electronic component substrate. FIG. 7 is an enlarged cross-sectional view for explaining cracking.
It is an external appearance perspective view of the chip resistor manufactured in the state of diagonal cracking. 1: Substrate for electronic parts, 1a and 1b: Peripheral edge of substrate, 2.2 ', 3.3': Break groove.
Claims (1)
レイク溝を格子状に形成してなる電子部品用基板におい
て、 前記ブレイク溝は、基板周縁部を除いて形成され、この
ブレイク溝のうち、１の方向と他の方向のそれぞれ両端
に位置するブレイク溝は、基板端縁まで延伸され、前記
１の方向のブレイク溝の深さは、その両端のブレイク溝
を除いて全て他の方向のブレイク溝より深く形成したこ
とを特徴とする電子部品用基板。1. A substrate for electronic parts, wherein break grooves extending in one direction and in other directions are formed in a grid pattern, wherein the break grooves are formed excluding a peripheral portion of the substrate. Of these, the break grooves located at both ends in the 1 direction and the other direction respectively extend to the edge of the substrate, and the depth of the break grooves in the 1 direction is the same except for the break grooves at the both ends. A substrate for electronic parts, which is formed deeper than the break groove of.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2174096A JPH0710024B2 (en) | 1990-06-29 | 1990-06-29 | Substrate for electronic parts |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2174096A JPH0710024B2 (en) | 1990-06-29 | 1990-06-29 | Substrate for electronic parts |
Related Child Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8025502A Division JP2948522B2 (en) | 1996-02-13 | 1996-02-13 | Manufacturing method of chip-shaped electronic component |
| JP10155093A Division JP3029821B2 (en) | 1998-06-04 | 1998-06-04 | Substrate for electronic components |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0462985A JPH0462985A (en) | 1992-02-27 |
| JPH0710024B2 true JPH0710024B2 (en) | 1995-02-01 |
Family
ID=15972585
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2174096A Expired - Fee Related JPH0710024B2 (en) | 1990-06-29 | 1990-06-29 | Substrate for electronic parts |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0710024B2 (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4678382B2 (en) * | 2007-03-15 | 2011-04-27 | Ｔｄｋ株式会社 | Collective substrate, method for manufacturing the same, and method for manufacturing electronic components |
| JP6448558B2 (en) * | 2014-02-10 | 2019-01-09 | 日本碍子株式会社 | Porous plate-like filler aggregate, method for producing the same, and heat insulating film including porous plate-like filler aggregate |
| JP2018064038A (en) * | 2016-10-13 | 2018-04-19 | 北川工業株式会社 | Jumper member, and manufacturing method thereof |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0766997B2 (en) * | 1988-08-24 | 1995-07-19 | 松下電器産業株式会社 | Ceramic substrate for electronic parts |
-
1990
- 1990-06-29 JP JP2174096A patent/JPH0710024B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0462985A (en) | 1992-02-27 |
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