JPH0229730Y2 - - Google Patents
Info
- Publication number
- JPH0229730Y2 JPH0229730Y2 JP1981191696U JP19169681U JPH0229730Y2 JP H0229730 Y2 JPH0229730 Y2 JP H0229730Y2 JP 1981191696 U JP1981191696 U JP 1981191696U JP 19169681 U JP19169681 U JP 19169681U JP H0229730 Y2 JPH0229730 Y2 JP H0229730Y2
- Authority
- JP
- Japan
- Prior art keywords
- snap
- narrow portion
- notch
- regions
- board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000000919 ceramic Substances 0.000 claims description 4
- 239000012141 concentrate Substances 0.000 claims 1
- 239000000758 substrate Substances 0.000 description 5
- 230000000694 effects Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 238000005336 cracking Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
Landscapes
- Structure Of Printed Boards (AREA)
Description
【考案の詳細な説明】
（技術分野）
本考案は無線機の高周波部品において、数枚の
印刷配線板を１枚に納めた集合化高周波印刷配線
板に関するものである。[Detailed Description of the Invention] (Technical Field) The present invention relates to an aggregated high-frequency printed wiring board in which several printed wiring boards are housed in a single piece of high-frequency components for radio equipment.
（背景技術）
従来、高周波部品に使用される集合化印刷配線
板は、電気的な干渉を避けるために第１図のよう
な切込み２をもうけたケース３に固定してシール
ド効果を持たせていた。ところが製造工程で受け
る熱履歴や衝撃に対しセラミツク基板のような材
質はクラツクが発生し易く、これが第１図のクラ
ツク４として示したように特性に悪影響を与える
ような割れ方をするため、歩留り低下の主要な原
因となつている。(Background Art) Conventionally, assembled printed wiring boards used for high-frequency components have been fixed to a case 3 with a notch 2 as shown in Fig. 1 to provide a shielding effect in order to avoid electrical interference. Ta. However, materials such as ceramic substrates are prone to cracking due to the thermal history and impact they receive during the manufacturing process, and this causes cracks that adversely affect the characteristics, as shown by crack 4 in Figure 1, resulting in lower yields. This is the main cause of the decline.
（考案の課題）
本考案は従来の技術の上記欠点を改善すること
を目的とし、その特徴は、切込みにより複数の領
域に分割され各領域が前記切込みの先の狭部によ
り結合するほぼ矩形板状の単一の回路部基板と、
前記狭部にもうけられ隣接する領域の境界を規定
する為の回路部基板の表面にもうけられる直線溝
によるスナツプと、該スナツプをオーバーブリツ
ジして当該スナツプの両側の領域の間を予め配線
するジヤンパー線とを有するごとき、集合化高周
波印刷配線板にある。(Problems of the invention) The present invention aims to improve the above-mentioned drawbacks of the conventional technology, and its features include a substantially rectangular plate that is divided into a plurality of regions by notches and each region is joined by a narrow portion at the end of the notch. a single circuit board shaped like a
A snap formed by a straight groove formed in the narrow portion and formed on the surface of the circuit board for defining the boundary between adjacent areas, and the snap being overbridged to pre-wire between the areas on both sides of the snap. There are also assembled high-frequency printed wiring boards, such as those having jumper wires.
（考案の構成及び作用）
第２図は本考案の構造例で、１はセラミツクに
よる基板で、切込み２により複数の領域８ａ，８
ｂ，８ｃに分割されている。切込み２の先端には
基板の狭部７がもうけられ、該狭部７により各領
域８ａ，８ｂ，８ｃは一体に結合されている。狭
部７は幅狭であるので外部の機械力が加わると破
損しやすい。そこで、狭部７には図示のごとく、
隣接する２つの領域の境界を規定する位置に直線
状のスナツプと呼ばれる溝６がもうけられる。従
つて、仮に基板が狭部で破損する場合には、スナ
ツプにそつて基板が割れることとなる。基板が割
れた場合の領域間配線の断線を防止する為、予
め、スナツプ６をオーバーブリツジ（越えて）し
て、スナツプの両側の領域の間を配線するジヤン
パー線５が回路部の印刷パターンの上にハンダ付
によりもうけられている。なお１０は回路部の印
刷パターンの上に搭載される電子部品を示し、３
は基板を収納するケースである。(Structure and operation of the invention) Fig. 2 shows an example of the structure of the invention, in which 1 is a ceramic substrate, and notches 2 form a plurality of regions 8a, 8.
It is divided into b and 8c. A narrow portion 7 of the substrate is provided at the tip of the notch 2, and each region 8a, 8b, 8c is joined together by the narrow portion 7. Since the narrow portion 7 is narrow, it is easily damaged when external mechanical force is applied. Therefore, in the narrow part 7, as shown in the figure,
A linear groove 6 called a snap is provided at a position defining the boundary between two adjacent regions. Therefore, if the board were to break at the narrow portion, the board would crack along the snap. In order to prevent the inter-region wiring from breaking if the board is cracked, the jumper wires 5, which are routed between the regions on both sides of the snaps, are overbridged (crossed over) the snaps 6 in advance, and the jumper wires 5 are connected to the printed pattern of the circuit section. It is made by soldering on top. Note that 10 indicates an electronic component mounted on the printed pattern of the circuit section, and 3
is a case that stores the board.
以上の構成によると、各領域は狭部により結合
されて一体の大きな回路部（基板）を構成するの
で、その上に電子部品を搭載するなどの作業をす
る際の作業効率がよい。作業中に万一基板が破損
することがあつても、予めもうけられるスナツプ
にそつて基板が割れるので、基板の特性は影響を
受けず、かつスナツプの両側はジヤンパー線で結
合されているので断線不良を起こすこともない。 According to the above configuration, each region is connected by the narrow portion to form a large integrated circuit portion (board), so that work efficiency is improved when performing work such as mounting electronic components thereon. Even if the board should be damaged during work, the board will break along the pre-prepared snaps, so the board's characteristics will not be affected, and both sides of the snaps are connected with jumper wires, so there will be no breakage. It does not cause any defects.
第３図はスナツプ溝の断面の例で、ａのごとき
３角形、ｂのごとき４角形、及びｃのごとき先端
の丸い形状が可能である。特にａの場合はスナツ
プの先端がとがつているので、基板が割れる場合
の位置が正確に規定される。 FIG. 3 shows an example of the cross section of the snap groove, which can have a triangular shape as shown in a, a quadrangular shape as shown in b, and a rounded tip as shown in c. In particular, in case a, the tip of the snap is sharp, so the position in case the board breaks is precisely defined.
（考案の効果）
以上のごとく本考案によると、基板が万一破損
しても基板の特性が影響を受けないので製造歩留
まりが向上する。(Effects of the Invention) As described above, according to the present invention, even if the substrate is damaged, the characteristics of the substrate are not affected, so that the manufacturing yield is improved.
第１図は従来の集合化印刷配線板、第２図は本
考案による集合化印刷配線板、第３図はスナツプ
の断面例を示す図である。
１……基板、２……切込み、３……ケース、４
……クラツク（割れ）、５……ジヤンパー線、６
……スナツプ、７……狭部、８ａ，８ｂ，８ｃ…
…領域。
FIG. 1 shows a conventional assembled printed wiring board, FIG. 2 shows an assembled printed wiring board according to the present invention, and FIG. 3 shows a cross-sectional example of a snap. 1... Board, 2... Notch, 3... Case, 4
...Crack, 5...Jumper line, 6
...Snap, 7...Narrow part, 8a, 8b, 8c...
…region.
Claims (1)
記切込みの先の狭部により結合するほぼ矩形板状
のセラミツクからなる単一の回路部基板と、前記
狭部にもうけられ前記狭部に偶発的に生じる応力
を集中させるため前記狭部を横断する如く回路部
基板の表面にもうけられる直線溝によるスナツプ
と、該スナツプをオーバーブリツジして当該スナ
ツプの両側の領域の間を予め配線するジヤンパー
線とを有することを特徴とする集合化高周波印刷
配線板。 A single circuit board made of a substantially rectangular plate-shaped ceramic divided into a plurality of regions by notches and each region being joined by a narrow portion at the end of the notch, and a circuit board made of a substantially rectangular plate-shaped ceramic which is divided into a plurality of regions by a notch and each region is joined by a narrow portion at the end of the notch, and A snap formed by a straight groove formed on the surface of the circuit board so as to traverse the narrow portion in order to concentrate the generated stress, and a jumper wire pre-wired between regions on both sides of the snap by over-bridge the snap. An aggregated high-frequency printed wiring board characterized by having:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19169681U JPS5897860U (en) | 1981-12-24 | 1981-12-24 | Aggregated high frequency printed wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19169681U JPS5897860U (en) | 1981-12-24 | 1981-12-24 | Aggregated high frequency printed wiring board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5897860U JPS5897860U (en) | 1983-07-02 |
| JPH0229730Y2 true JPH0229730Y2 (en) | 1990-08-09 |
Family
ID=30105145
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19169681U Granted JPS5897860U (en) | 1981-12-24 | 1981-12-24 | Aggregated high frequency printed wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5897860U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5646271B2 (en) * | 1973-05-28 | 1981-10-31 |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS51129759U (en) * | 1975-04-09 | 1976-10-20 | ||
| JPS5855670Y2 (en) * | 1979-09-14 | 1983-12-20 | ヤマハ株式会社 | Printed board |
-
1981
- 1981-12-24 JP JP19169681U patent/JPS5897860U/en active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5646271B2 (en) * | 1973-05-28 | 1981-10-31 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5897860U (en) | 1983-07-02 |
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