JPH0697926A - Digital telephone system - Google Patents

Abstract

PURPOSE:To obtain the digital telephone system capable of confirming a subordinate synchronizing signal and monitoring periodically frame error and a bit error. CONSTITUTION:The digital telephone system 10 synchronizes subordinately the digital clock signal of a digital telephone equipment 11 with a fundamental digital clock signal of plural circuits 20a, 20... of a digital network. This system is provided with the control unit which is provided in the digital telephone equipment 11 and sends the subordinate synchronization inquiry signal of line wire interfaces 13a..., a deciding part 29 for receiving the subordinate synchronization inquiry signal from this control unit 12 and deciding whether the subordinate synchronization is appropriate or not, and a storage table 35 which is provided in the control unit 12 and stores the result of decision of the deciding part 29.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital telephone system and, more particularly, to a digital telephone system for subordinately synchronizing a digital clock signal of a digital telephone with a basic digital clock signal of a digital network.

[0002]

2. Description of the Related Art In recent telephone systems, many digital networks can be connected to telephone devices. When this digital network is connected to a telephone device, the basic digital clock signal used by the digital network and the digital clock signal used by the telephone device are slave-synchronized with the basic clock signal used by the digital network so that they are the same. It is necessary to operate under the digital clock signal of.

However, in order to establish the subordinate synchronization between the telephone device and the digital network, the line for subordinate synchronization is fixedly determined from a plurality of lines. Therefore, when a frame error or a bit error occurs in this line. Could not synchronize with the basic digital clock signal between the digital network and the telephone device even if the other line was good.

Therefore, at the time of this designation, it is confirmed whether or not a frame error or bit error has occurred, and this line is designated as a subordinate synchronization line only when there is no frame error or bit error.

Even if the synchronous line between the digital network and the telephone device is designated in this way, a frame error or a bit error may occur again between the digital network and the telephone device during use.

In order to prevent the frame error and the bit error, the channel is designated again. However, even in this case, there is a problem that it is necessary to confirm whether or not a frame error or a bit error has occurred and to specify the digital network to the telephone device only when there is no frame error or the bit error.

In order to solve the above problems, the present invention provides a digital telephone system in which a digital clock signal of a telephone device is slave-synchronized with a basic digital clock signal of a digital network.

[0008]

SUMMARY OF THE INVENTION The present invention is a digital telephone system in which a digital clock signal of a digital telephone is slave-synchronized with a basic digital clock signal of a digital network. A control unit that sends a slave synchronization inquiry signal, a determination unit that receives the slave synchronization inquiry signal from the control unit and determines whether or not slave synchronization is possible, and a storage table that is provided in the control unit and that stores the determination result of the determination unit. The present invention provides a digital telephone system characterized by comprising:

Further, the present invention provides a digital telephone system characterized in that the control unit is provided with a timer circuit for periodically transmitting a subordinate synchronization inquiry signal to the outside line interface.

Furthermore, the present invention provides a digital telephone system characterized in that the control unit is provided with a transmission section for transmitting a subordinate synchronization inquiry signal in accordance with the storage priority of the storage table.

[0011]

When a digital network is connected to the digital telephone device, an inquiry signal for the digital clock signal is generated from the control unit to the outside line interface. As a result, whether or not the subordinate synchronization of the basic digital clock signal between the digital telephone device and the digital network is determined is stored.

Further, the inquiry signal is sent out periodically to constantly diagnose whether or not the subordinate synchronization is possible.

Furthermore, the inquiry signal is sent to the outside line interface according to the priority order registered in the storage table, and the order is judged.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the digital telephone system of the present invention will be described below with reference to the accompanying drawings.

The digital telephone system 10 of the present invention is provided with a digital telephone device 11 as shown in FIG. The digital telephone device 11 includes a control unit 1
2, external line interfaces 13a, 13b ..., Data highway 14 and speech highway 15 are provided.

The control unit 12 is provided with a main CPU 16, an auxiliary CPU 17, a time switch circuit 18, a subordinate synchronization signal receiving section 19, etc., and the data highway 14 is connected to the auxiliary CPU 17 and the speech highway 15 is connected to the time switch circuit 18. There is.

An up line (DHIN) and a down line (DHOUT) are connected to the data highway 14 and the speech highway 15 and the external line interfaces 13a, 13b, ... For transmitting and receiving control signals and voice control signals. .

Digital service integrated networks (hereinafter referred to as "digital networks or ISDN networks") 20a, 20b ... Are connected to the outside line interfaces 13a, 13b.
control signals by digital signals from a, 20b ...
It is designed to receive call signals.

Dependent sync signal receiver 1 of control unit 12
9 and the external line interfaces 13a, 13b ... A signal line 21 and a dependent clock bus 22 are connected to each other, and a synchronous clock signal (DT) from the digital networks 20a, 20b.
CLK) and the dependent synchronization clock signal (DTALM).

FIG. 1 shows external line interfaces 13a and 13b.
For example, the outside line interface 13a is shown by a block. The external line interface 13a is provided with a connection terminal 23, and the digital network 20 is provided outside this.
a is connected and the transformers 24a and 24b are internally provided.
Are connected. The transformers 24a and 24b include a digital interface 25 and a digital pad circuit 2.
6a, 26b, time switch circuit 27, upstream line (DH
IN) and a down line (DHOUT) are connected to the speech highway 15.

A control CPU 29 is connected to the digital interface 25 and the time switch circuit 27 via a bus 28.
Are connected, and the up line (DHIN) and the down line (DHOU)
T) and is connected to the data highway 14.

Gate circuits 32a and 32b are connected to the digital interface 25 via a digital phase locked loop circuit (hereinafter referred to as "digital PLL") 31 having a crystal oscillation circuit 30. This gate circuit 3
A control CPU 29 is connected to the gates of 2a and 32b,
The synchronous clock signal and the synchronous dependent clock signal are sent to the control unit 12.

FIG. 3 is a block diagram showing an outline of the subordinate synchronization signal receiving section 19 of the control unit 13. A gate circuit 33a that receives the synchronous clock signal from the gate circuit 32a and a gate circuit 33b that receives the clock signal from the oscillator 34 are connected to the subordinate synchronization signal receiving section 19, and the gate circuit is connected to the control terminals of these gate circuits 33a and 33b. The synchronous dependent clock signal from 32b is received directly or via an inverter 33c. A timing generation unit 35 is connected to the output terminals of these gate circuits 33a and 33b, and various timing signals are sent to the time switch circuit 18.

The operation of the digital telephone system 10 thus constructed will be described with reference to the storage table of FIG. 4 and the flow chart of FIG.

First, the digital networks 20a ... Are connected to the outside line interfaces 13a. The digital network 20a ..., That is, the basic digital clock signal serving as the reference of the digital signal is sent to the outside line interface 13a by the connection of the digital network 20a. This basic digital clock signal is transferred to the digital interface 25 via the transformers 24a and 24b.
Sent to. In the digital interface 25, a part of the basic digital clock signal is extracted and sent to the digital PLL 31. In the digital PLL 31, the digital clock signal generated from the crystal oscillation circuit 30 is synchronized with the basic digital clock signal and the gate circuit 3
2a.

On the other hand, when the digital networks 20a, 20b ... Are connected, the control unit 12 sends the data highway 14
An inquiry signal is sent to the control CPU 29 of the external line interface 13a via the.

The control CPU 29 checks whether a frame error, a bit error or the like has occurred after the basic digital clock signal in the digital interface 25 and the digital clock signal of the digital telephone device 11 are subordinately synchronized via the bus 28 ( S1). This result is sent to the control unit 12 via the data highway 14.
(S2).

This subordinate synchronization response signal is judged (S
3) If there is no frame error, bit error, etc., "1" is stored in the storage table 36 of the control unit 12 (S4).

Next, an inquiry signal is sent to the outside line interfaces 13b ... (S1). The control CPU 29 in the outside line interface 13b checks a frame error, a bit error, etc., and the control unit 12 receives the result as a slave synchronization response signal (S
2). This response signal is judged (S3), and if there is a frame error, a bit error, etc., it is regarded as unusable and stored as "0" in the storage table 36 of the control unit 12 (S7).

Similarly, the determination of other ports is performed (S
3), the availability of use is stored in the storage unit table 36 (S4, 7).

Such a determination is made by using the digital networks 20a, 2
0b ... Is performed for all the connected ports and the storage unit table 36 is created.

Based on this table 36, the control unit 12 notifies the ports of high priority and available to the effect that the slave synchronization clock signal is turned on. When the control CPU 29 receives this signal, the gate circuit 32
The gates of a and 32b are turned on.

When the gate circuits 32a and 32b receive the LOW level signal, the gate circuits 32a and 32b are turned on, and the digital networks 20a, 20b ..., That is, the basic digital clock signal (DT) from the digital network 20a.
CLK) and dependent synchronization signal on / off signal (DTALM)
Are sent to the signal line 21 and the signal line 22.

Based on this signal, the gate circuit 33a is turned on and the gate circuit 33b is closed. As a result, the basic digital clock signal (DTCL of the digital network 20a)
K) is sent to the timing generation unit 34, and the digital telephone device 11 operates in a subordinate synchronization with the basic digital clock signal (DTCLK).

When the slave synchronization ON / OFF signal is OFF, the clock signal of the oscillation circuit 34 is the gate circuit 33b.
Is sent to the timing generating section 34 via this signal, and the digital telephone device 11 is operated by this clock signal without depending on the subordinate synchronization signal.

In such a state, the storage table 3
The port of the next priority is designated from 5.

If a frame error, a bit error, etc. are regularly monitored for this port, the slave synchronizing signal, the frame error, and the bit error can be constantly monitored, and when the slave synchronizing signal, the frame error, and the bit error occur, the others can be immediately monitored. Port is specified.

[0038]

According to the present invention, in a digital telephone device system in which a digital clock signal of a digital telephone device is slave-synchronized with a basic digital clock signal of a digital network, a slave synchronization inquiry signal is provided to an external line interface provided in the digital telephone device. A control unit for sending a subordinate synchronization request signal, a determination unit for receiving a subordinate synchronization inquiry signal from the control unit for determining whether subordinate synchronization is possible, and a storage table provided in the control unit for storing the determination result of the determination unit. Allows you to specify a subordinately synchronized port.

Further, since the control unit is provided with the timer circuit for periodically sending the slave synchronization inquiry signal to the outside line interface, the slave synchronization is lost, the frame error,
Bit errors can be constantly monitored, subordinate synchronization is lost, and another port can be designated immediately when a frame error or bit error occurs.

Furthermore, since the control unit is provided with the sending unit for sending the subordinate synchronization inquiry signal according to the storage priority of the storage table, the ports for subordinate synchronization can be sequentially designated.

[Brief description of drawings]

FIG. 1 is a block diagram showing an outline of an external line interface of a digital telephone system of the present invention.

FIG. 2 is a block diagram showing a main part of the digital telephone system of the present invention.

FIG. 3 is a block diagram showing an outline of a subordinate synchronization signal receiving unit of the control unit shown in FIG. 2;

FIG. 4 is an explanatory diagram showing an example of a storage table.

FIG. 5 is a flowchart showing the operation of the digital telephone circuit of the present invention.

[Explanation of symbols]

 10 Digital Telephone System 11 Digital Telephone Equipment 12 Control Units 13a, 13b External Interface 14 Data Highway 15 Speech Highway 16 Main CPU 19 Slave Synchronous Signal Receiving Section 20a, 20b Digital Network 25 Digital Interface 29 Control CPU 31 Digital PLL 32a, 32b, 33a , 33b Gate circuit

Claims (3)

[Claims] 1. A digital telephone system in which a digital clock signal of a digital telephone is slave-synchronized with a basic digital clock signal of a digital network. A control unit for transmitting a slave synchronization inquiry signal to an external line interface, which is provided in the digital telephone. And a determination unit that receives a subordinate synchronization inquiry signal from the control unit and determines whether subordinate synchronization is possible, and a storage table that is provided in the control unit and stores a determination result of the determination unit. And a digital telephone system. 2. The digital telephone system according to claim 1, wherein the control unit is provided with a timer circuit for periodically sending out the subordinate synchronization inquiry signal to the outside line interface. 3. The digital telephone system according to claim 1, wherein the control unit includes a transmission section for transmitting a subordinate synchronization inquiry signal according to the storage priority of the storage table.