JPH0697168A - Fabrication of semiconductor device - Google Patents

Abstract

PURPOSE:To prevent a wiring from cutting at the step of a contact hole and causing short circuit when a wiring is formed at a contact part. CONSTITUTION:After formation of a contact hole 4 and a wiring layer 15, a protective layer 16 is formed thereon followed by formation of a wiring 5 through photolithographic technology. This method prevents the wiring 5 on a dielectric film 3 from cutting at a step part 6 to short-circuit other wiring.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to formation of wiring and coating thereof.

[0002]

2. Description of the Related Art A conventional wiring forming method, particularly a contact forming method, is, for example, as shown in FIG.
0, a silicon oxide film 1 is formed, a polysilicon electrode 2 is formed, a phosphorous oxide glass (hereinafter abbreviated as PSG) 3 is further formed, and contact with a second layer wiring, for example, Al (aluminum) wiring is performed. After forming the contact hole 4 by etching with photolithography technique, an Al film, for example, is formed on the entire surface by means such as vapor deposition and sputtering, and the excess Al film is removed by photolithography while leaving the wiring portion. Two layers of Al wiring 5 were formed.

However, according to this method, the Al wiring 5 is apt to be broken due to poor Al coverage in the stepped portion 6 of the contact hole 4. As a means for solving this problem, the contact hole 4 is formed by combining isotropic etching and anisotropic etching as shown in FIG. The method is mainly done. Further, as a method of eliminating the poor coverage at the stepped portion of the Al contact hole, as shown in FIG. 5, W (tungsten) is buried in the contact hole by CVD, and then W8 is buried in the contact hole by etch back. The remaining W is removed and the second layer Al wiring 5 is then formed.

[0004]

However, in these conventional methods, for example, in the case of forming a thin wiring in the method of FIG. 3, especially when the contact hole and the Al wiring are misaligned, the Al wiring dimension X on the PSG is increased. Becomes narrower on one side of the contact hole, and part of the Al wiring 9 is cut off at the step due to the poor coverage at the step and shorts with the adjacent wiring, which lowers the yield and reduces reliability. There was a problem of doing. Although the method of FIG. 4 alleviates this problem, it is not sufficient as a countermeasure as the wiring becomes finer and the contact hole becomes smaller. On the other hand, in the method of FIG. 5, although this problem is solved, there is a problem in that the number of steps increases and the cost greatly increases.

[0005]

According to the manufacturing method of the present invention,
After the Al film is formed on the entire surface, a protective film such as PSG is further formed on the entire surface by, for example, CVD, and then the Al film and the protective film are patterned in the same pattern to form wiring.

In the case of the method of the present invention, the PSG formed by CVD has a characteristic that it adheres thickly at the step, and the step of Al, which is apt to cause step breakage, can be reinforced. However, even if there is a misalignment, the phenomenon that Al is cut off and peeled off at the step does not occur because it is protected by the PSG protective film.

[0007]

The present invention will be described below with reference to the drawings.

FIG. 1 is a sectional view of a method of manufacturing a semiconductor device according to a first embodiment of the present invention. An oxide film 1 is formed on a silicon substrate 10, a polysilicon electrode 2 is formed thereon,
Further, after forming the PSG insulating layer 3, the contact hole 4 is formed by using the photolithography technique. Next, Al is vapor-deposited on the entire surface to form, for example, about 1 μm, and then PS is further formed.
The G film 16 is formed to a thickness of 0.2 μm or more by the CVD method (FIG. 1A).

Next, Al and PSG except the wiring portion are removed by a photolithography technique, and an Al wiring layer 5 with a PSG protective film 17 obtained by patterning the PSG film 16 is formed (FIG. 1B. )). This PSG film 17 is provided on the Al wiring 5 of the completed semiconductor device as a protective film for the Al wiring 5.

After that, for example, a protective film 18 of PSG nitride film
Are formed to complete the semiconductor device (FIG. 1C).

In the case of this embodiment, even if the Al coverage is poor and the Al wiring is thin in the stepped portion 6, the PSG protective film 17 adhered on the upper portion causes misalignment and the like, and the PSG insulating film 3 on one side is covered. The wiring width Y portion of Al does not cause a short circuit with the adjacent wiring.

FIG. 2 shows a second embodiment of the present invention. However, the present invention is not limited to the case of the connection between the wirings, but may be the connection between the silicon substrate 10 and the wiring as shown in FIG. It may be a connection with a diffusion layer.

In the present invention, the wiring layer may be another gold layer wiring such as W, the protective film may be made of other material such as a nitride film, and may have a multi-layer structure of PSG + nitride film. It's good.

[0014]

As described above, by using the method of the present invention, it is possible to prevent a wiring short circuit or a decrease in reliability due to wiring breakage at the contact portion even when the contact hole and the metal wiring are miniaturized. Moreover, only one additional process does not result in a significant increase in cost. Therefore, it becomes possible to supply inexpensive and highly reliable semiconductor devices.

[Brief description of drawings]

FIG. 1 is a sectional view of a first embodiment of the present invention.

FIG. 2 is a sectional view of a second embodiment of the present invention.

FIG. 3 is a cross-sectional view of a conventional manufacturing method.

FIG. 4 is a cross-sectional view of a conventional manufacturing method.

FIG. 5 is a cross-sectional view of a conventional manufacturing method.

[Explanation of symbols]

 1 oxide film 2 polysilicon electrode 3 PSG insulating film 4 contact hole 5 Al wiring 6 contact hole step portion 7 contact hole step portion 8 with reduced step 8 embedded tungsten 9 Al wiring on PSG 10 silicon substrate 15 Al vapor film 16 PSG protection Film 17 PSG protective film 18 PSG cover film

Claims (2)

[Claims] 1. A method of manufacturing a semiconductor device, comprising: an insulating film; a contact hole opened in the insulating film; and a wiring connected to a lower electrode or a silicon substrate or a silicon diffusion layer through the contact hole. A method of manufacturing a semiconductor device, comprising forming a wiring layer, forming a protective film layer on the wiring layer, and then forming the wiring by a photolithography technique. 2. The method for manufacturing a semiconductor device according to claim 1, wherein the protective film layer is a silicate glass layer, and the wiring layer is an aluminum layer.