JPH0695988A - Program file updating system - Google Patents

Abstract

PURPOSE:To continue processing by updating a program in executing information communication processing internally without disconnecting communication processing applied from the outside to a new program. CONSTITUTION:When a processor 12 is in on-line processing based upon a program loaded on one of plural replaceable memory areas 1 to n, a new program file is received through one of communication I/O equipments 13 and the new program is loaded on an unused memory area. The processor 12 stops a program in execution at a specific interruption point, transfers succeeding information necessary for restart to a common memory area 14, switches a memory area loading the old program to a memory area loading the new program and restarts the processing with the new program by using the succeeding information stored in the area 14.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a program file updating method in an information communication processing apparatus having a communication I / O apparatus for performing communication processing with the outside and performing information processing of a storage program method.

[0002]

2. Description of the Related Art Conventionally, for service-uninterrupted file update in an information communication processing device, the entire information communication processing device is configured as a duplicate, and the SBY system information communication is performed during service by the ACT system information communication processing device. It has been realized by disconnecting the processing device and loading a new file, and then switching the entire device from the ACT system to the SBY system (reference material "Operation and maintenance of electronic exchange [revised version]": Yamada, Ohba 1982 Ohmsha).

[0003]

Since the conventional system is premised on the duplication of the information communication processing device, the device cost becomes high and the system to be switched includes not only the processor but also the communication I / O device. Therefore, there is a problem that the communication with the outside is disconnected by switching the communication I / O device.

The present invention solves the conventional problems, and in an information communication processing device, a program executing information communication processing internally is updated to a new program without disconnecting communication processing seen from the outside, It is an object to provide a program file update method that continues processing.

[0005]

To achieve the above object, one aspect of the present invention comprises a processor, a memory, and one or more communication I / O devices that communicate with the outside. In the information communication processing device that controls the communication I / O device according to the program loaded on the memory to perform communication processing with the outside, and in the information communication processing device that performs information processing internally, the memory area for loading the program is made into multiple planes, At least one of the plurality of memory areas is a common memory area, and the plurality of memory areas other than the common memory area are memory areas having an address conversion mechanism for exchanging addresses of any two memory areas, and the processor is One or more of the common memory area and the plurality of interchangeable memory areas may be loaded into the memory area. After receiving a new program file from outside via one of the communication I / O devices in parallel during online processing according to the executed program and loading it into the unused replaceable memory area, The processing of the old program to be exchanged with the new program is stopped at a specific interruption point, the takeover information necessary for restarting is taken over from the replaceable memory area in which the old program is loaded, into the common memory area, and the address It is characterized in that the address of the memory area in which the new program file is loaded is replaced so as to become the execution memory area address by activating the conversion mechanism, and the processing is restarted by the new program file based on the takeover information.

As another aspect, a memory management mechanism for utilizing a physical memory for loading a program in a virtual memory system is provided, and the memory management mechanism is a logical unit identified by a unique identification number on the physical memory. A plurality of memory spaces are provided, and a specific address area in all of the plurality of logical memory spaces is a common memory area that is mapped to the same physical memory area, and other than the common memory area in the plurality of logical memory spaces. The address area is a dedicated memory area that is mapped to a physical memory area that can be used only in each memory space, and has a logical memory space replacement function that replaces the identification numbers of any two logical memory spaces according to an instruction from the processor. , The processor is
During online processing according to a program loaded in one or more of the logical memory spaces, a new program file is received from outside via one of the communication I / O devices in parallel and is not used. After loading in the logical memory space, the processing of the old program to be exchanged with the new program is stopped at a specific interruption point, and the takeover information necessary for restarting is executed in the logical memory space in which the old program is loaded. It is inherited in the common memory area, the logical memory space replacement function is activated, and the logical memory space loaded with the new program file is replaced so as to become the execution logical memory space, and the new information is updated based on the inherited information in the common memory area. The feature is that the process is restarted by the program file.

[0007]

According to the present invention, the information communication processing apparatus is provided with a mechanism for making a memory area for loading a program into a plurality of planes, and the mechanism for changing the memory area according to an instruction from the processor is not affected by the change. By providing a common memory area that can be accessed at all times, one of the communication I / O devices can be operated while the processor is performing online processing according to a program loaded on one surface of the interchangeable memory areas. After receiving the new program file from the outside via an interface and loading the new program into a swappable memory area that is not used for online processing, the processor executes the program whose file is to be updated at a specific breakpoint. Stop at, transfer the transfer information necessary for restart to the common memory area, and The mechanism for exchanging areas is activated, the program execution memory area is switched from the memory area loaded with the old program to the memory area loaded with the new program, and the processing is restarted by the new program using the inherited information in the common memory area. It is characterized by doing.

As described above, in the present invention, since the program file update is realized by using the memory in the information communication processing apparatus, it is not necessary to duplicate the entire information communication processing apparatus, so that the apparatus configuration is simple. In addition, since the communication I / O device in the information communication processing device is not affected by switching at all before and after the file update, it has an advantage that communication with an external device can be continued.

Embodiments will be described below with reference to the drawings.

[0010]

【Example】

 Example 1:

FIG. 1 is a block diagram showing a first embodiment of the present invention, which is an embodiment in which a memory having a plurality of physical planes is provided.

In FIG. 1, 11 is an information communication processing device,
12 is a processor, 13 is communication I for communicating with an external device.
/ O device, 14 is a common memory area, 151 to 15n are replaceable memory areas, and 16 is a physical memory area of 151 to 15n by operating a part (for example, upper bit) of the memory access address by hardware. It is an address translation mechanism that exchanges addresses.

During normal operation, the processor 12 executes the process using a part of the memory area that can be replaced with the common memory area 14.

At the time of updating a file, the processor 12 receives a new file from the outside via the communication I / O device 13 and loads it into an unused replaceable memory area.

After the file loading is completed, the processing in the memory area in which the old file corresponding to the new file is loaded is stopped at a specific interruption point, and the takeover information necessary for restarting is transferred to a specific area in the common memory area. And processor 1
The address conversion mechanism 16 is operated by an address conversion instruction command or the like from 2 to exchange the addresses of the two memory areas for the processor, and the processing is performed as if the memory area of the new file is the memory area of the old file. The file is updated by restarting.

For example, the relationship between the memory area and the physical address is as shown in FIG.

In this example, the address space is divided into 4 blocks, and a memory area is allocated to each.

In the address translation mechanism, for example, assuming that the memory area 2 is the area storing the old program and the memory area 3 is the area storing the new program, the address sent by the processor is used as it is during the execution of the old program. When there is an address conversion instruction from the processor, the two bits "10" of the address sent by the processor are automatically converted to "11" to access the memory area.

Although a concrete configuration of the address translation mechanism is omitted here, it can be easily constructed by a known technique.

Example 2:

FIGS. 3 and 4 are a block diagram and a schematic diagram of memory usage showing an embodiment in which a virtual memory function is used, which is a second aspect of the present invention.

In FIG. 3, reference numeral 21 denotes an information communication processing device,
Reference numeral 22 is a main processor, 23 is a communication I / O device for communicating with an external device, 24 is a physical memory, 25 is a memory management mechanism, and the physical memory 24 is a memory management mechanism 25 and O.
The processing of S is used as a plurality of logical memory spaces as shown in the example of FIG.

Each logical memory space is identified and managed by the OS by a logical number, and a specific address area in each logical memory space is mapped to the same physical memory in any logical memory space as a common memory area, so that the same physical memory can be obtained. The content is accessible.

During normal operation, the processor 22 loads a program into one or more logical memory spaces under the control of the OS and executes each process.

When updating a file, the processor 22 receives a new file from the outside through the communication I / O device 23 and loads the new file into an unused logical memory space.

After the file loading is completed, the processing in the memory area in which the old file to be replaced with the new file is loaded is stopped at a specific interruption point, and the takeover information necessary for restarting is stored in a specific area in the common memory area. By transferring, operating the memory management mechanism 25 to exchange the logical numbers of the two logical memory spaces, and restarting the processing as if the logical memory space of the new file is the logical memory space of the old file. Realize file update.

[0027]

As described above, according to the present invention, since it is not necessary to duplicate the entire information communication processing device, the communication I / O device is not switched or reset with a simple device configuration, and the information communication processing device is externally connected. It is possible to realize the file update to the new program without interrupting the communication processing and the information processing.

[Brief description of drawings]

FIG. 1 is a diagram illustrating a first embodiment of the present invention.

FIG. 2 is a diagram showing a relationship between a memory area and a physical address.

FIG. 3 is a diagram illustrating a second embodiment of the present invention.

FIG. 4 is a diagram illustrating an example of mapping by a memory management mechanism.

[Explanation of symbols]

 11, 21 Information communication processing device 12, 22 Processor 13, 23 Communication I / O device 14 Common memory area 151-15n Memory area 16 Address conversion mechanism 24 Physical memory 25 Memory management mechanism

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[Procedure amendment]

[Submission date] October 20, 1992

[Procedure Amendment 1]

[Document name to be amended] Statement

[Name of item to be corrected] Claim 1

[Correction method] Change

[Correction content]

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Hiroyuki Ichikawa 1-6 Uchiyuki-cho, Chiyoda-ku, Tokyo Nihon Telegraph and Telephone Corporation (72) Inventor Katsutaka Fujita 1-6 Uchiyuki-cho, Chiyoda-ku, Tokyo Nippon Telegraph and Telephone Corp. (72) Inventor Isao Higashi 1-6 Uchisaiwai-cho, Chiyoda-ku, Tokyo Nihon Telegraph and Telephone Corp. (72) Inventor Tadashi Usui 1-1-6 Uchiyuki-cho, Chiyoda-ku, Tokyo Nippon Telegraph and Telephone Corporation (72) Inventor Mitsunori Dobashi 1015 Kamiodanaka, Nakahara-ku, Kawasaki City, Kanagawa Prefecture Fujitsu Limited (72) Inventor Atsuo Kawai, 216 Totsuka-cho, Totsuka-ku, Yokohama-shi, Kanagawa Hitachi, Ltd. Information and Communication Division

Claims (2)

[Claims] 1. A processor, a memory, and one or a plurality of communication I / O devices that communicate with the outside, and the processor controls the communication I / O devices according to a program loaded on the memory to communicate with the outside. A plurality of memory areas for carrying out communication processing and for loading a program for internally processing information are provided, and at least one of the plurality of memory areas is a common memory area, and the plurality of memory areas other than the common memory area. Is a memory area provided with an address conversion mechanism for exchanging addresses of two arbitrary memory areas, and the processor is loaded in one or more of the common memory area and the interchangeable multi-sided memory areas. During the online processing according to the program, the communication I / O is executed in parallel.
After receiving a new program file from the outside via one of the devices and loading it into the exchangeable memory area which is not used, the processing of the old program to be exchanged with the new program is executed at a specific interruption point. The address of the memory area in which the new program file is loaded by stopping the address and passing over the transfer information necessary for restarting from the replaceable memory area where the old program is loaded into the common memory area and activating the address conversion mechanism. Is replaced with the execution memory area address, and the processing is restarted by a new program file based on the takeover information. 2. A processor, a memory, and one or more communication I / O devices that communicate with the outside, and the processor controls the communication I / O devices according to a program loaded on the memory to communicate with the outside. In an information communication processing device that performs communication processing and internally performs information processing, a memory management mechanism for using a physical memory for loading a program in a virtual memory system is provided, and the memory management mechanism is provided on the physical memory. A plurality of logical memory spaces identified by unique identification numbers are provided, and a specific address area in all of the plurality of logical memory spaces is a common memory area mapped to the same physical memory area. Address areas other than the common memory area in the space are mapped to physical memory areas that can be used only in each memory space. Only the memory area has a logical memory space replacement function to replace the identification number of any two logical memory space by an instruction from the processor,
The processor externally receives a new program file via one of the communication I / O devices in parallel during online processing according to a program loaded in one or more of the logical memory spaces; After loading into the unused logical memory space, the processing of the old program to be exchanged with the new program is stopped at a specific interruption point, and it is necessary to restart in the logical memory space where the old program is loaded. Information is inherited in the common memory area, the logical memory space replacement function is activated, and the logical memory space loaded with the new program file is replaced so as to become the execution logical memory space, and the inherited information in the common memory area is replaced. Program file update method characterized by restarting the process based on the new program file .