JPH069223B2 - IC package - Google Patents
IC packageInfo
- Publication number
- JPH069223B2 JPH069223B2 JP60222057A JP22205785A JPH069223B2 JP H069223 B2 JPH069223 B2 JP H069223B2 JP 60222057 A JP60222057 A JP 60222057A JP 22205785 A JP22205785 A JP 22205785A JP H069223 B2 JPH069223 B2 JP H069223B2
- Authority
- JP
- Japan
- Prior art keywords
- lead
- carrier
- lead carrier
- synthetic resin
- leads
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49861—Lead-frames fixed on or encapsulated in insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/49105—Connecting at different heights
- H01L2224/49109—Connecting at different heights outside the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
【発明の詳細な説明】 産業上の利用分野 本発明はＩＣを絶縁基盤に一体に担持させ、該ＩＣのリ
ードを絶縁基盤の外方へ突出させて成るＩＣパッケージ
に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an IC package in which an IC is integrally supported on an insulating base and the leads of the IC are projected to the outside of the insulating base.
従来技術とその問題点 従来の上記リード突出形のＩＣパッケージは絶縁基盤と
してセラミックを用い、該セラミック基盤に配線パター
ンを形成しておき、リードを同基盤に穿けた孔に単ピン
毎植付けて配線パターンの一端と接続し、配線パターン
の他端をＩＣと接続し、上記配線パターンを施した面へ
別のセラミック板を貼り合せ隠蔽するという構成を採る
のが通例であったが、製造工数が多く、リードと配線パ
ターン間、配線パターンとＩＣ間の夫々において非常に
精緻な接続作業を要求され、加えてリードの植込に手間
を要し、セラミックを使用することもあって製造単価が
非常に高価なものとなる。又高度な製造技術が要求され
生産性も悪い。加えて接続点が多く不良率が高い等の問
題もある。2. Description of the Related Art Conventional Problems and Their Problems Conventionally, the above-mentioned IC package with protruding leads uses ceramics as an insulating substrate, a wiring pattern is formed on the ceramic substrate, and leads are planted in single holes in the holes formed in the same substrate. It is a common practice to connect one end of the pattern, connect the other end of the wiring pattern to the IC, and bond and conceal another ceramic plate to the surface on which the wiring pattern has been formed. In many cases, very precise connection work is required between the lead and the wiring pattern, and between the wiring pattern and the IC. In addition, it takes time to implant the lead, and the manufacturing unit price is very high due to the use of ceramics. It will be very expensive. In addition, high manufacturing technology is required and productivity is poor. In addition, there are problems that there are many connection points and the defect rate is high.
発明の目的 本発明は上記ＩＣパッケージをローコストで且つ容易に
量産できるようにすると共に、ＩＣ器体たる絶縁基盤を
合成樹脂の一体成形構造としつつ、該一体成形基盤内へ
のリード組込が容易且つ精度高く行なえるようにし、同
基盤内線路形成、リードとＩＣの接続機構を簡素化した
ＩＣパッケージを提供するものである。An object of the present invention is to enable the above-mentioned IC package to be mass-produced easily at a low cost, and to make it easy to assemble the leads into the integrated molding base while the insulating base body, which is an IC body, has a synthetic resin integral molding structure. In addition, the present invention provides an IC package that can be performed with high accuracy and that has a simplified line-in-base line formation and a lead / IC connection mechanism.
発明の構成 本発明は上記目的を達成するため、以下の実施例にて詳
述するように、ＩＣ器体たる絶縁基盤を合成樹脂成形基
盤にて形成する一方、複数のリードを整列状態で保有せ
るリード担体を形成し、該リード担体を方形枠体を組成
するように該方形枠体の角を通る線上で分割せる各枠片
にて形成し、該方形枠体に組立てた各リード担体を上記
合成樹脂成形基盤に一体成形して複合構造とし、これに
よってリードの一端部をリード担体の外辺側において基
盤外へ突出させると共に、上記リード他端をリード担体
の内辺側においてＩＣ収容室内へ露出させＩＣと接続す
るように構成したものである。In order to achieve the above-mentioned object, the present invention forms an insulating substrate as an IC body with a synthetic resin molding substrate and holds a plurality of leads in an aligned state, as described in detail in the following examples. Forming a lead carrier, and forming the lead carrier with each frame piece that is divided along a line passing through the corners of the rectangular frame body so as to form a rectangular frame body, and forming each lead carrier into the rectangular frame body. The synthetic resin molding substrate is integrally molded into a composite structure, whereby one end of the lead is projected to the outside of the substrate on the outer side of the lead carrier, and the other end of the lead is inside the IC housing chamber on the inner side of the lead carrier. It is exposed and connected to the IC.
発明の実施例 以下本発明の実施例を図面に基いて説明する。Embodiments of the Invention Embodiments of the present invention will be described below with reference to the drawings.
各図において１はＩＣ器体たる基盤を示す。該基盤１は
合成樹脂にて一体成形構造とし、その上面中央部にＩＣ
収容室２を該一体成形によって画成する。In each figure, 1 indicates a base as an IC body. The base 1 is made of synthetic resin and integrally molded, and an IC is formed in the center of the upper surface.
The storage chamber 2 is defined by the integral molding.
他方３はリード担体を示す。該リード担体３は複数のリ
ード４を所定ピッチで整列して担持する。該リード担体
３は方形枠体を組成するように該方形枠体の角を通る線
上で各枠片毎に分割して形成し（第６図，第９図参
照）、各枠片毎（各担体毎）に等数のリードを等ピッチ
で担持させる。該リード４は金属帯板材より打抜形成
し、担体３は絶縁物より形成する。The other 3 indicates a lead carrier. The lead carrier 3 carries a plurality of leads 4 aligned at a predetermined pitch. The lead carrier 3 is formed by dividing each frame piece on a line passing through the corners of the rectangular frame body so as to form a rectangular frame body (see FIGS. 6 and 9), and for each frame piece (each An equal number of leads are loaded on each carrier at an equal pitch. The leads 4 are stamped and formed from a metal strip material, and the carrier 3 is formed from an insulator.
該リード４を担体３に担持させる手段として、第６図乃
至第８図は担体３の表面にリード４を露出状態で接着す
る実施例を示す。As a means for supporting the leads 4 on the carrier 3, FIGS. 6 to 8 show an embodiment in which the leads 4 are adhered to the surface of the carrier 3 in an exposed state.
リード４は担体３表面に接着しつつ、一端を担体３の外
辺側（長辺側）へ延出させ、該延出部を第７図に仮想線
で示す平条片の状態から に曲げ形成し、他端を担体３の内辺側（短辺側）に突出
状態又は非突出状態に整列配置する。The lead 4 is adhered to the surface of the carrier 3 and one end thereof is extended to the outer side (long side) of the carrier 3, and the extended portion is changed from a flat strip state shown by an imaginary line in FIG. And the other end is aligned on the inner side (short side) of the carrier 3 in a protruding state or a non-projecting state.
上記リード４は第７図，第８図に示すように、上記の如
く露出状態にして同担体３の上面と下面に取付け、一方
で外側の列のリード群を、他方で内側の列のリード群を
構成する。実施に応じ第８図に示すように上記リード４
を担体３の上面又は下面の一方のみに配することができ
る。As shown in FIGS. 7 and 8, the leads 4 are attached to the upper surface and the lower surface of the carrier 3 in an exposed state as described above. One group of leads on the outer row and one lead on the inner row on the other hand are provided. Make up a group. Depending on the implementation, as shown in FIG.
Can be arranged on only one of the upper surface and the lower surface of the carrier 3.
上記リード一端の 曲げ片を外部接続端子４ｂとし、他端をＩＣ接続端子４
ａとする。ＩＣ接続端子４ａは担体３の表面に配置する
か、又は担体３の他側面より突出する。One end of the lead The bending piece is used as the external connection terminal 4b, and the other end is the IC connection terminal 4b.
a. The IC connection terminal 4a is arranged on the surface of the carrier 3 or protrudes from the other side surface of the carrier 3.
又上記リード４を担体３に担持させる他例として、第９
図乃至第１１図に示すように、該リード４を担体３に貫
通させ一体構造とすることができる。該貫通構造は担体
３の成形に際し、リード４をインサート成形することに
よって得られる。又は担体３に予めリード植付け孔又は
溝を列穿しておき、リード４を圧入することによって貫
装形のリード担体を構成できる。前記表面露出形担体と
同様、上記リード４を上下二段に貫装しその一方で外側
の列のリード群を、他方で内側の列のリード群を夫々構
成する。第９図，第１０図Ａ，Ｂに示すようにリード４
はその一端を担体３の外辺側側面より突出させ、他端を
同内辺側側面より延出して 曲げ片を外部接続端子４ｂとし、上記突出端をＩＣ接続
端子４ａとする。As another example of supporting the lead 4 on the carrier 3,
As shown in FIGS. 1 to 11, the lead 4 can be penetrated into the carrier 3 to form an integral structure. The penetrating structure is obtained by insert molding the leads 4 when molding the carrier 3. Alternatively, a lead-in hole or groove may be preliminarily formed in the carrier 3 in advance, and the leads 4 may be press-fitted to form a penetration type lead carrier. Similar to the surface-exposed type carrier, the leads 4 are penetrated vertically in two steps to form a lead group in the outer row on the one hand and a lead group in the inner row on the other hand. As shown in FIGS. 9 and 10A and B, the lead 4
Has one end protruding from the outer side surface of the carrier 3 and the other end extending from the inner side surface. The bent piece is used as the external connection terminal 4b, and the protruding end is used as the IC connection terminal 4a.
上記の如くして形成された四このリード担体３を第６図
に示すように方形枠体状に組み、合成樹脂成形基盤１の
一体成形に際しインサート成形して複合構造とする。上
記各リード担体３は第９図に示すように、方形枠体の角
を通る線上において分割されて上記枠組がなされ、上記
インサート成形がなされる。The four lead carriers 3 formed as described above are assembled in a rectangular frame shape as shown in FIG. 6 and insert-molded when the synthetic resin molding substrate 1 is integrally molded to form a composite structure. As shown in FIG. 9, each of the lead carriers 3 is divided along the line passing through the corners of the rectangular frame to form the frame, and the insert molding is performed.
第１図乃至第４図は前記表面露出形のリード担体３の枠
状組立体を上記成形によって鋳込み複合構造とした場合
を、第５図は前記貫装形のリード担体３の枠状組立体を
上記成形によって複合構造とした場合を夫々示す。1 to 4 show the case where the frame-shaped assembly of the surface-exposed lead carrier 3 is made into a composite structure by casting as described above, and FIG. 5 shows the frame-shaped assembly of the penetration type lead carrier 3. The respective cases of forming a composite structure by the above molding are shown.
上記複合構造において第２図，第５図に示すように、上
記リード４の一端（外部接続端子４ｂ）を上記リード担
体３の外辺（長辺）側において合成樹脂成形基盤１の外
方へ突出させると共に、他端（ＩＣ接続端子４ａ）を上
記リード担体３の内辺（短辺）側において前記基盤上面
に画成したＩＣ収容室２に露出させる。同図に示すよう
にリード担体３の内側端をＩＣ収容室２内に露出させる
ことによって上記ＩＣ接続端子４ａの露出状態を得る。In the above composite structure, as shown in FIGS. 2 and 5, one end (external connection terminal 4b) of the lead 4 is moved to the outside of the synthetic resin molding substrate 1 on the outer side (long side) side of the lead carrier 3. At the same time as projecting, the other end (IC connection terminal 4a) is exposed at the inner side (short side) side of the lead carrier 3 in the IC housing chamber 2 defined on the upper surface of the base. As shown in the figure, by exposing the inner end of the lead carrier 3 into the IC housing chamber 2, the exposed state of the IC connection terminal 4a is obtained.
斯くしてＩＣ５を第３図に示すようにＩＣ収容室２内に
収容し、上記露出状態にあるＩＣ接続端子４ａと該ＩＣ
５とを接続する。同図は導線６によって接続した例を示
す。Thus, the IC 5 is accommodated in the IC accommodating chamber 2 as shown in FIG. 3, and the IC connecting terminal 4a in the exposed state and the IC
5 is connected. The figure shows an example in which the wires 6 are connected.
該リード４へ接続したＩＣ５を保有する収容室２は蓋で
密閉するか、又は第４図に示すように流動合成樹脂を充
填し封止する。７は該封止体を示す。The storage chamber 2 holding the IC 5 connected to the lead 4 is sealed with a lid or is filled with a flow synthetic resin and sealed as shown in FIG. Reference numeral 7 indicates the sealed body.
実施に応じ上記ＩＣ収容室２の底面には基盤１と一体に
ＩＣの座板８を設け、該座板８上にＩＣ５を載せ上記接
続を行なう。該ＩＣ座板８は金属板又はセラミック板に
て形成する。ＩＣ５と座板８とは接着し固定しても良
い。Depending on the implementation, an IC seat plate 8 is provided integrally with the base 1 on the bottom surface of the IC housing chamber 2, and the IC 5 is placed on the seat plate 8 to perform the above connection. The IC seat plate 8 is formed of a metal plate or a ceramic plate. The IC 5 and the seat plate 8 may be bonded and fixed.
発明の効果 本発明は以上説明したように、ＩＣ器体たる絶縁基盤を
合成樹脂の一体成形基盤としつつ、複数のリードを整列
状態で保有する四このリード担体を 方形枠体の各角部を通る線上で分割された各枠片で組成
し、上記合成樹脂成形基盤に一体成形して複合構造とし
たので、同基盤に対するリード担体の方形枠組み及び各
辺におけるリード群の定ピッチ配列、並びにＩＣとリー
ドの接続作業が極めて容易且つ適正に行なえる。EFFECTS OF THE INVENTION As described above, the present invention uses an insulating base body, which is an IC body, as an integrally molded base body of synthetic resin, and holds a plurality of leads in an aligned state. The composite frame is composed of the frame pieces divided on the passing line, and is integrally molded on the synthetic resin molding substrate to form a composite structure. It is extremely easy and appropriate to connect the lead to the lead.
又リード担体を方形枠体の各枠片毎に分割して容易に生
産でき、各担体のリードも各担体毎に予め曲げ加工すれ
ば良いから、単純な一方向曲げ加工で足りる。加えて方
形枠体の角を通る線上で分割されたリードピン数の異な
る複数の担体を準備しておけば、上記方形枠体組成によ
りピン数の変更に容易に対応できる。上記によって、Ｉ
Ｃパッケージの量産化を助長し、ローコスト化を達成で
きる。Further, the lead carrier can be easily produced by dividing each frame piece of the rectangular frame body, and the leads of each carrier can be bent beforehand for each carrier, so that simple unidirectional bending work is sufficient. In addition, if a plurality of carriers having different numbers of lead pins divided on a line passing through the corners of the rectangular frame are prepared, the number of pins can be easily changed by the composition of the rectangular frame. By the above, I
It is possible to promote mass production of C packages and achieve low cost.
又本発明によれば、各リード担体が方形枠体の各角を通
る線上で分割されて成るから、第６図，第９図に示すよ
うに各担体の内辺（短辺）側ではＩＣ接続端子のピッチ
を縮小して微小なＩＣとの接続に適合するピッチに設定
することを可能としつつ、同外辺（長辺）側では外部接
続端子のピッチを拡大してソケットのコンタクトに適合
するようなピッチに容易に変換でき、該ピッチ変換を各
枠片（リード担体）において同様の条件で行なえ、又外
部端子群を枠組された方形枠体の外辺を効率的に使用し
て略均一に配することができる。Further, according to the present invention, since each lead carrier is divided on the line passing through each corner of the rectangular frame body, as shown in FIGS. 6 and 9, the IC is formed on the inner side (short side) side of each carrier. It is possible to reduce the pitch of the connection terminal and set it to a pitch that is suitable for connection with a minute IC, while expanding the pitch of the external connection terminal on the same outer side (long side) side to match the socket contact. Can be easily converted into a pitch like that described above, and the pitch conversion can be performed on each frame piece (lead carrier) under the same conditions, and the outer terminal group can be effectively used by using the outer edge of the framed rectangular frame body. It can be distributed evenly.
第１図は本発明の一実施例を示すＩＣパッケージ斜視
図、第２図は同断面図、第３図はリード担体と複合構成
にしＩＣを組込んだ合成樹脂成形基盤断面図、第４図は
ＩＣを封止せる同基盤断面図、第５図は他例を示すリー
ド担体と合成樹脂成形基盤の複合体断面図、第６図は方
形枠体に組立てたリード担体平面図、第７図は両面にＩ
Ｃを担持させる露出形リード担体断面図、第８図は片面
にＩＣを担持せる露出形リード担体断面図、第９図は四
単位に分割した状態のリード担体平面図、第１０図Ａは
リードを二段に貫装した貫装形リード担体をリード折曲
前の状態を以って示す断面図、同図Ｂは同リード折曲後
の断面図、第１１図は同リードを一段に貫装した貫装形
リード担体断面図である。 １…ＩＣ器体たる合成樹脂成形基盤、２…ＩＣ収容室、
３…リード担体、４…リード、４ａ…ＩＣ接続端子、４
ｂ…外部接続端子、５…ＩＣ。FIG. 1 is a perspective view of an IC package showing an embodiment of the present invention, FIG. 2 is a sectional view of the same, and FIG. 3 is a sectional view of a synthetic resin molding base in which an IC is incorporated in a composite structure with a lead carrier, and FIG. Is a sectional view of the same substrate that seals the IC, FIG. 5 is a sectional view of a composite of a lead carrier and a synthetic resin molding substrate showing another example, FIG. 6 is a plan view of the lead carrier assembled in a rectangular frame, and FIG. Is I on both sides
8 is a sectional view of an exposed lead carrier that carries C, FIG. 8 is a sectional view of an exposed lead carrier that carries an IC on one side, FIG. 9 is a plan view of the lead carrier divided into four units, and FIG. 10A is a lead. FIG. 11 is a cross-sectional view showing a through-type lead carrier in which the lead is inserted in two stages before the lead is bent, FIG. 11B is a cross-sectional view after the lead is bent, and FIG. FIG. 3 is a cross-sectional view of the mounted lead-type lead carrier. 1 ... Synthetic resin molding base as an IC body, 2 ... IC accommodation chamber,
3 ... Lead carrier, 4 ... Lead, 4a ... IC connection terminal, 4
b ... external connection terminal, 5 ... IC.
───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 昭55−115339（ＪＰ，Ａ) 特開 昭59−41860（ＪＰ，Ａ) 実開 昭57−115254（ＪＰ，Ｕ) 実開 昭58−56446（ＪＰ，Ｕ) 実開 昭58−155851（ＪＰ，Ｕ) ─────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-55-115339 (JP, A) JP-A-59-41860 (JP, A) Actually opened 57-115254 (JP, U) Actual-opened Sho 58- 56446 (JP, U) Actual development Sho 58-155851 (JP, U)
Claims (1)
ド担体の表面に接着するか、又はリード担体を貫通して
担持させ、該リード担体を方形枠体を組成するように該
方形枠体の角を通る線上で分割せる各枠片にて形成し、
該方形枠体に組立てた、各リード担体を合成樹脂成形基
盤に一体成形して複合構造とし、該複合構造により上記
リードの一端を上記リード担体の外辺側において上記合
成樹脂成形基盤の外方へ突出させると共に、他端を上記
リード担体の内辺側において合成樹脂成形基盤の上面に
画成するＩＣ収容室に露出させＩＣと接続する構成とし
たことを特徴とするＩＣパッケージ。1. A rectangular frame body, in which a plurality of leads are adhered to the surface of a lead carrier made of an insulating material, or the lead carrier is carried through the lead carrier, and the lead carrier constitutes a rectangular frame body. Formed with each frame that can be divided on the line passing through the corners of
Each lead carrier assembled in the rectangular frame is integrally molded on a synthetic resin molding base to form a composite structure, and one end of the lead is formed on the outer side of the lead carrier by the composite structure to the outside of the synthetic resin molding base. And an IC package in which the other end is exposed in an IC housing chamber defined on the upper surface of the synthetic resin molding base on the inner side of the lead carrier and connected to the IC.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60222057A JPH069223B2 (en) | 1985-10-05 | 1985-10-05 | IC package |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60222057A JPH069223B2 (en) | 1985-10-05 | 1985-10-05 | IC package |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6281739A JPS6281739A (en) | 1987-04-15 |
| JPH069223B2 true JPH069223B2 (en) | 1994-02-02 |
Family
ID=16776424
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60222057A Expired - Lifetime JPH069223B2 (en) | 1985-10-05 | 1985-10-05 | IC package |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH069223B2 (en) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2600689B2 (en) * | 1987-07-06 | 1997-04-16 | ソニー株式会社 | Hollow package for semiconductor device |
| US5023700A (en) * | 1988-06-17 | 1991-06-11 | Ngk Insulators, Ltd. | Minutely patterned structure |
| EP0435637B1 (en) * | 1989-12-26 | 1995-03-01 | Nihon Plast Co., Ltd. | Rotary damper |
| JP3072522B2 (en) * | 1990-07-24 | 2000-07-31 | 日本発条株式会社 | Hinge device |
| US5821457A (en) * | 1994-03-11 | 1998-10-13 | The Panda Project | Semiconductor die carrier having a dielectric epoxy between adjacent leads |
| US5824950A (en) * | 1994-03-11 | 1998-10-20 | The Panda Project | Low profile semiconductor die carrier |
| US6339191B1 (en) | 1994-03-11 | 2002-01-15 | Silicon Bandwidth Inc. | Prefabricated semiconductor chip carrier |
| JP3357220B2 (en) * | 1995-07-07 | 2002-12-16 | 三菱電機株式会社 | Semiconductor device |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55115339A (en) * | 1979-02-26 | 1980-09-05 | Fujitsu Ltd | Ic stem |
| JPS57115254U (en) * | 1981-01-10 | 1982-07-16 | ||
| JPS5856446U (en) * | 1981-10-12 | 1983-04-16 | 日本電気株式会社 | Resin-encapsulated semiconductor device |
| JPS58155851U (en) * | 1982-04-14 | 1983-10-18 | 日本電気株式会社 | Mold type semiconductor device |
| JPS5941860A (en) * | 1982-09-01 | 1984-03-08 | Nec Corp | Manufacture of case for semiconductor device |
-
1985
- 1985-10-05 JP JP60222057A patent/JPH069223B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6281739A (en) | 1987-04-15 |
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