JPH0691508B2 - PN code synchronization method - Google Patents

Description

The present invention relates to a PN (Pseudo Noise) code synchronization system, and more specifically, a PN used in a spread spectrum communication system.
The present invention relates to a code synchronization method.

(Prior Art) A conventional PN code synchronization system is, for example, a sliding correlation system for detecting a correlation between a bit clock of a received PN code and a reference PN code output at a bit clock of a different speed and synchronizing a PN code generator for spreading. Was used.

(Problems to be Solved by the Present Invention) When the conventional sliding correlation method described above is used,
It takes a long time to detect synchronization, for example from 1 second
It took 20 seconds, and the burst communication of several tens of msec, which is expected to develop in the future, took too long a period until synchronization, which was unsuitable and there was a problem that it could not be used.

It is also conceivable to use a surface acoustic wave convolver device (referred to as a SAW convolver in this specification) having the same processing time as the preampule length, but if the processing time in the SAW convolver exceeds a predetermined value, the SAW convolver will However, the size becomes large, the mass productivity is difficult, and the cost is high.

On the contrary, it is possible to match the preamble length with the processing time of the SAW convolver.
There was a problem that the confidentiality of communication was lacking due to the short cycle.

The present invention has been conceived in view of the above, and an object of the present invention is to provide a PN code synchronization method capable of initial synchronization with a PN code at high speed by using a SAW convolver with a short processing time.

(Means for Solving the Problems) In order to solve the above problems, the present invention is a PN code synchronization method for spread spectrum signals having a preamble, and SAW having a processing time shorter than the preamble period.
A positive correlation output is detected from the logical product of the correlation output generated from the convolver and the effective range determining pulse of the width corresponding to the preamble period, and the period of 1/2 of the first clock pulse period supplied to the reference PN code generator is detected. An initial value corresponding to the processing time is set in a counter for counting a second clock pulse having a second clock pulse from the start of correlation detection between the preamble and the reference PN code generator to the occurrence of the positive correlation output. The counter counts up the pulse, the second clock pulse is counted down by the counter when the positive correlation output is generated, and the counter outputs an output pulse when the count value of the counter reaches zero. At the very least, the PN code generator for spread demodulation is synchronously controlled according to the output pulse.

(Operation) In the present invention, the correlation between the preamble and the PN code output from the reference PN code generator is detected by the SAW convolver. This detected correlation output is ANDed with the effective range determining pulse having the pulse width corresponding to the preamble period, and the SA having a processing time shorter than the preamble period is calculated.
The false correlation output detected by using the W convolver is substantially eliminated, and the positive correlation output is detected.

On the other hand, since the correlation output of the SAW convolver is obtained every 1/2 cycle of the PN code output cycle, the second clock pulse of 1/2 cycle of the first clock supplied to the reference PN code generator is output. A counter for counting is provided, and the second
Clock pulses are counted. In this case, the initial value is set corresponding to the processing time of the SAW convolver so that the position of the PN epoch corresponds when the counter count value becomes zero during the down counting of the second clock pulse.

The counter, to which the initial value is set, counts up the second clock pulse from the time when the correlation detection between the preamble and the reference code generator output is started to the time when the positive correlation output is generated, and counts down from the time when the positive correlation output is generated. . During this down-counting, when the count value of the counter becomes zero, an output pulse is generated from the counter. When this output pulse is generated, it corresponds to the position of the PN epoch as described above, and the PN code generator for spread demodulation is synchronously controlled by the output pulse generated from the counter.

By these actions, the initial synchronization of the preamble is achieved, and then the synchronization is maintained, for example, by the delay locked loop, and demodulation by spectrum despreading and information can be performed.

(Examples of the Invention) Hereinafter, the present invention will be described with reference to Examples.

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.

The received spread spectrum signal is subjected to RF amplification and frequency conversion to become an intermediate frequency signal, and this intermediate frequency signal is amplified by the intermediate frequency amplifier 1.

In this embodiment, it is composed of an initial synchronization section A for synchronizing with the preamble section of the received spread spectrum signal, a delay locked loop (hereinafter referred to as DLL) B, and a spread demodulation section C.

The intermediate frequency signal is frequency-mixed with the multiplier 2 provided in the spread demodulation unit C for despread demodulation, the multipliers 3 and 4 forming the correlator provided in the DLLB, and the oscillation output of the oscillator 6. It is supplied to the frequency mixer 5.

The intermediate frequency signal frequency-converted by the frequency mixer 5 is supplied to one input terminal of the SAW convolver 7 for correlation detection. On the other hand, within the range of the gate length of the SAW convolver 7, a reference PN code generator 8 generates a PN code pattern which is the same as the PN pattern of the reception preamble and whose time axis is inverted, and the reference PN code and the output from the oscillator 9 are generated. What is Mixer 10
And the mixed output is supplied to the other input terminal of the SAW convolver 7 in order to detect the correlation with the output from the frequency mixer 5. Here, the SAW convolver 7 convolves and integrates the signal supplied to one terminal and the signal supplied to the other terminal, and the inputs are made to travel in opposite directions to increase the relative speed of the passing signal. To accelerate the correlation detection period.

The correlation detection output detected by the SAW convolver 7 is supplied to the bandpass filter 11 to remove unnecessary signals outside the bandwidth of the bandpass filter 11 and detected by the envelope detector 12.
The waveform is shaped by the waveform shaper 13 and supplied to the AND gate 14. The AND gate 14 is further supplied with an effective range determination pulse from a reference PN code generator control circuit 15 described later,
A positive correlation signal is obtained from the AND gate 14.

On the other hand, the outputs of the multipliers 3 and 4 are separately supplied to the envelope detectors 18 and 19 via the bandpass filters 16 and 17, respectively, for detection, and the detection outputs are supplied to the subtraction amplifier 20 to be supplied to the envelope detector 20. 18
The output of the envelope detector 19 is subtracted from the output of and amplified. The output of the subtraction amplifier 20 is supplied as a control signal to the voltage controlled oscillator 22 through the loop filter 21, and the subtraction amplifier 20
The output oscillation frequency of the voltage controlled oscillator 22 is changed according to the output of the. The output of the voltage controlled oscillator 22 is frequency-divided via a frequency divider 23 having a frequency division ratio of 2, and this frequency-divided output is supplied as a shift pulse to a PN code generator 25 for demodulation via an inverter 24.

The most significant bit (nth bit) of the PN code generator 25 is at one terminal of the multiplier 4, and the next higher bit [(n-1) th bit] of the PN code generator 25 is at one terminal of the multiplier 3. Are supplied to each. Here, the bit speed of the PN code generators 8 and 25 is set to 8 Mb / s, the free-running frequency of the voltage controlled oscillator 22 is set to 16 MHz, and it is set to twice the bit speed of the PN code generators 8 and 25. This is because the relative speed of both signals in the SAW convolver 7 is twice, and the SAW convolver 7 is operated for each half bit clock.
This is because the correlation output can be obtained from Voltage controlled oscillator 22
Is output as a counting clock pulse to the synchronous counter 27 whose counting direction is switched up and down by the positive correlation output. Further, the inverter 24 is inserted so that the output of the frequency divider 23 is shifted by a half cycle by the inverter 24 to facilitate the synchronization holding by the DLLB.

The highest-order bit of the PN code generator 25 is supplied to the multiplier 2 through the delay device 26 that delays the bit speed by 1/2 cycle, multiplies the output of the intermediate frequency amplifier 1 by despreading, and the multiplier Two
Is supplied to the demodulator 29 via the bandpass filter 28, and the information output is obtained from the demodulator 29. Here, the DLLB phase lock is locked at the midpoint of one bit clock. That is, since the PN code generated from the initial synchronization point is used in DLLB, it needs to be advanced by a half bit clock, and in order to be used for despreading, it is delayed by a half cycle in the delay device 26 and synchronized with the input signal.

The output of the frequency divider 23 is supplied to the reference PN code generator 8 as a shift lock and to the reference PN code generator control circuit 15 as a synchronization pulse. Reference PN code generator control circuit 15
Receives the output from the frequency divider 23 as a clock pulse, outputs a reference PN code generation control signal for repeatedly operating the reference PN code generator 8 during the preamble period in synchronization with the clock pulse, and outputs the reference PN code. The AND gate 14 outputs the effective range determination pulse in the half of the preamble period with a delay of half the preamble period from the time when the code becomes 0.
To the reference PN code generator 8 and outputs a synchronous counter control signal for presetting an initial setting value to the synchronous counter 27 in synchronization with the reset signal to the reference PN code generator 8.

Here, the initial setting value is an up-count of the output of the voltage controlled oscillator 22 until a positive correlation output is output from the AND gate 14, and a down output from the positive correlation signal is output from the synchronous counter 27. Is set to a value that is output at the position of 1 bit before the PN epoch.

The up / down count of the synchronous counter 27 is switched by the positive correlation signal from the AND gate 14, and the clock pulse output from the voltage controlled oscillator 22 is up-counted until the positive correlation signal is input, and the positive correlation signal is input. Then, the counter is down-counted and the borrow output is used as a synchronization pulse for PN.
The counter is configured to be supplied to the code generator control circuit 30.

The PN code generator control circuit 30 receives an output from the inverter 24 as a clock pulse, receives a synchronization pulse output from the synchronization counter 27, and outputs a synchronization reset pulse for starting the operation of the PN code generator 25 in synchronization with the clock pulse. It is a control circuit configured to generate.

In one embodiment of the present invention configured as described above, the received spread spectrum signal is RF amplified and frequency converted, amplified by the intermediate frequency amplifier 1, and then converted into a frequency corresponding to the input signal frequency of the SAW convolver 7. The frequency is converted by the mixer 5 and the oscillator 6, and the SAW convolver 7
Is supplied to. Here, the spread spectrum signal output from the intermediate frequency amplifier 1 is a burst signal having a code length of several tens of msec and a preamble length of 32 μsec (0 to 255 chips) as shown in FIG. 3, and the SAW convolver 7 has a processing time. It is assumed that the rating is 9 μsec, which is shorter than 32 μsec.

Therefore, in order to enable the initial synchronization of the spread spectrum signal, the correlation between the PN pattern of the preamble in the received spread spectrum signal and the PN pattern of the reference PN code generator 8 is detected to perform the initial synchronization (also referred to as synchronization acquisition). ),
It is necessary to output the PN code of the PN code generator 25 for spread demodulation from the PN epoch point in the received spread spectrum signal. By doing this, the correlation with the spread spectrum signal can be obtained, and the phase of each PN code can be kept within ± 1/2 chip and DLLB can hold the synchronization (also referred to as synchronization tracking). The information output can be demodulated from

Next, the operation will be described from the synchronous capture.

Output from divider 23 For example, refer to 8MHz clock signal
The reference PN code from the PN code generator 8 is sequentially shifted, mixed with the oscillation output of the oscillator 9 in the mixer 10, and converted into a frequency corresponding to the input signal frequency of the SAW convolver 7,
Supplied to SAW Convolver 7. The reference PN code from the reference PN code generator 8 is temporally inversely arrayed with the PN pattern of the preamble, and the correlation between the reference PN code and the preamble in the received spread spectrum signal is detected by the SAW convolver.

In this case, the reference PN code generator 8 receives the reference PN code generation control signal output from the reference PN code generator control circuit 15.
Then, the reference PN code is output repeatedly during the preamble period, and the incoming spread spectrum signal is awaited.

Both inputs are input to the SAW convolver 7, and when the correlation between both inputs is detected, the SAW convolver 7 produces a correlation output. Unwanted components in the correlation output are removed by the bandpass filter 11, detected by the envelope detector 12, and the detection output is waveform-shaped by the waveform shaping circuit 13 and supplied to the AND gate 14.

However, as shown schematically in Fig. 4, the SAW convolver 7
If the processing time Tg of (1) is shorter than the preamble period (32 μs), there are many false correlations, and therefore false correlation and positive correlation may be detected before the initial synchronization point. In FIG. 4, the input signal from the mixer 5 is simply input, and the input from the mixer 10 is simply shown as a reference, and the false correlation α at "0 to 36" bits is
The case where the correlation β is detected in the "91 to 164" bits is shown. Reference PN to avoid adopting such false correlation
The effective range determination pulse is output from the generator control circuit 15 to the AND gate 14, and the gate of the AND gate 14 is kept open during the generation of the effective range determination pulse.

In this embodiment, as shown in FIG. 2, the width of the effective range determining pulse is set to 1/2 the pulse width (= “128” chips) of the number of preamble chips (= 256), and is effective. The generation timing of the range determination pulse is based on the time when the reference PN code becomes "0" and "128" chips of the PN code have elapsed. Therefore, the correlation signal due to the false correlation α shown in FIG. 4 is blocked by the AND gate 14.
Even if a positive correlation occurs early after the reference point, the processing time of the SAW convolver 7 is short and there are multiple processing periods within the preamble period, and the positive correlation refers to the reference PN.
There is an opportunity to occur again in the latter half of the PN code output period from the code generator 8. However, since the effective range determination pulse width and its position are set as described above, the regenerated positive correlation output described above is output through the AND gate 14.

Furthermore, from the reference PN code generator control circuit 15, the reference PN
An initial value is set in the synchronization counter 27 in synchronization with the reset of the code generator 8. This initial value is when the output of the voltage controlled oscillator 22 is down-counted from the time when the correlation output is generated,
The borrow output from the synchronous counter 27 is set to output one bit before the PN epoch. This initial value also corresponds to the processing time of the SAW convolver 7, and if the processing time of the SAW convolver 7 is 9 μsec and the processing time including the auxiliary circuit is 9.25 μsec as in this embodiment, the initial value is “−”. It is 150 ".

Next, the initial setting value will be described.

Synchronous counter 27 from the correlation output point from SAW convolver 7
The period Te until the count of "0" becomes "0" is Te = Ts-125 (nsec) as shown in FIG. On the other hand, the period Tc ′ from the reference point until the correlation output is generated is Can be obtained at. Here, D is SA from the reference point as shown in FIG.
This is a delay time until an input is supplied to the W convolver 7, and Tc is a period from the input of the SAW convolver 7 to the generation of a correlation output when the delay time D = 0 as shown in FIG. In FIG. 6, when the input of the SAW convolver 7 is delayed by 1.25 μsec from the reference point, that is, D = 1.25 μsec.
Shows the case.

Therefore, in FIG. The period Ts from the time when the correlation output is generated to the initial synchronization point is Ts = 32 (μsec) -Tc = 11.375 (μsec). The relationship between the period Tc and the period Ts is Ts = Tc-Tg = 20.625-9.250 = 11.375 (μsec).

Next, if the delay time D exists in FIG.
= 1.25 .mu.sec, the correlation can be obtained with "159 to 86" bits in the standard PN code, that is, in the output PN code from the reference PN code generator 8. Also Is required as.

In the period Ts, Ts = Tc'-Tg = 21.25-9.25 = 12 (μsec) (b) and the initial synchronization point is obtained.

Returning to FIG. 5, since the initial value Ci of the synchronous counter 27 needs to be offset by the count number of the processing time Tg of the SAW convolver 7 from the above equation (b), the period Te is equal to the period Ts.
Considering that it is shorter by 2 clocks (however, the clock based on the output cycle of the voltage controlled oscillator 27) is shorter, Te = Tg / 62.5 (nsec) + 2 = 9250 / 62.5 + 2 = 150.

Therefore, the initial value Ci is “[−150]”.

In the case shown in FIG. 6, when the delay time D = 0, the count value Cm of the synchronous counter 27 when the correlation output is generated is Cm because the period Tc ′ is 20.625 μsec from the equation (a). = Ci + [Te '/ 62.5 (nsec)] =-150+ [20625 / 62.5] = 180 counts Te = Cm + 62.5nsec = 11250 (nsec) Ts = Te + 125 (nsec) = 11375 (nsec). This is the same as each of the above values obtained in FIG.

Therefore, the initial value is the processing time of SAW convolver 7 (Tg
= 9250nsec).

Next, from the time when the clock pulse is supplied to the reference PN code generator 8 to start the output of the PN code from the PN code generator 8, the control counter 27 outputs the voltage controlled oscillator 22 until the positive correlation output is generated. The count is up-counted, the up / down is switched from the time when the positive correlation output is generated, and the down-counting is performed. The borrow output generated during this down-counting is supplied to the PN code generator control circuit 30 as a synchronization pulse to generate a synchronization pulse. Upon application, the PN code generator control circuit 30 outputs a synchronous reset pulse to the PN code generator 25, and the PN code generator 25 outputs a PN code in synchronization with the output pulse of the inverter 24. In this case, the output of the PN code from the PN code generator 25 starts from the time of the PN epoch. The nth bit of the PN code generator 25 and (n-1)
There is a time delay of one clock pulse from the output of the bit-th bit, and the output of the (n-1) -th bit and the output of the n-th bit are separately supplied to the multipliers 3 and 4, and the intermediate frequency amplifier Bandpass filter 16,1 multiplied by the output from 1
7, envelope detectors 18, 19, subtraction amplifier 20, loop filter
The DLLB including the voltage control oscillator 21, the voltage controlled oscillator 22, the frequency divider 23, and the inverter 24 holds the synchronization as is known.

The output from the nth bit of the PN code generator 25 is supplied to the multiplier 2, and the output from the intermediate frequency amplifier 1 is despread and the spread spectrum signal is demodulated. This demodulated output is baseband demodulated by a demodulator 29 via a bandpass filter 28, and an information output is obtained from the demodulator 29.

If the burst signal is interrupted and the input spread spectrum signal cannot be received while the DLLB holds the synchronization, the synchronization may not be maintained for some reason.

Therefore, the output of the spread demodulation unit C is supplied to the lock / unlock detecting device 33, and the unlock / discriminating device 34 discriminates that the lock / unlock detecting device 33 has detected the unlock, and the output of the unlock discriminating device 34 is determined. The set switch 32 is supplied to the drive circuit 35 and driven by the output of the unlock determination device 34. By this driving, the reference PN code generator control circuit 15 and the synchronization counter 27 are reset.

In the above-described embodiment of the present invention, the case where the synchronous counter 27 is used to perform down-counting from the time of correlation output and the PN epoch is detected by the borrow output has been illustrated, but the synchronous counter is necessary. Not Ts [=
It is also possible to detect the initial synchronization point, that is, the PN epoch, by obtaining the period Tc 'from the time when the correlation output of the SAW convolver 7 is generated by Tc'-Tg].

Further, by providing a delay line between the AND gate 14 and the synchronous counter 27 to delay the positive correlation output, it is possible to compensate for variations in the processing time of the SAW convolver 7. Moreover, by doing so, mass productivity can be improved.

(Effect of the invention) As described above, according to the present invention, since the SAW convolver can be used, and the general SAW convolver having a processing time of the SAW convolver shorter than the preamble period can be used,
Initialization of the PN code for spread spectrum communication is fast and reliable, and no special processing time is required for the SAW convolver, so the configuration can be inexpensive.

Further, the variation in the processing time of the SAW convolver can be made by changing the initial value of the synchronization counter or by adapting the delay line, which improves the mass productivity.

Further, the resynchronization operation can be automatically started easily by detecting that the synchronization holding by the DLL has been lost.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. 2 to 6 are timing charts for explaining the operation of the present invention. A: initial synchronization block, B: DLL, C: spread demodulation block, 2
〜4 …… Multiplier, 7 …… SAW convolver, 8 …… Reference P
N code generator, 14 ... AND gate, 15 ... Reference PN code generator control circuit, 18 and 19 ... Envelope detector, 20 ...
… Subtraction amplifier, 22 …… Voltage controlled oscillator, 23 …… Divider,
25 ... PN code generator, 26 ... delayer, 30 ... PN code generator control circuit, 32 ... reset switch.

 ─────────────────────────────────────────────────── ─── Continued front page (72) Inventor Shigeyuki Nakayama 2-17-5 Shibuya, Shibuya-ku, Tokyo Kenwood Co., Ltd. (72) Inventor Hirotaka Namioka 2-17-5 Shibuya, Shibuya-ku, Tokyo Shareholders Kenwood, Inc. (72) Inventor Naofumi Terada, 2-17-5, Shibuya, Shibuya-ku, Tokyo Kenken, Inc. (56) Reference JP-A-58-131840 (JP, A)

Claims (1)

[Claims] 1. A PN code synchronization method for a spread spectrum signal having a preamble, wherein a correlation output generated from a SAW convolver having a processing time shorter than the preamble period and an effective range determination pulse having a width corresponding to the preamble period. The positive correlation output is detected from the logical AND of the first clock pulse period supplied to the reference PN code generator.
An initial value corresponding to the processing time is set in a counter that counts a second clock pulse having a 1/2 cycle, and the positive correlation output is generated from the start of correlation detection between the preamble and the reference PN code generator output. Until the second clock pulse is up-counted by the counter, the second clock pulse is down-counted by the counter from the time when the positive correlation output is generated, and the counter is counted when the count value of the counter due to the down-count becomes zero. A PN code synchronization system characterized in that a PN code generator for spreading and demodulating is synchronously controlled in response to the output pulse.