JPH0685396B2 - Etching method and apparatus used therefor - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a technique which is particularly effective for dry etching and applied to dry etching for forming an end face having an inclination.

[Background technology]

It is generally practiced to dry a part of the object to be processed by a dry etching technique to form a desired pattern. One of them is a so-called contact hole that is formed in the insulating film in order to draw electrical continuity from the circuit element in the semiconductor pellet to the wiring layer on the insulating film.

The contact hole is preferably formed by inclining its wall surface toward the center in order to improve the so-called step coverage of the wiring material such as aluminum deposited in the hole. The contact hole having the inclined wall surface can be formed as follows, for example.

Forming a resist layer on an insulating film made of silicon dioxide (SiO ₂ ) deposited on a semiconductor substrate made of silicon (Si) or the like on which circuit elements are formed, and exposing and developing the resist layer. Thus, a pattern hole for a contact hole is formed. As is well known, since the light intensity distribution at the time of exposure is weakened by the diffraction phenomenon, the wall surface of the resist pattern hole is formed in a shape inclined toward the center.

Next, dry etching is performed using the resist pattern as a mask. At that time, a gas that etches both the insulating film and the resist exposed at the bottom of the pattern hole is used. Therefore, etching in the depth direction of the insulating film and etching in the lateral direction of the wall surface of the pattern hole proceed in parallel. As a result, a contact hole having a wall surface inclined toward the center is formed in the insulating film similarly to the pattern hole. This contact hole can be formed only when the wall surface of the pattern hole has an inclination and the resist layer is simultaneously etched.

However, in the resist pattern, the inclination angle of the wall surface of the pattern hole changes due to slight changes in process conditions such as exposure, development, and baking. Therefore, naturally, the inclination of the wall surface of the contact hole formed using this as a mask is not constant, which causes a problem in reliability and the dimensional accuracy is not high. Further, the present inventors have found that the contact hole is larger than the diameter of the pattern hole, and thus is a technique unsuitable for miniaturization of the pattern required for future highly integrated semiconductor devices and the like.

Regarding the dry etching, the Industrial Research Institute Co., Ltd., issued November 20, 1985, "Electronic Materials" 1985 supplement,
Details are given below.

[Object of the Invention]

An object of the present invention is to provide a technique capable of forming an inclined end surface on an object to be etched by etching.

Another object of the present invention is to provide a technique capable of forming the end face with a desired inclination.

The above and other objects and novel features of the present invention will be apparent from the description of the present specification and the accompanying drawings.

[Outline of Invention]

The outline of a typical invention among the inventions disclosed in the present application will be briefly described as follows.

That is, using a dry etching device capable of independently controlling the Yen energy, the vacuum processing space of the device is introduced with an etching gas that causes deposition and etching at a predetermined potential as a boundary, and a DC bias higher than the predetermined potential. By alternately applying a low DC bias, it is possible to repeat the etching of the object to be etched in the depth direction and the deposition of the polymer on the side surface to be etched. Therefore, the polymer is deposited on the side face formed earlier, and the deposited polymer acts as a mask, so that the inclined portion having a shape protruding with time can be formed.

Further, since the etching rate and the amount of polymer deposited can be freely adjusted by adjusting the application time of the high DC bias and the low DC bias described above, it is possible to easily form an inclined portion having an arbitrary inclination.

〔Example〕

1 (a) to 1 (f) are process diagrams showing the outline of the etching method of this embodiment, and FIG. 2 shows the etching method.
It is a graph which shows the relationship between DC bias and time.

FIG. 3 is a graph showing the etching characteristics of the etching gas used in the etching method according to one embodiment of the present invention, and FIG. 4 is a configuration diagram of the etching apparatus applied to this embodiment.

As shown in the schematic view of FIG. 4, the etching apparatus is provided with a sample table 6 for holding a sample 5 in a vacuum container 4 having a discharge gas inlet 2 and an exhaust port 3 together with a microwave inlet 1. A microwave is guided from the microwave generator (plasma forming means) 7 to the microwave introduction unit 1 through the waveguide 8. A magnetic field generating coil (plasma forming means) 9 is provided outside the vicinity of the microwave introducing portion of the waveguide 8 in order to improve the efficiency of plasma generation.
Is installed. Further, a fixed potential applying electrode 10 made of a conductive material, the upper end of which extends along the sample table 6, is provided on the outer periphery of the axis of the sample table 6, and the axis of the sample table 6 has a matching circuit. It is connected to a high frequency applying power source (DC bias applying means) 11 via 14. As described above, the above apparatus can control the plasma forming means and the DC bias applying means independently. Further, a DC bias switching control unit 12 is connected to the high frequency power supply 11. The light emission monitor 13 is used to observe the progress of etching.

The above-mentioned apparatus applicable to this embodiment is described in detail in Japanese Patent Application No. 60-152159.

When etching the sample 5 with the above etching apparatus,
The inside of the vacuum container 4 is evacuated in advance, a gas suitable for etching is introduced from the gas inlet 2 under reduced pressure, and the microwave generated by the microwave generator 7 is passed from the microwave inlet 1 through the waveguide 8. It is introduced into the vacuum container 4, a magnetic field is generated by the magnetic field generating coil 9 as needed, and plasma is generated by exciting gas by discharge. At the same time, a DC bias (hereinafter, also referred to as Vdc) is applied between the sample stage 6 which is an electrode and the formed plasma by the high frequency power source 11 to dry-etch the sample 5 with reactive ions.

In this embodiment, contact holes are used as etching gas to draw electrical continuity from the circuit element of the semiconductor pellet to the wiring layer made of aluminum (Al) formed on the insulating film made of silicon dioxide (SiO ₂ ) on the circuit element. The case of etching using fluoromethane (CHF ₃ ) will be described.

The third figure, outline of the etching characteristics of CHF ₃ is shown, the CHF ₃ If plasma formed under a predetermined condition, the boundary of Vo is a value of a predetermined Vdc applied deposition and etching It has the property of exhibiting both phenomena. That is, when Vdc is made larger than Vo, etching occurs,
Conversely, if it is smaller than Vo, polymer deposition occurs.

In this embodiment, the contact hole is formed by utilizing the property of CHF ₃ as shown in FIGS. Therefore, the sample 5 is a semiconductor wafer before being cut into individual semiconductor pellets. FIG. 1 shows an enlarged partial sectional view of a semiconductor wafer.

FIG. 1A shows a silicon (Si) substrate 16 on which a circuit element (not shown) is formed and on which an insulating film 15 is formed. A resist layer 17 is deposited on the insulating film 15, and a resist pattern of holes 18 having substantially vertical wall surfaces is formed on the resist layer 17. The semiconductor wafer to which the resist layer 17 shown in FIG. 1 (a) is attached is placed on the sample stage 6 of the apparatus, and plasma is generated as described above. Then, Vdc is set higher than Vo, and the first partial etching of the insulating film 15 is performed as shown in FIG. The etching in this case has high anisotropy due to the reactive ions, and the etching is almost perpendicular to the wafer surface.

Next, Vdc is made zero, and the first deposition of the polymer 19 is performed on the entire surface as shown in FIG. 1 (c). Then, Vdc is made higher than Vo again, and the second partial etching of the insulating film 15 is performed. Also in this case, since the anisotropic etching is performed, the etching is performed almost perpendicular to the wafer surface. Therefore, the polymer 19 deposited on the resist layer 17 at the same time as the insulating film is also removed by etching. However, since the polymer 19a deposited on the wall surface 18a of the hole 18 of the resist layer 17 and the wall surface 15a of the insulating film 15 formed by etching acts as a mask, the etching diameter of the second etching of the insulating film 15 is Polymer 19 from that of the first etching
It is smaller by the thickness of a.

Further, by repeating the second deposition and the third etching in sequence, it is possible to stack the polymers 19b, 19c and 19d as shown in FIG. 1 (e), and at the same time, from the diameter substantially matching the polymer 19d. A hole can be formed so that the surface of the substrate 16 is exposed. And the resist layer
17 (f) by removing the polymers 19a to 19d adhered to the wall surface 15a of the insulating film 15 formed by etching 17
A contact hole 20 having a wall surface (inclined portion) having a predetermined inclination angle toward the center is completed as shown in FIG.

FIG. 4 is a graph in which Vdc is plotted on the vertical axis and time is plotted on the horizontal axis, and shows the time transition of the etching method of the present embodiment. That is, in the figure, t ₁ is the first partial etching time, t ₂ is the first deposition time, t ₃ is the second partial etching time, and similarly, the second deposition time t _{4 is} the third partial etching time. The contact hole 20 is completed by repeating the etching time t ₅ (not shown).

The inclination angle of the contact hole 20 can be freely changed, and the larger the ratio of the deposition time to the partial etching time = t _2n / t _2n-1 (n: natural number), the slower the angle becomes. It becomes steeper. Even if the ratio is the same, the shorter t _2n-1 and t _{2n, the} smoother the surface.

As described above, when the contact hole is formed by repeating the partial etching and the deposition by using a normal dry etching apparatus equipped with parallel plate electrodes, the etching and the deposition are performed in different chambers. It has to be performed or the conditions have to be changed largely, such as exchanging the etching gas. Therefore, the efficiency is extremely low.

However, in this embodiment, Vd of two high and low values is simply used.
It is possible to easily form a desired inclination only by alternately applying c. Further, the application of Vdc can be freely controlled by using the above device because the DC bias switching control unit is installed.

Further, according to the present embodiment, since the contact hole formed does not utilize the receding due to the etching of the resist layer itself, the diameter thereof does not become larger than the hole diameter of the resist pattern, but rather becomes smaller. Therefore, it is extremely advantageous for electrical connection with a finely patterned circuit element or wiring layer.

Further, as described above, the inclination of the wall surface of the contact hole 20 can be formed at a desired angle, so that the inclination can be made gentle and it can also be always formed at a constant angle. Therefore,
When aluminum (Al) is deposited on the contact hole 20 to form a wiring layer (not shown), a wiring layer with good step coverage can be formed. Therefore, it is possible to manufacture a highly reliable semiconductor device without disconnection or the like.

〔effect〕

(1). Using a dry etching device capable of independently controlling ion energy, an etching gas that causes deposition and etching at a predetermined potential as a boundary is introduced into a vacuum processing space of the device, and a DC bias higher and a DC bias lower than the predetermined potential are introduced. By alternately applying and, the etching of the object to be etched in the depth direction and the deposition of the polymer on the side surface to be etched can be repeated, so that the polymer is deposited on the side surface formed earlier. Then, the deposited polymer acts as a mask and can form a sloped portion that has a protruding shape over time.

(2). By adjusting the application time of the high DC bias and the low DC bias described above, the etching rate and the polymer deposition amount can be freely adjusted, so that the inclined portion having an arbitrary inclination can be easily formed.

(3). The etching according to (1) and (2) above can be performed by using an etching apparatus in which the plasma forming means and the DC bias applying means can be independently controlled, and the DC bias applying means is connected to a DC bias switching control means. Can be controlled automatically.

(4). By connecting the switching control means to a high frequency power source, the automatic control described in (3) above can be easily performed.

(5). According to the previous term (2), since the inclined portion can be formed with an accuracy equal to or smaller than the dimension of the resist pattern, it is suitable for fine processing such as so-called submicron processing.

(6). Since etching and deposition can be performed alternately in the same apparatus, etching processing can be performed efficiently.

(7). When the side surface to be formed by etching is the wall surface of the contact hole of the semiconductor pellet, it is possible to improve the step coverage of the wiring layer deposited on the insulating film by forming the wall surface that is inclined toward the center at a predetermined angle.
A semiconductor device with reliable electrical conduction can be provided.

Although the invention made by the present inventor has been specifically described based on the embodiments, the present invention is not limited to the embodiments and various modifications can be made without departing from the scope of the invention. Nor.

For example, in the embodiment, the case where the wall surface of the hole of the resist layer is substantially vertical has been described. In the case of being vertical, it is possible to perform etching with particularly high dimensional accuracy, but it goes without saying that the etching is not limited to this. On the contrary, since the inclined portion can be formed even if it is vertical, it is possible to use a so-called multilayer resist in which the end surface of the resist pattern is vertical.

Further, in the embodiment, the case where the contact hole is formed in the insulating film made of silicon dioxide by using CHF ₃ as an etching gas has been described, but the present invention is not limited to this. The etching gas may be any gas such as C ₂ F ₆ , C ₃ F ₈ and C ₄ F ₈ as long as it exhibits both deposition and etching phenomena at a predetermined potential Vo. . Also, a mixed gas of these may be used. In the embodiment, the deposition process is performed under the condition of Vdc = 0, but the present invention is not limited to this and any condition of Vdc <Vo may be used.

Further, the etching target is not limited to the insulating film, and can be naturally applied to semiconductors and conductors such as Si, polysilicon, silicide, and Al that need to have an inclined end face. For example, there is a case where the end face of the first gate electrode made of polysilicon or the like of so-called D-RAM is inclined.

The etching device is not limited to the one shown in the embodiment, and any device may be used as long as the ion energy can be controlled independently. For example,
A method of controlling ion energy with a grid inserted in plasma may be used. In the case of the DC bias application method, the DC bias may be applied using a DC power supply.

[Field of application]

In the above description, the case where the invention made by the present inventor is mainly applied to a so-called wafer process of manufacturing a semiconductor device which is a field of application which is the background of the invention,
The present invention is not limited to this, and is a technique effective when applied to, for example, a device other than a semiconductor device that needs to form an inclined portion at a predetermined angle.

[Brief description of drawings]

1 (a) to 1 (f) are process diagrams showing the outline of the etching method of this embodiment, FIG. 2 is a graph showing the relationship between DC bias and time in the above etching method, and FIG. 3 is according to the present invention. Fig. 4 is a graph showing the etching characteristics of the etching gas used in the etching method of one embodiment, and Fig. 4 is a configuration diagram of an etching apparatus applied to this embodiment. DESCRIPTION OF SYMBOLS 1 ... Microwave introduction part, 2 ... Discharge gas introduction port, 3 ... Exhaust port, 4 ... Vacuum container, 5 ... Sample, 6 ... Sample stand, 7 ... Microwave generator (plasma forming means), 8 ... Waveguide. , 9 ... Magnetic field generating coil (plasma forming means), 10 ... Fixed potential applying electrode, 11 ... High frequency applying power source (DC bias applying means), 12
... Switching control unit, 13 ... Light emission monitor, 14 ... Matching circuit,
15, 15a ... Insulating film, 16 ... Silicon (Si) substrate, 17 ... Resist layer, 18 ... Hole, 18a ... Wall surface, 19, 19a, 19b, 19c, 19d ... Polymer, 20 ... Contact hole.

 ─────────────────────────────────────────────────── ─── Continuation of front page (72) Hideaki Higashi 1450, Kamimizuhonmachi, Kodaira-shi, Tokyo Inside the Musashi Plant, Hitachi, Ltd. (72) Masato Sadaoka 1450, Kamimizumoto-cho, Kodaira, Tokyo Hitachi, Ltd. Factory Musashi Factory (72) Inventor Koichiro Kawamura 1479 Kamimizuhonmachi, Kodaira-shi, Tokyo In-house Hitachi Mycro Computer Engineering Co., Ltd. (56) Reference JP-A-57-164986 (JP, A)

Claims (4)

[Claims] 1. A dry etching apparatus capable of independently controlling ion energy is used, and an etching gas for causing deposition and etching is introduced into a vacuum processing space of the apparatus by a DC bias of a predetermined potential as a boundary. An etching method for forming a sloped portion by alternately applying a DC bias higher than the potential and a DC bias lower than the potential. 2. The etching method according to claim 1, wherein the inclined portion is a wall surface of the contact hole of the semiconductor pellet. 3. An etching apparatus in which a plasma forming means and a DC bias applying means can be independently controlled, and a DC bias switching control section is connected to the DC bias applying means. 4. The plasma forming means includes a microwave generator,
The etching apparatus according to claim 3, wherein the etching apparatus comprises a magnetic field generating coil arranged around a vacuum processing space, and the self-bias control means is a high frequency power source.