CN117174583B - Semiconductor structure and preparation method thereof - Google Patents
Semiconductor structure and preparation method thereof Download PDFInfo
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- CN117174583B CN117174583B CN202311446518.3A CN202311446518A CN117174583B CN 117174583 B CN117174583 B CN 117174583B CN 202311446518 A CN202311446518 A CN 202311446518A CN 117174583 B CN117174583 B CN 117174583B
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 41
- 238000002360 preparation method Methods 0.000 title abstract description 9
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- 239000000463 material Substances 0.000 claims abstract description 154
- 239000000758 substrate Substances 0.000 claims abstract description 67
- 238000000034 method Methods 0.000 claims abstract description 46
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- 238000001312 dry etching Methods 0.000 claims abstract description 13
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Abstract
The application relates to the technical field of semiconductors, in particular to a semiconductor structure and a preparation method thereof, wherein the method comprises the following steps: forming a first photoresist material layer on a substrate; dry etching the top surface of the first photoresist material layer to form protruding parts and grooves alternately arranged along the first direction in the first photoresist material layer so as to form a patterned first photoresist layer; forming a second photoresist material layer filled in the grooves and having a top surface higher than the top surface of the protruding part; and patterning the second photoresist material layer and the first photoresist layer to obtain a target patterned photoresist layer exposing part of the substrate. The preparation method can improve the problems of layering, tilting, collapsing and the like among photoresist layers, and can also provide mechanical biting force among the photoresist layers so as to further improve the stability of the multilayer photoresist structure and further improve the overall performance of the product.
Description
Technical Field
The present disclosure relates to semiconductor technology, and in particular, to a semiconductor structure and a method for fabricating the same.
Background
With the increasing of chip performance, the design and manufacturing requirements of different types of photoetching patterns are further improved, and in the semiconductor preparation process with different structures or different performance requirements, the film thicknesses required by the photoetching layers are also different. Part of the photoetching layers need to have larger depth-to-width ratio, and a multilayer spin-on coating mode is generally adopted in the process to obtain the photoetching layers with larger depth-to-width ratio.
However, the photolithography pattern is formed by adopting a multilayer spin coating mode, defects are easily generated in the subsequent development and washing processes, and the product performance and yield are further affected. Accordingly, there is a need to provide a semiconductor structure and a method for fabricating the same that improves the quality of a photolithographic pattern having a larger aspect ratio, thereby improving device performance.
Disclosure of Invention
Based on the foregoing, it is necessary to provide a semiconductor structure and a method for manufacturing the same to improve the quality and stability of the photolithography pattern with a larger aspect ratio, thereby improving the performance of the semiconductor product.
To achieve the above and other related objects, one aspect of the present application provides a method for manufacturing a semiconductor structure, including: forming a first photoresist material layer on a substrate; dry etching the top surface of the first photoresist material layer to form protruding parts and grooves alternately arranged along the first direction in the first photoresist material layer so as to form a patterned first photoresist layer; forming a second photoresist material layer filled in the grooves and having a top surface higher than the top surface of the protruding part; and patterning the second photoresist material layer and the first photoresist layer to obtain a target patterned photoresist layer exposing part of the substrate.
In the method for manufacturing a semiconductor structure in the above embodiment, the first photoresist material layer is dry etched to form the protruding portions and the grooves alternately arranged along the first direction, so as to form a patterned first photoresist layer having a plurality of protruding portions and grooves, and then the second photoresist material layer is formed on the top surface of the patterned first photoresist layer, and fills at least the grooves of the patterned first photoresist layer, thereby improving the contact area between the patterned first photoresist layer and the second photoresist material layer, and further improving the interlayer bonding force. Because the protruding parts and the grooves in the patterned first photoresist layer are alternately arranged, the bonding strength of different positions on the contact surface of the patterned first photoresist layer and the patterned second photoresist layer can be improved, so that the problems of layering or tilting in the patterned first photoresist layer and the patterned second photoresist layer and the like can be solved, and the phenomenon of collapse easily occurring in the subsequent patterning process can be improved. In addition, the structure improves the contact area of the patterned first photoresist layer and the patterned second photoresist material layer, and simultaneously has mechanical biting force between the photoresist layers, so that the stability of the multilayer spin-on-film structure can be further improved, and the overall performance of the product is further improved.
In some of these embodiments, dry etching the top surface of the first photoresist material layer includes: etching a top surface of the first photoresist material layer based on reactive ions selected from the group consisting of oxygen ions, chlorine ions, fluorine ions, and combinations thereof; the reactive ions have a preset incident angle relative to the top surface of the first photoresist material layer.
In some of these embodiments, dry etching the top surface of the first photoresist material layer includes: milling a top surface of the first photoresist material layer based on an ion beam, the ion beam comprising an inert gas ion beam; the inert gas ion beam has a preset incident angle relative to the top surface of the first photoresist material layer.
In some of these embodiments, after forming the second photoresist material layer and before patterning the second photoresist material layer, further comprises: dry etching the top surface of the second photoresist material layer to form protruding parts and grooves alternately arranged along a preset horizontal direction in the second photoresist material layer; the preset horizontal direction is coplanar with the first direction and is parallel or intersected with the first direction; forming a third photoresist material layer filled in the groove and having a top surface higher than the top surface of the protruding part; forming a target patterned photoresist layer, comprising: and patterning the third photoresist material layer, the second photoresist material layer and the patterned first photoresist layer to obtain a target patterned photoresist layer exposing a part of the substrate.
In some of these embodiments, the orthographic projection area of the top surface of the recess on the top surface of the substrate is greater than or equal to the orthographic projection area of the bottom surface of the recess on the top surface of the substrate.
In some of these embodiments, the thickness of the patterned first photoresist layer is greater than the thickness of the second photoresist material layer; the depth of the recess is positively correlated with the thickness of the first photoresist material layer.
In some of these embodiments, forming a first photoresist material layer on a substrate includes: after coating a photoresist material on the top surface of a substrate, baking the photoresist material to obtain a first photoresist material layer; patterning the second photoresist material layer, patterning the first photoresist layer, comprising: exposing the second photoresist material layer and the patterned first photoresist layer; and developing the exposed second photoresist material layer and the patterned first photoresist layer to perform patterning treatment.
According to some embodiments, another aspect of the present application provides a semiconductor structure prepared using the method of any one of the embodiments of the present application. The semiconductor structure comprises sub-photoresist columns which are arranged on the substrate at intervals along the first direction; the sub-photoresist column comprises a second photoresist material layer and a patterned first photoresist layer positioned between the second photoresist material layer and the substrate; the patterned first photoresist layer comprises protruding parts and grooves which are alternately arranged along a first direction; the second photoresist material layer fills the groove and the top surface is higher than the top surface of the protruding part.
In some of these embodiments, the maximum length of the protrusion in the first direction ranges from [ d1+0.05xd2, d1+0.3xd2 ]; where d1 is the minimum pattern size during exposure and d2 is the scribe line size of the substrate.
In some of these embodiments, the maximum length of the groove in the first direction ranges from [0.05×d2,0.1×d2].
The unexpected technical effect of this application is: the patterned first photoresist layer is provided with protruding parts and grooves which are alternately arranged along the first direction, and the second photoresist material layer is connected with the patterned first photoresist layer through the protruding parts and the grooves, so that the contact area is increased, the bonding strength is improved, and the problems of layering, tilting or collapsing and the like caused by stacking of multiple layers of photoresist are solved or avoided; in addition, in the structure, mechanical biting force is also generated between the second photoresist material layer and the patterned first photoresist layer, so that the uniformity and stability of the multilayer photoresist can be improved while the bonding strength is improved, and the product quality is further improved.
Drawings
For a better description and illustration of embodiments and/or examples of those applications disclosed herein, reference may be made to one or more of the accompanying drawings. Additional details or examples used to describe the drawings should not be construed as limiting the scope of any of the disclosed applications, the presently described embodiments and/or examples, and the presently understood best mode of carrying out these applications.
FIG. 1 is a schematic diagram showing various steps in a photoresist coating process according to one embodiment of the present invention;
FIG. 2 is a graph showing the relationship between the photoresist thickness of the first coating and the second coating and the rotation speed of the photoresist coater according to one embodiment of the present application;
fig. 3 is a schematic flow chart of a method for manufacturing a semiconductor structure according to an embodiment of the present disclosure;
FIG. 4 is a schematic cross-sectional view of a first photoresist material layer formed on a substrate according to one embodiment of the present disclosure;
FIG. 5 is a schematic cross-sectional view of a patterned first photoresist layer formed over the structure shown in FIG. 4, as provided in one embodiment of the present application;
FIG. 6 is a schematic cross-sectional view of a patterned first photoresist layer formed over the structure shown in FIG. 4, as provided in another embodiment of the present application;
FIG. 7 is a schematic cross-sectional view of a patterned first photoresist layer formed over the structure shown in FIG. 4, as provided in a further embodiment of the present application;
FIG. 8 is a schematic diagram showing a perspective structure of a reactive ion etching machine according to an embodiment of the present disclosure;
FIG. 9 is a schematic cross-sectional view of a second photoresist material layer formed over the structure shown in FIG. 5, as provided in one embodiment of the present application;
FIG. 10 is a schematic cross-sectional view of a structure for forming a target patterned photoresist layer over the structure shown in FIG. 9, in accordance with one embodiment of the present application.
Reference numerals illustrate:
11. a wafer carrier; 12. a wafer; 13. a surface flushing spray head; 14. a spin-on spray head; 15. a photoetching layer; 16. an edge flushing spray head; 17. a back flushing spray head; 200. a semiconductor structure; 21. a substrate; 22. a first photoresist material layer; 23/23a/23b/23c, patterning the first photoresist layer; 231/231a/231b/231c, protrusions; 232/232a/232b/232c, grooves; 24. a second photoresist material layer; 25. patterning the photoresist layer; 300. a reactive ion etching machine; 31. a vacuum wall; 32. a power electrode; 33. reacting ions; 34. a substrate; 35. etching the reaction chamber.
Detailed Description
In order to facilitate an understanding of the present application, a more complete description of the present application will now be provided with reference to the relevant figures. Preferred embodiments of the present application are shown in the drawings. This application may, however, be embodied in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.
It will be understood that when an element or layer is referred to as being "on," "adjacent," "connected to," or "coupled to" another element or layer, it can be directly on, adjacent, connected, or coupled to the other element or layer, or intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" another element or layer, there are no intervening elements or layers present. It will be understood that, although the terms first, second, third, etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present application.
Spatially relative terms, such as "under," "below," "beneath," "under," "above," "over," and the like, may be used herein for ease of description to describe one element or feature's relationship to another element or feature as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use and operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements or features described as "under" or "beneath" other elements would then be oriented "on" the other elements or features. Thus, the exemplary terms "below" and "under" may include both an upper and a lower orientation. The device may be otherwise oriented (rotated 90 degrees or other orientations) and the spatially relative descriptors used herein interpreted accordingly.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. As used herein, the term "and/or" includes any and all combinations of the associated listed items.
Embodiments of the application are described herein with reference to cross-sectional illustrations that are schematic illustrations of idealized embodiments (and intermediate structures) of the application. In this way, variations from the illustrated shape due to, for example, manufacturing techniques and/or tolerances, are to be expected. Thus, embodiments of the present application should not be limited to the particular shapes of the regions illustrated herein, but rather include deviations in shapes that result, for example, from manufacturing, the regions illustrated in the figures being schematic in nature, and their shapes are not intended to illustrate the actual shape of a region of a device and are not intended to limit the scope of the present application.
Please refer to fig. 1-10. It should be noted that, the illustrations provided in the present embodiment merely illustrate the basic concepts of the application by way of illustration, and only the components related to the application are shown in the illustration, rather than being drawn according to the number, shape and size of the components in actual implementation, and the form, number and proportion of each component in actual implementation may be arbitrarily changed, and the layout of the components may be more complex.
Referring to fig. 1, with the increasing performance of chips, the design and manufacturing requirements for various types of lithography patterns are further increased, and the film thickness requirement can be met by performing one photoresist coating on a conventional lithography layer. In the process of forming the photoresist layer 15, firstly, referring to fig. 1 (a), a wafer 12 is placed on a wafer carrier 11, and the surface of the wafer is rinsed by a surface rinsing nozzle 13 to remove impurities on the surface of the wafer; then, referring to fig. 1 (b), spin coating is performed on the surface of the wafer 12 by using a spin head 14, specifically, when the wafer 12 is stationary, spin coating is performed, and then the rotation of the wafer carrying table 11 is accelerated to spin coating and volatilize the solvent; referring to fig. 1 (c), repeating the steps included in fig. 1 (b) to obtain a photolithography layer 15; referring to fig. 1 (d), after forming the photoresist layer 15, the edge of the photoresist layer 15 is rinsed by an edge rinsing nozzle 16, and the back surface of the wafer 12 is rinsed by a back surface rinsing nozzle 17 to remove the non-uniform photoresist accumulation and impurities at the edge of the wafer. However, when a part of the photoresist layer is subjected to a photolithography process, a pattern with a large aspect ratio needs to be prepared for the purpose of improving the ion implantation resistance, etching resistance and the like of the photoresist. However, since the single photoresist has a certain limit of the film thickness, that is, the thickness range of the photoresist layer 15 formed by one photoresist coating cannot meet the thickness requirement of part of the photoresist pattern, the multilayer photoresist coating method is one of the reliable processes for obtaining the pattern with large aspect ratio.
Referring to fig. 2, the thickness of the adhesive layer is inversely proportional to the spin speed, and it can be seen that, in the case of performing the adhesive coating only once, the thickness of the adhesive layer can reach a, the thickness is limited, if the thickness is required to be increased to B, the second coating is required, and if the thickness of the adhesive layer is required to be increased, the coating times are further increased. Although the aspect ratio of the photoetching pattern can be increased by adopting a multilayer gluing mode, the stability of the pattern structure is obviously reduced due to the increase of the aspect ratio, especially the interface bonding strength and stability between different photoresist layers are poor, and the patterns are easy to generate defects of layering, collapse, inclination, dislocation and the like in the subsequent developing and deionized water flushing processes, so that the performance and the yield of the product are affected.
Based on the technical problems, the application provides a semiconductor structure and a preparation method thereof, so as to improve the quality and stability of a photoetching pattern with a larger depth-to-width ratio and further improve the performance of a semiconductor product.
As an example, the first direction may be an ox direction and the second direction may be an oy direction in the embodiments of the present application.
As an example, referring to fig. 3, an aspect of the present application provides a method for preparing a semiconductor structure, including:
Step S4: forming a first photoresist material layer on a substrate;
step S6: dry etching the top surface of the first photoresist material layer to form protruding parts and grooves alternately arranged along the first direction in the first photoresist material layer so as to form a patterned first photoresist layer;
step S8: forming a second photoresist material layer filled in the grooves and having a top surface higher than the top surface of the protruding part;
step S10: and patterning the second photoresist material layer and the first photoresist layer to obtain a target patterned photoresist layer exposing part of the substrate.
In the method for manufacturing a semiconductor structure in the above embodiment, the first photoresist material layer is etched by dry method to form the protruding portions and the grooves alternately arranged along the first direction, so as to obtain a patterned first photoresist layer with a plurality of protruding portions and grooves, and then the second photoresist material layer is formed on the top surface of the patterned first photoresist layer and at least fills the grooves of the patterned first photoresist layer, so that the contact area between the patterned first photoresist layer and the second photoresist material layer is increased, and the interlayer bonding force is further increased. Because the protruding parts and the grooves in the patterned first photoresist layer are alternately arranged, the bonding strength of different positions on the contact surface of the patterned first photoresist layer and the patterned second photoresist layer can be improved, and therefore the problems of layering, collapsing, tilting, interface debonding and the like of the patterned first photoresist layer and the patterned second photoresist layer are solved. In addition, the structure improves the contact area of the patterned first photoresist layer and the patterned second photoresist material layer, simultaneously introduces mechanical biting force between the photoresist layers, can further improve the stability of the multilayer photoresist structure, and improves the structural stability of the high aspect ratio multilayer photoresist pattern, thereby improving the ion implantation resistance and etching resistance in the subsequent process and further improving the overall performance of the product.
In step S4, referring to step S4 in fig. 3 and fig. 4, a substrate 21 is provided and a first photoresist material layer 22 is formed on the substrate 21, wherein the first photoresist material layer 22 may be a positive photoresist or a negative photoresist. The photoetching process comprises two basic processes, namely negative photoetching and positive photoetching, wherein the negative photoetching is to re-etch a pattern opposite to the pattern on the mask plate on the surface of the substrate 21; positive lithography is the process of imprinting the same pattern as the pattern on the reticle onto the surface of substrate 21.
As an example, the substrate 21 may be formed using a semiconductor material, an insulating material, a conductor material, or any combination thereof. The substrate 21 may have a single-layer structure or a multilayer structure. For example, the substrate 21 may be a substrate such as a silicon (Si) substrate, a silicon germanium (SiGe) substrate, a silicon germanium carbon (SiGeC) substrate, a silicon carbide (SiC) substrate, a gallium arsenide (GaAs) substrate, an indium arsenide (InAs) substrate, an indium phosphide (InP) substrate, or other III/V semiconductor substrate or II/VI semiconductor substrate. Alternatively, and also for example, the substrate 21 may be a layered substrate comprising a material such as Si/SiGe, si/SiC, silicon-on-insulator (SOI), or silicon-germanium-on-insulator. The type of substrate 21 may be selected by those skilled in the art based on the type of transistor formed on substrate 21, and thus, the type of substrate 21 should not limit the scope of the present application. One or more of transistors, word lines, bit lines, etc. may be included within substrate 21.
In step S6, referring to step S6 in fig. 3 and fig. 5, the top surface of the first photoresist material layer 22 is processed based on the target ions to form protrusions 231a and grooves 232a alternately arranged along the first direction (e.g. ox direction) in the first photoresist material layer 22, so as to form a patterned first photoresist layer 23a; the target ions have a predetermined incident angle with respect to the top surface of the substrate 21, so as to selectively etch the top surface of the first photoresist material layer 22 in a direction, thereby forming grooves 232a with the same shape and size and uniformly spaced apart, so as to uniformly improve the roughness of the top surface of the first photoresist material layer 22, and facilitate improving the bonding strength and stability with the adjacent photoresist layers.
As an example, the preset incident angle range is [0 °,180 ° ]. By way of example, the preset incident angle range may be 0 °, 30 °, 90 °, 120 °,180 °, or the like. The preset incidence angle can determine the direction of the opening of the groove and the shape of the groove, the bonding strength effect among the adhesive layers increased by different directions and shapes of the opening of the groove is also different, and different preset incidence angle ranges can be set according to actual process requirements. It should be noted that, the specific preset incident angle of the target ion is not limited in the present application.
As an example, in the present application, the preset incident angle is an angle between the top surface of the first photoresist material layer 22 having the horizontal direction and an incident line formed by the target ions.
As an example, with continued reference to fig. 5, the depth of the recess 232a is positively correlated with the thickness of the first photoresist material layer 22. For example, the depth of the recess 232a may range from 20% to 70% of the thickness of the first photoresist material layer 22. Illustratively, the recess 232a may have a depth of 20%, 30%, 50%, 60%, or 70% of the thickness of the first photoresist material layer 22, etc. It should be noted that, the depth of the groove 232a cannot be shallow or too deep, if the depth of the groove 232a is too shallow, the bonding force between the adhesive layers and the mechanical biting force are reduced, and the requirement of bonding stability of the adhesive layer cannot be met; if the depth of the recess 232a is too deep, the quality of the first photoresist material layer 22 is damaged, so that the first photoresist material layer is loosened or inclined, the etching time is increased, the etching efficiency is reduced, and the material usage amount and the material cost are increased in the subsequent process of forming adjacent photoresist layers. Therefore, the depth of the groove 232a is 20% -70% of the thickness of the first photoresist material layer 22, so that the bonding strength and the bonding stability between different photoresist layers can be improved within a reasonable range.
As an example, the preparation method provided by the application is applicable to all methods for preparing nested structures between glue layers by using ion etching equipment with controllable etching angles, width and depth.
As an example, with continued reference to fig. 5, the orthographic projection area of the top surface of the recess 232a on the top surface of the substrate 21 is greater than or equal to the orthographic projection area of the bottom surface of the recess 232a on the top surface of the substrate 21, so as to ensure that a portion of the material of the second photoresist material layer 24 (see fig. 9) in the recess 232a makes the patterned first photoresist layer 23a tightly connected with the second photoresist material layer 24, has a mechanical snap force, has a greater bonding strength, and makes the multiple photoresist layers less prone to collapse, tilting or breaking.
As an example, with continued reference to fig. 5, it is desirable to ensure that the length of the protrusion 231a in the first direction (e.g., ox direction) is greater than the minimum pattern size during exposure to avoid that the protrusion 231a cannot be developed by effective exposure. The width of the cutting channel has an important influence on the quality of the chip, and the proper width of the cutting channel can ensure that the chip cannot be damaged or cracked in the cutting process, so that the integrity and the reliability of the chip are ensured. In order to improve the dimensional uniformity and quality of the preparation protrusion 231a, a maximum length of the protrusion 231a in the first direction (e.g., ox direction) is set to be in a range of [ d1+0.05xd2, d1+0.3xd2 ]; where d1 is the minimum pattern size during exposure and d2 is the scribe line size of the substrate 21. Since the protruding portions 231a are alternately arranged with the recessed portions 232a, the maximum length of the protruding portions 231a along the first direction (for example, the ox direction) is also the maximum distance between the adjacent recessed portions 232a along the first direction (for example, the ox direction), that is, the maximum distance between the adjacent recessed portions 232a along the first direction (for example, the ox direction) is [ d1+0.05xd2, d1+0.3xd2 ], so that the alternating arrangement of the recessed portions 232a and the protruding portions 231a is ensured, the uniformity and quality of the size of the protruding portions 231a are improved, the biting force between the patterned first photoresist layer 23a and the second photoresist material layer 24 is improved, and the nesting effect of the photoresist layer is improved. For example, the maximum length of the protrusion 231a in the first direction (e.g., ox direction) may be (d1+0.05xd2), (d1+0.1xd2), (d1+0.2xd2), or (d1+0.3xd2), or the like.
As an example, with continued reference to fig. 5, the maximum length of the groove 232a along the first direction (e.g., ox direction) ranges from [0.05×d2,0.1×d2]. Illustratively, the maximum length of the groove 232a in the first direction (e.g., ox direction) may be (0.05×d2), (0.06×d2), (0.08×d2), or (0.1×d2), or the like. The length of the grooves 232a in the first direction (e.g., ox direction) cannot be too large, and if the length of the grooves 232a in the first direction (e.g., ox direction) is too large, the smaller the number of grooves 232a on the top surface of the substrate 21 of the same area, the worse the biting force between the patterned first photoresist layer 23a and the second photoresist material layer 24, and thus the worse the nesting effect. In this application, the shape and length of the groove 232a along the first direction (for example, ox direction) may be set according to the actual process requirement, so as to achieve the optimal nesting effect.
As an example, referring to fig. 6, when the preset incident angle of the target ion is 90 °, an uncontrollable horizontal component of the physical bombardment force of the target ion is avoided, by setting other etching parameters, a groove 232b with an inverted isosceles triangle cross section and extending along the second direction (e.g. the oy direction) can be formed in the first photoresist layer, and the cross section of the protruding portion 231b is isosceles trapezoid, so as to form the patterned first photoresist layer 23b.
As an example, referring to fig. 7, when the preset incident angle of the target ions is 90 °, by other etching parameter settings, a groove 232c and a protrusion 231c with rectangular cross-section may be formed in the first photoresist layer, and the groove 232c extends along the second direction (e.g. the oy direction) to form the patterned first photoresist layer 23c.
It should be noted that, in addition to the shapes of the protruding portion 231 and the groove 232 on the top surface of the patterned first photoresist layer 23 shown in fig. 5 to 7, the protruding portion 231 and the groove 232 may be set to any shape according to the need, and the specific shapes of the protruding portion 231 and the groove 232 are not limited in this application.
As an example, after forming the second photoresist material layer 24 and before patterning the second photoresist material layer 24, further includes:
step S91: dry etching the top surface of the second photoresist material layer to form protruding parts and grooves alternately arranged along a preset horizontal direction in the second photoresist material layer; the preset horizontal direction is coplanar with the first direction and is parallel or intersected with the first direction;
step S92: a third photoresist material layer (not shown) is formed that fills the grooves and has a top surface that is higher than the top surface of the protrusions.
Illustratively, forming the target patterned photoresist layer 25 includes:
Step S11: the third photoresist material layer, the second photoresist material layer 24, and the patterned first photoresist layer 23 are patterned to obtain a target patterned photoresist layer 25 exposing a portion of the substrate 21.
The step S91 and the step S92 may be repeated by a person skilled in the art, and the number of repetitions is not particularly limited and may be determined according to actual requirements.
By way of example, the present application utilizes the principle of direction selective etching, that is, a controllable electric field is disposed near an electrode, such as a cathode, of an etching apparatus, and by adjusting the direction of the electric field, target ions can be directed to the surface of the first photoresist material layer at a certain preset incident angle under a certain working pressure, so as to perform physical or chemical bombardment on the surface of the first photoresist material layer 22, so that etching has good anisotropy.
By way of example, etching equipment that may be employed for the directionally selective etching includes, but is not limited to, reactive ion etchers, grating zone reactive ion beam etchers, and ion milling equipment.
As an example, referring to fig. 8, fig. 8 shows a schematic perspective view of a reactive ion etcher 300 in operation, and in particular, the reactive ion etcher 300 may be a fully automatic reactive ion etcher 300. Dry etching the top surface of the first photoresist material layer 22, comprising: the top surface of the first photoresist material layer 22 is etched based on reactive ions selected from the group consisting of oxygen ions, chloride ions, fluoride ions, and combinations thereof. The reactive ion etching mainly regulates and controls the shape of the nested interface through an electric field structure, can restrict the shape and the distribution intensity of the electric field through a magnetic field, changes the interface bonding shape, such as a regular saw-tooth or rectangular structure, and can selectively etch through any angle, so that the irregular interface bonding shape can be obtained.
As an example, referring to fig. 8, the fully automatic reactive ion etcher 300 can control the etching angle in any angle by adjusting the position of the stage, the shape of the reactive ion beam, and the incident direction, and uses the whole vacuum wall 31 grounded as the anode, the cathode is the power electrode 32, and the side of the cathode has a grounded shield, which can prevent the power electrode 32 from sputtering. Specifically, during the operation of the reactive ion etcher 300, the substrate 34 to be etched is placed on the power electrode 32, in this application, the substrate 34 may be a first photoresist layer on the substrate 21, the etching gas fills the whole etching reaction chamber 35 according to a certain working pressure and a matching proportion, the reactive ion etcher 300 applies a high-frequency electric field greater than a gas breakdown critical value to the etching gas, under the action of the strong electric field, the stray electrons accelerated by the high-frequency electric field undergo random collision and inelastic collision processes with gas molecules or atoms, and continuously excite or ionize the gas molecules to form the reactive ions 33, and the reactive ions 33 may be plasmas. The plasma generated by the inelastic collision has strong chemical activity and can chemically react with atoms on the surface of the first photoetching material layer to form volatile substances so as to achieve the purpose of etching the surface layer of the first photoetching material layer.
As an example, referring to fig. 5-9, in the process of etching the reactive ion 33, the etching gas may be oxygen gas, where the flow rate of the oxygen gas is 1.5sccm,5.5sccm, and the pressure is 2pa,50pa, and the specific etching time depends on the shape and size of the protrusion 231 and the groove 232, and the etching rate. Specifically, the flow rate of oxygen may be 1.5sccm, 2.5sccm, 3.5sccm, 4.5sccm, 5.5sccm, or the like, and the pressure may be 2Pa, 10Pa, 20Pa, 35Pa, 50Pa, or the like.
As an example, with continued reference to fig. 9, dry etching the top surface of the first photoresist material layer 22 includes: the top surface of the first photoresist material layer 22 is milled based on an ion beam, which includes an inert gas ion beam. Ion beam etching, also referred to as ion milling, is also used herein to form the patterned first photoresist layer 23, wherein energy is transferred from incident ions to solid surface atoms when the ions are directed to impinge on the solid target, and surface atoms are removed when the incident ion energy is greater than the surface inter-atomic bonding energy. The ions used for ion beam etching are from inert gas, and the minimum diameter of the beam is about 10nm. Thus, selective ion beam etching can achieve rapid selective etching of microstructures above 10nm.
For example, in milling the top surface of the first photoresist material layer 22, an inert gas, such as argon, may be used as the etching gas, with a vacuum in the range of [10 ] -4 Torr，10 -9 Torr]The ion beam energy range was [0.5KeV,5KeV]The specific etching time depends on the shape and size of the protrusion 231 and the groove 232, the setting of the etching rate, and the like. Specifically, the vacuum degree may be 10 -4 Torr、10 -5 Torr、10 -6 Torr、10 -7 Torr or 10 -9 Torr, etc., the ion beam energy may be 0.5KeV, 1KeV, 2KeV, 3KeV, 5KeV, etc.
As an example, after forming the patterned first photoresist layer in step S6 and before forming the second photoresist material layer in step S8, it may further include:
step S7: the grooves and protrusions formed on the surface of the patterned first photoresist layer are treated, and the treatment process can comprise deionized water flushing, baking and Hexamethyldisilane (HMDS) coating processes, so as to improve the surface condition of the patterned first photoresist layer after etching.
In step S8, referring to step S8 in fig. 3 and fig. 9, a second photoresist material layer 24 is formed on top of the patterned first photoresist layer 23 to fill the recess 232 and to have a top surface higher than the top surface of the protrusion 231. The thickness of the second photoresist material layer 24 is at least greater than the depth of the grooves 232 in the patterned first photoresist layer 23. The second photoresist material layer 24 may be a positive photoresist or a negative photoresist.
As an example, referring to fig. 5-9, the materials of patterned first photoresist layer 23 and second photoresist material layer 24 may be the same or different. When the materials of the patterned first photoresist layer 23 and the second photoresist material layer 24 are different, the present application can solve the problem of critical dimension uniformity of bonding between the photoresist layers of different materials by the double exposure technique.
As an example, with continued reference to fig. 5-9, the thickness of patterned first photoresist layer 23 is greater than the thickness of second photoresist material layer 24. Specifically, the thickness of the second photoresist material layer 24 is 30% -90% of the thickness of the patterned first photoresist layer 23. Specifically, the thickness of the second photoresist material layer 24 may be 30%, 50%, 60%, 80%, 90% or the like of the thickness of the patterned first photoresist layer 23, and it should be noted that the second photoresist material layer 24 needs to ensure that at least the grooves 232 in the patterned first photoresist layer 23 are filled and covered.
As an example, referring to fig. 5 to fig. 9, the semiconductor structure 200 provided in the present application may further include two or more photoresist layers, each photoresist layer is stacked in sequence along the second direction (e.g. the oy direction), and the top of the other photoresist layers except for the top photoresist layer has protruding portions 231 and grooves 232 alternately arranged along the first direction (e.g. the ox direction), and the sizes and shapes of the grooves 232 in different photoresist layers may be the same or different, and the photoresist layers adjacent to the top of the grooves 232 need to be at least filled with the grooves 232. Illustratively, the semiconductor structure 200 provided herein may further include a third photoresist layer, wherein the top surface of the second photoresist material layer 24 has protruding portions 231 and grooves 232 alternately arranged along the first direction (e.g., ox direction), and the third photoresist layer at least fills the grooves 232 in the second photoresist material layer 24.
In the semiconductor structure 200 described in the above embodiment, the problems of delamination, collapse, tilting, interfacial debonding and the like in the photolithography pattern having two or more photoresist layers can be improved, the contact area between each photoresist layer is increased, the mechanical biting force between the photoresist layers is introduced, the stability of the multi-layer photoresist structure can be further improved, the structural stability of the high aspect ratio multi-layer photoresist pattern is improved, and the photolithography pattern with any thickness required in the preparation process of the semiconductor process can be provided, so that the ion implantation resistance and etching resistance in the subsequent process can be improved, and the yield of the semiconductor product can be further improved.
As an example, referring to step S10 in fig. 3 and fig. 10, a first photoresist material layer is formed on a substrate, including: after coating a photoresist material on the top surface of the substrate, baking the photoresist material to obtain a hardened first photoresist material layer; patterning the second photoresist material layer 24 and the first photoresist layer 23 in step S10 includes:
step S101: exposing the second photoresist material layer 24 and the patterned first photoresist layer 23;
step S102: the exposed second photoresist material layer 24 and the patterned first photoresist layer 23 are developed to perform patterning.
In step S101 and step S102, please continue to refer to fig. 10, forming the second photoresist material layer 24 includes baking the photoresist material after coating the photoresist material on the top surface of the patterned first photoresist layer 23, so as to obtain a hardened second photoresist material layer 24. The patterning process may include any shape of pattern required in the actual process, and in this embodiment, the target patterned photoresist layer 25 obtained by the patterning process is a plurality of sub-photoresist columns arranged along a first direction (for example, the ox direction), and a preset gap is formed between adjacent sub-photoresist columns. During the patterning process, there is a nesting structure and mechanical bite between the patterned first photoresist layer 23 and the second photoresist material layer 24. Therefore, in the exposure and development processes, the problems of layering, collapse, inclination, interface debonding and the like of the adhesive layer are avoided, and the efficiency of the graphical processing and the yield of products are improved.
As an example, with continued reference to fig. 5, the maximum length of the protrusion 231a along the first direction (e.g., ox direction) ranges from [ d1+0.05xd2, d1+0.3xd2 ]; where d1 is the minimum pattern size during exposure and d2 is the scribe line size of the substrate 21. Since the protruding portions 231a are alternately arranged with the protruding portions 232a, the maximum length of the protruding portions 231a along the first direction (for example, the ox direction) is also the maximum distance between the adjacent protruding portions 232a along the first direction (for example, the ox direction), that is, the maximum distance between the adjacent protruding portions 232a along the first direction (for example, the ox direction) is [ d1+0.05xd2, d1+0.3xd2 ], so that the alternating arrangement of the protruding portions 231a and the protruding portions 232a is ensured, the biting force between the patterned first photoresist layer 23a and the patterned second photoresist material layer 24 is improved, and the adhesive layer nesting effect is improved. For example, the maximum length of the protrusion 231a in the first direction (e.g., ox direction) may be (d1+0.05xd2), (d1+0.1xd2), (d1+0.2xd2), or (d1+0.3xd2), or the like.
As an example, with continued reference to fig. 5, the maximum length of the groove 232a along the first direction (e.g., ox direction) ranges from [0.05×d2,0.1×d2]. Illustratively, the maximum length of the groove 232a in the first direction (e.g., ox direction) may be (0.05×d2), (0.06×d2), (0.08×d2), or (0.1×d2), or the like. The length of the grooves 232a in the first direction (e.g., ox direction) cannot be too large, and if the length of the grooves 232a in the first direction (e.g., ox direction) is too large, the smaller the number of grooves 232a on the top surface of the substrate 21 of the same area, the worse the biting force between the patterned first photoresist layer 23a and the second photoresist material layer 24, and thus the worse the nesting effect. In this application, the shape and length of the groove 232a along the first direction (for example, ox direction) may be set according to the actual process requirement, so as to achieve the optimal nesting effect.
It should be understood that the steps described are not strictly limited to the order of execution unless explicitly recited herein, and the steps may be executed in other orders. Moreover, at least a portion of the steps described may include multiple sub-steps or stages that are not necessarily performed at the same time, but may be performed at different times, nor does the order in which the sub-steps or stages are performed necessarily occur sequentially, but may be performed alternately or alternately with at least a portion of the sub-steps or stages of other steps or other steps.
As an example, with continued reference to fig. 10, another aspect of the present application provides a semiconductor structure 200 prepared using the method of any one of the embodiments of the present application. The semiconductor structure 200 includes a substrate 21 and a target patterned photoresist layer 25.
In the semiconductor structure 200 of the above embodiment, the target patterned photoresist layer 25 includes a plurality of sub-photoresist columns, and a predetermined gap is formed between adjacent sub-photoresist columns. In each sub-photoresist column, the patterned first photoresist layer 23 has protruding parts 231 and grooves 232 alternately arranged along the first direction (for example, ox direction), and the second photoresist material layer 24 is connected with the patterned first photoresist layer 23 through the protruding parts 231 and the grooves 232, so that the contact area is increased, the bonding strength is increased, and the problems of delamination, inclination or collapse and the like caused by stacking of multiple layers of photoresist are improved or avoided; the structure also has mechanical biting force between adjacent adhesive layers, so that the uniformity and stability of the multilayer photoresist can be improved while the bonding strength is improved, and the product quality is further improved.
In the above semiconductor structure 200 and the method for manufacturing the same, the unexpected technical effects of the present application are: aiming at the problem that glue layers are easy to separate, incline or collapse in a multilayer gluing process, the method constructs grooves 232 with a certain angle and depth on the surface layer of the first photoresist material layer 22 by utilizing an anisotropic target ion etching process so as to obtain a mutually nested regular interface combination structure, and can obtain a pattern with a large depth-to-width ratio of the nested structure of the glue layers after patterning treatment; the scheme can improve the bonding strength and stability among different layers of photoresist, thereby widening the usable film thickness range of the photoresist and improving the ion implantation and etching resistance of the photoetching pattern.
Note that the above embodiments are for illustrative purposes only and are not meant to limit the present application.
In this specification, each embodiment is described in a progressive manner, and each embodiment is mainly described by differences from other embodiments, and identical and similar parts between the embodiments are all enough to be referred to each other.
The technical features of the above-described embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above-described embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The above examples only represent a few embodiments of the present application, which are described in more detail and are not to be construed as limiting the scope of the claims. It should be noted that it would be apparent to those skilled in the art that various modifications and improvements could be made without departing from the spirit of the present application, which would be within the scope of the present application.
Claims (10)
1. A method of fabricating a semiconductor structure, comprising the steps of:
forming a first photoresist material layer on a substrate;
Dry etching the top surface of the first photoresist material layer to form protruding parts and grooves alternately arranged along a first direction parallel to the substrate in the first photoresist material layer so as to form a patterned first photoresist layer; wherein the depth of the recess is positively correlated to the thickness of the first photoresist material layer;
forming a second photoresist material layer which fills the groove and has a top surface higher than the top surface of the protruding part;
patterning the second photoresist material layer and the patterned first photoresist layer to obtain a target patterned photoresist layer exposing a portion of the substrate; wherein the thickness of the patterned first photoresist layer is greater than the thickness of the second photoresist material layer.
2. The method of claim 1, wherein the dry etching the top surface of the first photoresist material layer comprises:
etching a top surface of the first photoresist material layer based on reactive ions selected from the group consisting of oxygen ions, chlorine ions, fluorine ions, and combinations thereof; the reactive ions have a preset incident angle relative to the top surface of the first photoresist material layer.
3. The method of claim 1, wherein the dry etching the top surface of the first photoresist material layer comprises:
milling a top surface of the first photoresist material layer based on an ion beam, the ion beam comprising an inert gas ion beam; the inert gas ion beam has a preset incidence angle relative to the top surface of the first photoresist material layer.
4. The method of manufacturing a semiconductor structure according to any one of claims 1-3, further comprising the steps of, after forming the second photoresist material layer and before patterning the second photoresist material layer:
dry etching the top surface of the second photoresist material layer to form protruding parts and grooves alternately arranged along a preset horizontal direction in the second photoresist material layer; the preset horizontal direction is coplanar with the first direction and is parallel or intersected with the first direction;
forming a third photoresist material layer which fills the groove and has a top surface higher than the top surface of the protruding part;
the step of forming the target patterned photoresist layer comprises the following steps:
and patterning the third photoresist material layer, the second photoresist material layer and the patterned first photoresist layer to obtain a target patterned photoresist layer exposing a part of the substrate.
5. A method of fabricating a semiconductor structure according to any one of claims 1 to 3, wherein the orthographic projection area of the top surface of the recess on the top surface of the substrate is greater than or equal to the orthographic projection area of the bottom surface of the recess on the top surface of the substrate.
6. A method of fabricating a semiconductor structure according to any one of claims 1 to 3, wherein the step of forming the first photoresist material layer on the substrate comprises:
after coating a photoresist material on the top surface of the substrate, baking the photoresist material to obtain the first photoresist material layer;
the patterning the second photoresist material layer and the patterning the first photoresist layer comprises the following steps:
exposing the second photoresist material layer and the patterned first photoresist layer;
and developing the exposed second photoresist material layer and the patterned first photoresist layer to perform the patterning process.
7. A semiconductor structure prepared by the method of any one of claims 1-6; the semiconductor structure comprises sub-photoresist columns which are arranged on a substrate at intervals along a first direction; the sub-photoresist column comprises a second photoresist material layer and a patterned first photoresist layer positioned between the second photoresist material layer and the substrate;
The patterned first photoresist layer comprises protruding parts and grooves which are alternately arranged along a first direction;
the second photoresist material layer fills the groove and the top surface is higher than the top surface of the protruding part.
8. The semiconductor structure of claim 7, wherein a maximum length of the protrusion along the first direction ranges from [ d1+0.05xd2, d1+0.3xd2 ];
where d1 is the minimum pattern size during exposure and d2 is the scribe line size of the substrate.
9. The semiconductor structure of claim 7, wherein a maximum length of the recess along the first direction ranges from [0.05 x d2,0.1 x d2].
10. The semiconductor structure of claim 7, wherein an orthographic projection area of a top surface of the recess on the top surface of the substrate is greater than or equal to an orthographic projection area of a bottom surface of the recess on the top surface of the substrate.
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