JPH0685258A - Thin-film transistor and its manufacture - Google Patents

Abstract

PURPOSE:To obtain a thin-film transistor which is constructed so as to avoid the short-circuit between a polycrystalline silicon film and a gate electrode at the step part of an island-shaped part. CONSTITUTION:A non-single-crystalline semiconductor film 12 which is formed on an insulating substrate 11 so as to have an island shape, a first insulating film 13 formed on the island-shaped non-single-crystalline semiconductor film 12, a second insulating film 21 formed so as to cover the step part of the circumference of the island-shaped part and a gate electrode 14 which is formed on the first insulating film 13 surrounded by the second insulating film 21 are provided. With this constitution, the non-single-crystalline semiconductor (polycrystalline silicon) film is completely insulated from the gate electrode and a short-circuit between the non-single-crystalline semiconductor film and the gate electrode can be avoided.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a thin film transistor using a non-single crystal semiconductor film such as polysilicon and a method of manufacturing the same.

[0002]

2. Description of the Related Art There is a crystallization technique by annealing as a technique for forming a polysilicon (Poly-Si) thin film transistor (TFT) on an insulating substrate such as glass (hereinafter, simply referred to as an insulating substrate). As a method of manufacturing a polysilicon TFT using the crystallization technique by this annealing, Japanese Patent Laid-Open Nos. 3-104209 and 3-289140 are available.
The method disclosed in Japanese Patent Publication is known.

Regarding this technique, the applicant has already applied for a manufacturing method as described below. 7 to 11 are process diagrams illustrating a method of manufacturing a thin film transistor according to the application of the present applicant, in which 10 is an amorphous semiconductor layer, 11 is a glass substrate, and 12 is a polycrystallized semiconductor film (Poly). -Si film: polysilicon film), 13 is a gate insulating film, 14 is a gate electrode, 15 is an interlayer insulating film, 16 is a source diffusion layer, 17 is a drain diffusion layer, 18 is a source electrode, 19 is a drain electrode, and 20 is It is a passivation film which is a protective film. The source diffusion layer 16 and the drain diffusion layer 17 are impurity diffusion layers obtained by implanting ions such as P ⁺ and B ⁺ into a polysilicon film.

First, as shown in FIG. 7A, amorphous Si (a-Si) is deposited as an amorphous semiconductor film 10 on an insulating substrate 11 such as glass by a plasma CVD method. This is annealed by an infrared lamp heater or a laser beam (in the figure, a state of irradiating the laser beam L is shown), and a-Si is converted into a polycrystalline Si (Poly-Si) film 12
Grow to. After this, the gate insulating film (SiO ₂ film) 1
3 is deposited (b).

Since the above steps are performed without breaking the vacuum, the interface between the polycrystalline Si layer 12 and the gate insulating film (SiO ₂ film) 13 is kept clean. Next, as shown in FIG. 8, the two layers of the gate insulating film 13 and the polysilicon film 12 are patterned by an ordinary photolithography method to be formed into an island shape, and the gate electrode 14 is formed on the island portion. Form.

FIG. 9 is an explanatory view of the main part of FIG. 8, in which (a)
Is a top view and (b) is a sectional view taken along line BB ′ of (a). As shown in the figure, the gate electrode 14 is formed by the gate insulating film 13.
It is formed by coating the glass substrate 11 with aluminum, tantalum, titanium, or the like by covering the step of the sidewall from the upper surface of the island-shaped portion.

After forming the gate electrode 14, FIG.
As shown in (a), using the gate electrode 14 as a mask, ions I of P ⁺ , B ^{+ and the} like are implanted to form a source diffusion layer 16 and a drain diffusion layer 17 which are impurity diffusion regions in a self-aligned manner. . On top of this, an interlayer insulating film 15 made of a SiO ₂ film is formed by plasma CVD as shown in FIG.
A film having a thickness of 000 angstrom to 1 μm is deposited, and via holes 16 ′ and 17 ′ are bored in the correlation insulating film 15 and the gate insulating film 13 to make contact with the source diffusion layer 16 and the drain diffusion layer 17. Then, hydrogen plasma treatment is performed to terminate dangling bonds at the semiconductor / gate insulating film boundary with hydrogen to reduce the defect level density.

Finally, as shown in FIG. 11, a film of aluminum is deposited to a thickness of about 1 μm by a sputtering method and patterned to form a source electrode 18 and a drain electrode 19, and a passivation film 20 as a protective film is formed over the whole. Cover and complete the TFT.

[0009]

In the above conventional technique, as shown in FIG. 9B, the gate electrode 1 is used.
4 has a structure in which a short circuit easily occurs due to contact with the polysilicon layer 12 in the step portion descending from the upper surface of the island-shaped portion to the glass substrate 11. There is only a natural oxide film on the side wall of the island-shaped portion of the polysilicon layer 12, and there is a problem that a dielectric breakdown occurs at a voltage of 10 to 20 V applied to the gate electrode 14 during normal operation, resulting in a short state. It was

An object of the present invention is to solve the above-mentioned problems of the prior art, and to provide a thin film transistor having a structure in which the polysilicon film and the gate electrode are not short-circuited at the stepped portion of the island-like portion, and a manufacturing method thereof. Especially.

[0011]

In order to achieve the above object, a thin film transistor according to the present invention comprises a non-single crystal semiconductor film 12 formed in an island shape on an insulating substrate 11 and a non-single crystal semiconductor film having an island shape. The first insulating film 13 formed on
A structure having a second insulating film 21 formed so as to cover a step around the island-shaped portion, and a gate electrode 14 formed on the first insulating film 13 surrounded by the second insulating film. It is characterized by having done.

The present invention also relates to a method of manufacturing the above-mentioned thin film transistor, in which a non-single crystal semiconductor film 1 is formed on an insulating substrate 11.
2, a non-single crystal semiconductor film forming step, and a first amorphous insulating film forming step of forming a first amorphous insulating film 13 serving as a gate insulating film on the non-single crystal semiconductor film 12. An etching step of etching the two layers of the non-single-crystal semiconductor film 12 and the first amorphous insulating film 13 into an island shape with one resist pattern, and a second etching step capable of selectively etching the island-shaped portion. A second amorphous insulating film forming step of covering with the amorphous insulating film 21, and a second amorphous state of etching away the inner upper surface of the second amorphous insulating film 21 excluding the periphery of the island-shaped portion. And a gate electrode forming step of forming a gate electrode 14 on the island-shaped portion of the first amorphous insulating film 13 from which the second amorphous insulating film 21 is removed. It is characterized by including.

The insulating substrate 11 is a glass plate, the non-single crystalline semiconductor film 12 is a polycrystalline Si film obtained by annealing a-Si, and the first amorphous insulating film 13 is a silicon oxide film. It is preferable to use a silicon nitride film (SiN _x ) as the second amorphous insulating film 21, but the second amorphous insulating film 21 is not limited to this.

[0014]

A step around the island-shaped portion composed of the island-shaped non-single-crystal semiconductor film 12 formed on the insulating substrate 11 and the first insulating film 13 formed on the island-shaped non-single-crystal semiconductor film is formed. The non-single-crystal semiconductor film 12 (polysilicon film) is formed by forming the second insulating film 21 so as to cover it and forming the gate electrode 14 on the first insulating film 13 surrounded by the second insulating film. The gate electrode 14 is completely insulated from the gate electrode 14, and a short circuit between the non-single-crystal semiconductor film 12 (polysilicon film) and the gate electrode 14 which occurs in the structure according to the conventional technique is prevented.

[0015]

Embodiments of the present invention will now be described in detail with reference to the drawings. FIG. 1 is a cross-sectional view for explaining the structure of one embodiment of a thin film transistor according to the present invention, where 11 is a glass substrate as an insulating substrate, 12 is a non-single crystal semiconductor film, and 13 is an amorphous film as a first insulating film. Insulating film, 14 a gate electrode, 15 an interlayer insulating film, 16 a source diffusion layer,
17 is a drain diffusion layer, 18 is a source electrode, 19 is a drain electrode, 20 is a passivation film as a protective film, 2
Reference numeral 1 is an amorphous insulating film as a second insulating film.

As shown in the figure, in the thin film transistor of this embodiment, an island-shaped non-single-crystal semiconductor film 12 and an island-shaped non-single-crystal semiconductor film 12 are formed on the insulating substrate 11. No. 1 insulating film 13, a second insulating film 21 formed so as to cover the step around the island-shaped portion, and a gate formed on the first insulating film 13 surrounded by the second insulating film 21. With the structure including the electrode 14, the non-single-crystal semiconductor film 12 (polysilicon film) and the gate electrode 14 are formed.
The short circuit with is prevented.

2 to 6 are thin film transistors according to the present invention.
FIG. 4 is a process diagram illustrating one example of a method for manufacturing a
In the figure, (a) is a sectional view and (b) is a top view. In each figure
Here, 10 is an amorphous semiconductor film, 11 is a glass substrate, 1
2 is a polycrystallized semiconductor film (Poly-Si film: poly
Recon film), 13 is a gate insulating film, 14 is a gate electrode,
Reference numeral 15 is an interlayer insulating film, 16 is a source diffusion layer, and 17 is a drain.
Diffusion layer, 16 'and 17' are via holes, 18 is a source
Electrode, 19 is a drain electrode, and 20 is a passivation film as a protective film.
And 21 is a second insulating film (amorphous insulating film)
It The source diffusion layer 16 and the drain diffusion layer 17 are not
The silicon film is P⁺, B ⁺Impurities implanted with ions such as
It is a diffusion layer.

First, as shown in FIG. 2A, amorphous Si (a-Si) is deposited as an amorphous semiconductor film 10 on an insulating substrate 11 such as glass by a plasma CVD method. This is annealed with a laser beam to grow a-Si on the polycrystalline Si (Poly-Si) film 12. After this,
A gate insulating film (SiO ₂ film) 13 is deposited (b).

Since the above steps are performed without breaking the vacuum, the interface between the polycrystalline Si layer 12 and the gate insulating film (SiO ₂ film) 13 is kept clean. Next, as shown in FIGS. 3A and 3B, the two layers of the gate insulating film 13 and the polysilicon film 12 are patterned by an ordinary photolithography method to be formed into an island shape, and the second insulating film is formed. Plasma CV as 21
D by forming a the SiN _x film to a thickness of 2000 to 5000 angstroms, exposing the first insulating film 13 to the top surface inside of the SiN _x film of the island-shaped portion by photolithography and etching away. FIG. 2B shows that the first insulating film 13 is exposed inside the upper surface of the island-shaped portion while being surrounded by the second insulating film 21.

Then, as shown in FIGS. 4A and 4B, the gate electrode 14 is formed by covering the first insulating film 13 inside the upper surface of the island-shaped portion. (A) is a sectional view,
(B) is a top view of (a), the gate electrode 14 is the second insulating film 21 from the inside of the upper surface of the island portion of the gate insulating film 13
It is formed by depositing aluminum, tantalum, titanium or the like on top.

After the gate electrode 14 is formed, ions I such as P ⁺ and B ⁺ are implanted into a predetermined portion of the polysilicon film 12 by using the gate electrode 14 as a mask, and the source diffusion including an impurity diffusion region is self-aligned. The layer 16 and the drain diffusion layer 17 are formed. After forming the gate electrode 14 as shown in FIGS. 5A and 5B, plasma CVD is performed on the gate electrode 14.
After depositing an interlayer insulating film 15 made of a SiO ₂ film to a thickness of 5000 angstrom to 1 μm, the interlayer insulating film 15 and the gate insulating film 13 are contacted with the source diffusion layer 16 and the drain diffusion layer 17 to make contact with each other. The via holes 16 'and 17' are drilled. Then, hydrogen plasma treatment is performed to terminate dangling bonds at the semiconductor / gate insulating film boundary with hydrogen to reduce the defect level density.

Finally, as shown in FIGS. 6 (a) and 6 (b), aluminum is deposited to a thickness of about 1 μm by a sputtering method and patterned to form a source electrode 18 and a drain electrode 19, and the whole is a protective film. Then, the passivation film 20 is covered to complete the TFT. The thin film transistor manufactured by the manufacturing method described above is the polysilicon film 12 formed in an island shape on the glass substrate 11 and the first insulating film 13 formed on the island-shaped polysilicon film 12.
iO ₂ , SiN _x as the second insulating film 21 formed to cover the step around the island-shaped portion, and the SiO ₂ insulating film 13 surrounded by the SiN _x insulating film 21. With the structure having the gate electrode 14,
A short circuit between the polysilicon film 12 and the gate electrode 14 is prevented.

[0023]

As described above, according to the present invention,
The non-single-crystal semiconductor film 12 formed on the insulating substrate 11 and the first insulating film 13 formed on the island-shaped non-single-crystal semiconductor film 12 are covered with a step around the island-shaped portion
By forming the insulating film 21 of 1., the thin film transistor in which a short circuit does not occur between the gate electrode 14 formed in the first insulating film 13 surrounded by the second insulating film 21 and the non-single-crystal semiconductor film 12. Can be provided.

[Brief description of drawings]

FIG. 1 is a sectional view illustrating a structure of a thin film transistor according to the present invention.

FIG. 2 is a sectional view in a partial process for explaining an example of the method for manufacturing the thin film transistor according to the present invention.

FIG. 3 is a sectional view (a) in a partial process for explaining an embodiment of the method for manufacturing a thin film transistor according to the present invention, and FIG.

FIG. 4A is a sectional view and FIG. 4B is a top view in a partial step for explaining an embodiment of the method of manufacturing a thin film transistor according to the present invention.

FIG. 5 is (a) a cross-sectional view (b) a top view in a partial step for explaining one embodiment of the method of manufacturing a thin film transistor according to the present invention.

FIG. 6A is a sectional view and FIG. 6B is a top view in a partial process for explaining an embodiment of the method of manufacturing the thin film transistor according to the present invention.

FIG. 7 is a partial process diagram illustrating a prior art method of manufacturing a thin film transistor.

FIG. 8 is a partial process diagram illustrating a prior art method of manufacturing a thin film transistor.

FIG. 9A is a top view of a main part in a partial process of FIG. 8 for explaining the prior art of a method of manufacturing a thin film transistor.
FIG.

FIG. 10 is a partial process diagram illustrating the prior art of a method of manufacturing a thin film transistor.

FIG. 11 is a partial process diagram for explaining the prior art of a method of manufacturing a thin film transistor.

[Explanation of symbols]

11 ... Glass substrate as insulating substrate, 12 ...
・ Non-single crystal semiconductor film, 13 ... Amorphous insulating film as first insulating film, 14 ... Gate electrode, 15 ...
.Interlayer insulating film, 16 ... Source diffusion layer, 17 ...
.Drain diffusion layer, 18 ... Source electrode, 19 ...
··· Drain electrode, 20 ···, passivation film as protective film, 21 ···, amorphous insulating film as second insulating film.

Claims (2)

[Claims] 1. A non-single-crystal semiconductor film formed in an island shape on an insulating substrate, a first insulating film formed on the island-shaped non-single-crystal semiconductor film, and a step around the island-shaped portion. And a gate electrode formed on the first insulating film surrounded by the second insulating layer. 2. A non-single crystal semiconductor film forming step of forming a non-single crystal semiconductor film on an insulating substrate, and forming a first amorphous insulating film to be a gate insulating film on the non-single crystal semiconductor film. A step of forming a first amorphous insulating film; an etching step of etching the two layers of the non-single crystal semiconductor film and the first amorphous insulating film into an island shape with one resist pattern; A second amorphous insulating film forming step of covering and covering with a second amorphous insulating film capable of being selectively etched; and etching an inner upper surface of the second amorphous insulating film excluding the periphery of the island-shaped portion. Second amorphous insulating film etching step for removing, and gate electrode formation for forming a gate electrode on the first amorphous insulating film in the island-shaped portion where the second amorphous insulating film is removed A thin film transistor characterized by including at least a step Method.