JPH0684915A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To provide a semiconductor integrated circuit which allows less bus lines to be arranged in a core region, arranges many blocks, etc., in the core region so as to efficiently use the core region and reduces noise on a bus line which connects the blocks. CONSTITUTION:Bus lines 42 which connect blocks 38a, 38b and 38c are overlapped with a power source line 40 which is arranged on an input/output cell region 34 whereupon input/output cells 32 are formed along the periphery.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit constructed by a so-called hierarchical layout method.

[0002]

2. Description of the Related Art When designing the layout of the components of a semiconductor integrated circuit and designing the wiring between these components, the design man-hours increase dramatically with the increase in the scale of the circuit. A hierarchical layout method is adopted, in which a plurality of blocks are assigned to each predetermined function, and the layout and wiring processing of circuit components inside each of the plurality of blocks and the layout and wiring processing between the blocks are performed separately. There are cases.

With reference to FIG. 2, a schematic structure of a conventional semiconductor integrated circuit formed by using the hierarchical layout method will be described. FIG. 2 is a plan view showing a schematic configuration of a conventional semiconductor integrated circuit having three layers of wiring. Semiconductor integrated circuit 10
Is divided into an input / output cell region 14 in which the input / output cells 12 formed along the peripheral portion are arranged and a core region 16 surrounded by the input / output cell region 14, and each of the core regions 16 includes A plurality of blocks 18 constituting a predetermined circuit function
a, 18b, and 18c are arranged adjacent to each other. In each of the blocks 18a, 18b, 18c, signals are transmitted and received by the bus line 20 wired in the core region 16.

[0004]

In the above-mentioned conventional semiconductor integrated circuit, the number of blocks for realizing complicated circuit functions also increases, and the core region is formed by wiring such as bus lines 20 connecting these blocks and other signal lines. The large area above is occupied and the effective utilization of the core region is impaired. Further, noise may occur due to coupling with other signal lines wired in parallel with the bus line 20, and malfunction may occur.

In view of the above circumstances, it is an object of the present invention to provide a semiconductor integrated circuit in which the core region can be effectively used and the malfunction due to the noise of the signal line connecting these blocks is reduced as much as possible.

[0006]

To achieve the above object, a semiconductor integrated circuit of the present invention has an input / output cell region in which input / output cells are formed along a peripheral portion, and wiring is provided on the input / output cell region. A power supply line and / or a ground line, and a core region surrounded by an input / output cell region in which a plurality of blocks constituting each predetermined circuit function are arranged adjacent to each other. Wired over the ground wire,
It is characterized by having a signal line connecting between blocks.

[0007]

In the semiconductor integrated circuit of the present invention, signals are transmitted and received between a plurality of blocks via a signal line such as a bus line at least a part of which is overlapped with a power line and / or a ground line. Be seen. Since these signal lines are laid out in the input / output cell area, if the circuit function of the semiconductor integrated circuit is fixed, a smaller core area will suffice than in the past, and as a result, the size of the semiconductor integrated circuit can be reduced. Can be converted. On the other hand, when the size of the semiconductor integrated circuit is the same as the conventional one, since the signal line that was conventionally wired in the core region is wired in the input / output cell region, more circuit functions can be arranged in the core region. it can.

Further, since at least a part of the signal lines are wired on the power supply line or the ground line whose potential is stable, the power supply line and the ground line have a shielding effect, and other signal lines are used as in the conventional case. The influence between and can be reduced, and malfunction due to noise can be prevented.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, an embodiment of the semiconductor integrated circuit of the present invention will be described with reference to the drawings. FIG. 1 is a plan view showing a schematic configuration of the semiconductor integrated circuit of this embodiment. The semiconductor integrated circuit 30 has an input / output cell region 34 in which a plurality of input / output cells 32 are formed along the peripheral portion of the semiconductor integrated circuit 30.
And a core region 36 surrounded by the input / output cell region 34, and has a three-layer wiring structure.

In the core region 36 of the first layer, a plurality of blocks 38a, 38b, 38c constituting respective predetermined circuit functions are provided.
Are adjacent to each other. Further, an insulating film (not shown) is sandwiched over the input / output cell region 34 of the first layer and the power supply line 4 is provided.
0, the second layer in which the ground wire 41 is wired is formed,
On this second layer, a third layer is formed in which a bus line 42 is wired with an insulating film (not shown) in between. By this bus line 42, a plurality of blocks 38a, 38b,
Signals are transmitted and received between the 38c. Unlike the conventional semiconductor integrated circuit (see FIG. 2), the bus line 42 is not wired in the core region (see FIG. 2), and the bus line 42 above the input / output cell region 34 where nothing has been conventionally used. It is wired. Therefore, when the circuit function of the semiconductor integrated circuit 30 is fixed, the core area can be made narrower than in the conventional case, and the size of the semiconductor integrated circuit can be reduced. On the other hand, when the size of the semiconductor integrated circuit is made the same as the conventional size, the bus wiring that was conventionally wired in the core area was laid in the input / output cell area, so there is an empty space in the core area, and this empty area is further expanded. Many circuit functions can be installed.

Further, since the bus line 42 is laid on the power supply line 40 and the ground line 41 with stable potential, it is not affected by other signal lines as in the conventional case and the influence of noise is prevented. it can. In the above embodiment, the bus line 4
2 is wired to the third layer, but needless to say, is not necessarily the third layer.

[0012]

As described above, according to the present invention, since the blocks are connected to each other in the input / output region and the signal line such as the bus line is arranged, the area of the vacant portion can be effectively used. In addition, the influence of noise can be prevented by wiring the signal wiring so as to overlap the power supply line and the ground line whose potential is stable.

[Brief description of drawings]

FIG. 1 is a plan view showing a schematic configuration of a semiconductor integrated circuit according to an embodiment of the present invention.

FIG. 2 is a plan view showing a schematic configuration of a conventional semiconductor integrated circuit.

[Explanation of symbols]

 30 semiconductor integrated circuit 32 input / output cell 34 input / output cell area 36 core area 38a, 38b, 38c block 40 Al power supply line 42 bus line

Claims (1)

[Claims] 1. An input / output cell region in which input / output cells are formed along a peripheral edge portion, a power supply line and a ground line wired on the input / output cell region, and a plurality of components each forming a predetermined circuit function. In a semiconductor integrated circuit having a core region surrounded by the input / output cell region, the blocks being arranged adjacent to each other, the wiring being overlapped with the power supply line and / or the ground line,
A semiconductor integrated circuit comprising a signal line connecting the blocks.