JPH0684734A - Semiconductor wafer - Google Patents

Semiconductor wafer

Info

Publication number
JPH0684734A
JPH0684734A JP23671492A JP23671492A JPH0684734A JP H0684734 A JPH0684734 A JP H0684734A JP 23671492 A JP23671492 A JP 23671492A JP 23671492 A JP23671492 A JP 23671492A JP H0684734 A JPH0684734 A JP H0684734A
Authority
JP
Japan
Prior art keywords
wafer
semiconductor device
printing
area
laser beam
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP23671492A
Other languages
Japanese (ja)
Other versions
JP2833936B2 (en
Inventor
Kenji Sato
賢治 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Yamagata Ltd
Original Assignee
NEC Yamagata Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Yamagata Ltd filed Critical NEC Yamagata Ltd
Priority to JP4236714A priority Critical patent/JP2833936B2/en
Publication of JPH0684734A publication Critical patent/JPH0684734A/en
Application granted granted Critical
Publication of JP2833936B2 publication Critical patent/JP2833936B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544Marks applied to semiconductor devices or parts
    • H01L2223/54493Peripheral marks on wafers, e.g. orientation flats, notches, lot number

Abstract

PURPOSE:To prevent the breakdown of a semiconductor device by a scattered molten wafer material at the time of laser printing by partially recessing the rear surface of a wafer and using the recessed area as the printing area of recognizing symbols with a laser beam. CONSTITUTION:A recessed section 1 having an arbitrary depth is formed in the orientation flat 3 area of a wafer 2 by grinding or etching the wafer with a grinder or chemical, etc., at the time of machining the wafer 2. The depth of the section 1 is adjusted to the height of a small formed when printing is made with a laser beam. When the depth of the section 1 is set at about 10mum, symbols which are distinctive until the final manufacturing process of a semiconductor device can be printed. Basically, when no semiconductor device is formed on the front surface side of the wafer 2 facing the area 1, a sufficient margin can be obtained. Therefore, even when small are formed when the material of the wafer 2 is melted with a laser beam at the time of printing symbols, the shifting of the pattern of the semiconductor device can be prevented without deteriorating the surface flatness of the water 2.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、半導体装置の製造に用
いる半導体ウェーハに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor wafer used for manufacturing a semiconductor device.

【0002】[0002]

【従来の技術】従来の半導体ウェーハは、数百μmの厚
さに加工されその片面を半導体装置を形成するため鏡面
に研磨し、もう一方の面(裏面)は、半導体ウェーハ
(以降単にウェーハと称す)の平面度を維持する程度の
表面荒さに仕上げられ両面共に平滑な面である。
2. Description of the Related Art A conventional semiconductor wafer is processed to have a thickness of several hundreds of μm, and one surface thereof is mirror-polished to form a semiconductor device, and the other surface (back surface) is a semiconductor wafer (hereinafter simply referred to as a wafer). The surface is smooth enough to maintain the flatness (referred to as) and both surfaces are smooth.

【0003】近年、半導体装置製造の生産合理化によ
り、ウェーハの認識を自動的に行う目的で、ウェーハ表
面(半導体装置を形成する面)の一部にレーザビームに
よる認識記号を印字する方法が用いられている。
In recent years, due to the rationalization of production of semiconductor devices, a method of printing a recognition mark by a laser beam on a part of the wafer surface (the surface on which the semiconductor device is formed) has been used for the purpose of automatically recognizing the wafer. ing.

【0004】この認識記号は、LSIのROMコード切
換えの際の認識等に利用され、CCDカメラによる画像
処理により認識される。従って、明暗や、輪郭がはっき
りしている必要がある。
This recognition symbol is used for recognition when switching the ROM code of the LSI, and is recognized by image processing by the CCD camera. Therefore, it is necessary that the contrast is clear and the contrast is clear.

【0005】[0005]

【発明が解決しようとする課題】この従来のウェーハで
は、レーザによる印字の際、溶融した物質(シリコンウ
ェーハであれば、シリコンや酸化シリコン等)がウェー
ハ表面に飛散し、半導体装置を破壊するために、極く表
面にレーザビーム跡が残る程度に印字される。そのた
め、たびかさなる処理によって印字がかすれ認識が高い
確度で実行できないという問題点があった。
In this conventional wafer, a molten substance (such as silicon or silicon oxide in the case of a silicon wafer) is scattered on the surface of the wafer during printing with a laser, and the semiconductor device is destroyed. In addition, it is printed to such an extent that a laser beam trace remains on the very surface. For this reason, there is a problem in that it is not possible to perform printing recognition with high accuracy due to frequent processing.

【0006】また、ウェーハ裏面に印字すれば、半導体
装置の破壊は防止できるものの、レーザビームによって
溶融した部分が盛り上がるため(数μm)フォトリソグ
ラフィ工程等のウェーハ裏面を吸着固定する場合に、そ
の部分の平面度が悪くなり、パタンがぼけてしまい、半
導体装置が、形成できないといった問題点があった。
(パタン形成の際のマスクパタンのウェーハ表面での結
像の焦点深度が、1μm以下のパタンでは、およそ、2
μm以下程度であるため。)本発明の目的は、半導体ウ
ェーハの認識に用いるレーザ印字によるウェーハ材の溶
融飛散物による半導体装置の破壊防止、およびウェーハ
裏面への印字の際の平面度悪化を防止できる半導体ウェ
ーハを提供することにある。
Further, if the back surface of the wafer is printed, the semiconductor device can be prevented from being destroyed, but the portion melted by the laser beam rises (several μm), so that when the back surface of the wafer is adsorbed and fixed in a photolithography process or the like, that portion is absorbed. However, there is a problem that the semiconductor device cannot be formed because the flatness of the device becomes poor and the pattern is blurred.
(The depth of focus of the image formation of the mask pattern on the wafer surface at the time of pattern formation is about 2 if the depth of focus is 1 μm or less.
Because it is about μm or less. ) An object of the present invention is to provide a semiconductor wafer which can be used for recognition of a semiconductor wafer and can prevent destruction of a semiconductor device due to melted and scattered material of a wafer material by laser printing and prevent deterioration of flatness at the time of printing on the back surface of the wafer. It is in.

【0007】[0007]

【課題を解決するための手段】本発明のウェーハは、裏
面の一部の領域をくぼませ、その領域をレーザビームに
よる認識記号の印字領域とすることを特徴として構成さ
れる。
The wafer of the present invention is characterized in that a partial area of the back surface is recessed and the area is used as a printing area of a recognition symbol by a laser beam.

【0008】[0008]

【実施例】次に本発明について図面を用いて説明する。
図1は、本発明の一実施例のウェーハの裏面正面図およ
びA−A1 部の断面図である。ウェーハのオリエンテー
ションフラット3の領域に任意の深さのくぼみ1はウェ
ーハの加工の際、グラインダーで研磨するか、薬品を用
いたエッチング等により容易に形成できる。また、くぼ
み1の深さは、レーザビームによる印字で盛り上がる高
さに合わせて調整する。半導体装置の製造の最終工程に
至まで、明瞭な印字をするには、10μm程度で良い。
基本的にその領域に対する表面側には、半導体装置を形
成しなけば、余裕を十分にとることができる。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings.
Figure 1 is a cross-sectional view of the back side elevational view of a wafer of an embodiment and A-A 1 part of the present invention. The depression 1 having an arbitrary depth in the area of the orientation flat 3 of the wafer can be easily formed by polishing with a grinder or etching with a chemical when processing the wafer. Further, the depth of the dent 1 is adjusted according to the height that is raised by printing with the laser beam. About 10 μm is required for clear printing even in the final step of manufacturing a semiconductor device.
Basically, if a semiconductor device is not formed on the surface side with respect to the region, a sufficient margin can be secured.

【0009】図2は、オリエンテーションフラット3の
領域全体をくぼませた実施例であり、加工が簡単で同じ
効果が得られる。
FIG. 2 shows an embodiment in which the entire area of the orientation flat 3 is recessed, and the processing is simple and the same effect can be obtained.

【0010】図3は、実際にくぼみ1を形成する工程
と、レーザー印字で認識記号を記入する工程を、半導体
装置製造工程の概略フローで示したものである。くぼみ
の加工歪を除去したり、表面のキズ等の防止の面から、
くぼみを形成する工程は、ウェーハ加工工程が良い。ま
たレーザー印字は、LSIのROMコード切換えの管理
等に一般的に利用され、拡散工程の開始と中間工程で行
われる。
FIG. 3 is a flow chart showing the steps of actually forming the depression 1 and the step of writing a recognition symbol by laser printing in a semiconductor device manufacturing process. From the viewpoint of removing processing distortion of dents and preventing surface scratches,
A wafer processing step is preferable for the step of forming the depression. Laser printing is generally used for controlling ROM code switching of LSI, and is performed at the start of the diffusion process and the intermediate process.

【0011】[0011]

【発明の効果】以上説明したように、本発明は、ウェー
ハの裏面にくぼみ領域を形成し、その部分にレーザー印
字が行えるようにしたので、レーザー印字によるウェー
ハ材の溶融による盛り上がりに対しても、ウェーハ表面
の平面度をそこなうことがなく、半導体装置のパタンく
ずれを防止できる。また裏面利用により、従来、表面へ
の印字を行なうことにより生じるウェーハ材の溶融飛散
物による半導体装置の破壌を防止できるという結果を有
する。
As described above, according to the present invention, the recessed area is formed on the back surface of the wafer, and the laser printing can be performed on the recessed area. In addition, the flatness of the wafer surface is not damaged, and the pattern collapse of the semiconductor device can be prevented. Further, by utilizing the back surface, there is a result that it is possible to prevent the damage of the semiconductor device due to the melted and scattered material of the wafer material, which is conventionally caused by performing the printing on the front surface.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例のウェーハの裏面要部の正面
図およびA−A1 部の断面図である。
FIG. 1 is a front view of a main part of a back surface of a wafer according to an embodiment of the present invention and a cross-sectional view of AA 1 part.

【図2】本発明の他の実施例のウェーハの裏面要部の正
面図およびB−B1 部の断面図である。
FIG. 2 is a front view of a main part of a back surface of a wafer of another embodiment of the present invention and a cross-sectional view of a BB 1 part.

【図3】本発明の形成工程を示す半導体装置の製造フロ
ー概略図である。
FIG. 3 is a schematic manufacturing flow diagram of a semiconductor device showing a forming process of the present invention.

【符号の説明】[Explanation of symbols]

1 くぼみ 2 ウェーハ 3 オリエンテーションフラット 1 dent 2 wafer 3 orientation flat

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 半導体装置のパターンを形成しない面の
一部の領域がくぼんでいることを特徴とする半導体ウェ
ーハ。
1. A semiconductor wafer, wherein a part of a surface of a semiconductor device on which a pattern is not formed is recessed.
JP4236714A 1992-09-04 1992-09-04 Laser marking method for semiconductor wafer Expired - Fee Related JP2833936B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4236714A JP2833936B2 (en) 1992-09-04 1992-09-04 Laser marking method for semiconductor wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4236714A JP2833936B2 (en) 1992-09-04 1992-09-04 Laser marking method for semiconductor wafer

Publications (2)

Publication Number Publication Date
JPH0684734A true JPH0684734A (en) 1994-03-25
JP2833936B2 JP2833936B2 (en) 1998-12-09

Family

ID=17004687

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4236714A Expired - Fee Related JP2833936B2 (en) 1992-09-04 1992-09-04 Laser marking method for semiconductor wafer

Country Status (1)

Country Link
JP (1) JP2833936B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004044630A1 (en) * 2002-11-13 2004-05-27 Nikon Corporation Optical multilayer film filter and method of producing the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004044630A1 (en) * 2002-11-13 2004-05-27 Nikon Corporation Optical multilayer film filter and method of producing the same

Also Published As

Publication number Publication date
JP2833936B2 (en) 1998-12-09

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Effective date: 19980825

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