JPH0683911A - Method and device for determining wiring path - Google Patents

Abstract

PURPOSE:To automatically determine a wiring path in consideration of a bus structure by selecting a group of specific partial paths from a group of partial paths for a wiring object section, setting a wiring permissible area, and search ing for the wiring path in this area. CONSTITUTION:The wiring path whose wiring is already determined is divided into partial paths corresponding to the line length, and its position and line width information is recorded at every group to obtain a signal information table 115 and a partial path table 116. Then one wiring incomplete section is extracted by a wiring object section extracting process 107 and terminal position information is inputted. Then the specific partial path group is selected from the partial path group by a specific partial path selecting process part 109 which makes partial paths adjacent and parallel. Further, a wiring inhibition area generating process part 110 and a wiring permissible area generating process part 111 while inhibiting all wiring paths which are already wired on a wiring grating from being wired set a wiring permissible area outside them. After a wiring object section start point position and an end position are stored in a wiring grating table 118, a wiring path searching process part 112 is actuated to make a wired circuit search.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring route determining method and apparatus, and more particularly to a wiring route suitable for automatically determining a wiring route when forming a wiring pattern such as a logic circuit on a printed circuit board. The present invention relates to a determination method and its device.

[0002]

2. Description of the Related Art In a wiring design automation system for designing wiring on a VLSI or a printed circuit board,
As the performance of logic devices such as computers increases, the need for systems that take into consideration the functional aspects of circuits such as bus wiring is increasing. Among the conventional automatic wiring methods adopted in such a system, the bus wiring structure is taken into consideration as described in 21st Design Automation Conference Procedures, pp. 679-682 (proceedings 21st Design Automation Conference, pp.
679-682) are known. In this type of conventional technique, the layout area of a layout model for VLSI or the like is separated into a layout area for arranging terminals and elements and a wiring area for wiring patterns, and a bus structure is considered. The configuration is adopted. That is, in the two-step wiring based on the channel wiring method, "the net groups belonging to the same bus are assigned to the same wiring area at the time of the rough wiring which is the first step". Then, in the second stage, by performing detailed wiring by the channel wiring method for each wiring area, a bundled wiring path (that is, a wiring path suitable for the bus structure) is generated for the net group belonging to the same bus. It is possible.

On the other hand, in order to achieve the high performance of the logic device and to guarantee the stable operation of the circuit, it is necessary to take various electric characteristic measures especially in the wiring design for the printed circuit board. Of these, what has become particularly important in recent years is a measure against crosstalk noise caused by adjacent parallel wiring patterns in the same wiring layer. Such crosstalk noise is generally generated due to the coupling of electrical energy caused between two or more signal lines wired in parallel. To counter this crosstalk noise, it is necessary to "widen the distance between parallel lines" or "shorten the length of parallel lines". Therefore, in the wiring design automation system for a printed circuit board, with respect to "widening the distance between parallel lines", a general method is to determine the wiring route while adhering to the minimum conductor distance that should be satisfied between two signal lines. Widely adopted. According to this method, even when a pair of wiring patterns are wired in parallel,
Since the distance between the wiring patterns is set to the minimum conductor distance in consideration of crosstalk, sufficient measures can be taken to reduce crosstalk due to the distance between the two parallel wirings. In addition, regarding "shortening the length of parallel lines", 1986 IEE International Conference on Computer
Aged Design Proceedings, No. 250
Pp.-253 (proceedings 1986 IEEE Internationa
l Conference on Computer-Aided Design (ICCAD-86), pp.
250-253). According to this method, a limit value is set for the wiring pattern lengths wired in parallel,
The wiring path for each signal line can be determined within this limit value. As a result, sufficient measures can be taken to reduce crosstalk, which is a problem with the length of parallel wiring. Furthermore, the two methods described above, that is, the method of "widening the distance between parallel lines" and the method of "shortening the length of parallel lines" are generally performed in combination with each other.

[0004]

In the automatic wiring method considering the bus structure among the above conventional techniques, the bus structure is adopted for the layout model such as VLSI whose layout area can be separated into the layout area and the wiring area. A suitable wiring route can be determined. However, in the case of a layout model such as a printed circuit board, the distance between the components mounted on the circuit board is extremely close, and all components cannot be wired unless the component placement area is also used as the wiring area. . Therefore, in such a layout model, it is difficult to divide the layout area into an arrangement area and a wiring area, and when determining the wiring route for each net, the maze method and the line segment search method are used.
You have to do each net independently, and as a result,
It is difficult to determine a wiring route suitable for the bus structure.

Further, in the conventional automatic wiring method in consideration of crosstalk, a wiring path in consideration of crosstalk can be determined between a pair of signal lines that are adjacent to each other and are parallel to each other. . However, in general, between signal lines that are wired in parallel with three or more adjacently,
Since crosstalk noise occurs as a superposition of noises due to the coupling between these wires, a larger crosstalk noise occurs as the number of signal lines wired in parallel increases. As a result, crosstalk noise may not be sufficiently reduced by simply applying the conventional technique. For example, when three signal lines are wired in parallel with each other, even if each signal line is wired while keeping the conductor interval between the signal lines on both sides of the signal line in the middle in consideration of crosstalk, The noise due to the coupling with the signal lines on both sides is superimposed on the signal line of (1) and a large crosstalk noise is generated on the signal line in the middle. 4 more
When the two signal lines are wired in parallel with each other, noise due to the coupling with each signal line is superimposed on the signal lines other than both ends, and large crosstalk noise is generated. This crosstalk noise becomes more remarkable as the operating speed of the target logic device increases.

A first object of the present invention is to provide a wiring route determining method and device capable of determining a wiring route in consideration of a bus structure without depending on a layout model.

A second object of the present invention is to provide a wiring route determining method and apparatus capable of determining a wiring route in which crosstalk noise is taken into consideration for a wiring pattern in which three or more adjacent wirings are wired in parallel. To provide.

[0008]

In order to achieve the above-mentioned object, a first method of the present invention is to specify a wiring target section on a printed circuit board by a plurality of terminals and connect a wiring pattern to the wiring target section. When deciding the wiring route of the wiring pattern by the maze method or the line segment search method, the wiring route of the wiring pattern for which the wiring route has already been determined is divided into a plurality of partial routes according to the line length, and each partial route is divided by the line spacing and the line route. It classifies into multiple groups based on the parallel condition of, stores the position information and line width information of the partial routes belonging to each group, and then inputs the position information about the multiple terminals that identify the wiring target section for which the wiring route has not been determined. Based on the input information and the information on the wiring pattern for which the wiring route is determined, select a terminal group that is near the wiring target section and that belongs to the same bus as the wiring target section from the terminal group for which the wiring path is determined. Then, select the partial route connecting the selected terminals, select the group to which each selected partial route belongs, enter the position information and track width information about the partial route belonging to each selected group, and enter the position information The wiring prohibited area for each partial route is set for each group based on the track width information, and the wiring allowable area that is allowed as the wiring route of the wiring target section is set around each wiring prohibited area, and the wiring allowable area of each group is set. Is set in the wiring route search area, and the wiring route of the wiring pattern is determined within the set wiring route search area. .

As a second method, when the wiring target section on the printed circuit board is specified by a plurality of terminals and the wiring route of the wiring pattern connecting the wiring target sections is determined by the maze method or the line segment search method, the wiring is already performed. The wiring route of the wiring pattern for which the route is determined is divided into a plurality of partial routes according to the line length, and each partial route is classified into multiple groups based on the number of partial routes that satisfy the parallel condition of the line and belongs to each group. The position information of the partial route and the line width information are stored, and then the position information regarding a plurality of terminals that specify the wiring target section whose wiring route is undetermined is input, and this input information and the information regarding the wiring pattern for which the wiring route is determined are used as the basis. Select the terminal group in the vicinity of the wiring target section from the terminal group for which the wiring route is determined, select the partial route connecting the selected terminals, and select the group to which each selected partial route belongs. Position information and line width information about the partial routes belonging to each selected group, and based on the input position information and line width information, the wiring prohibited area for each partial route Set the size according to the number of partial routes that satisfy the above condition, set the area outside each wiring prohibited area as the wiring route search area, and determine the wiring route of the wiring pattern within the set wiring route search area. The characteristic wiring route determination method is adopted.

As a first device, a wiring route determining device for searching a wiring route searching area according to a maze method or a line segment searching method to determine a wiring route of a wiring pattern connecting wiring target sections on a printed circuit board has already been used. A wiring route dividing unit that divides the wiring route of the wiring pattern for which the wiring route is determined into a plurality of partial routes according to the line length, and a plurality of partial routes by dividing the wiring route dividing unit based on the line spacing and the parallel condition of the lines. Classifying means for classifying into groups, storage means for storing position information and track width information of each partial route belonging to the group classified by the classifying means for each group, Wiring is performed based on the terminal information input means for inputting position information regarding terminals, and the input information of the terminal information input means and information regarding the wiring pattern for which the wiring route is determined. A terminal selecting means for selecting a terminal group in the vicinity of the wiring target section and belonging to the same bus as the wiring target section from the terminal group of the route, and selection of the terminal selecting means based on the information on the partial paths stored in the storage means. Partial route selecting means for selecting a partial route connecting terminals, group selecting means for selecting a group to which each partial route belongs by selection of the partial route selecting means based on information about the group stored in the storing means, and group selecting Partial route information input means for inputting position information and line width information on the partial routes belonging to each group selected by the means, and wiring prohibition for each partial route based on the position information and line width information input by the partial route information input means Wiring prohibited area setting means for setting the area for each group, and wiring target section around each wiring prohibited area by the setting of the wiring prohibited area setting means Wiring permissible area setting means for setting a wiring permissible area allowed as a wiring route, and wiring search area setting means for setting a set of wiring permissible areas of each group by the setting of the wiring permissible area setting means to the wiring route search area. The present invention constitutes a wiring route determination device characterized by being provided.

As a second device, a wiring route determination device that searches the wiring route search area according to the maze method or the line segment search method to determine the wiring route of the wiring pattern connecting the wiring target sections on the printed circuit board has already been used. The wiring route dividing means divides the wiring route of the wiring pattern for which the wiring route is determined into a plurality of partial routes according to the line length, and the dividing of the wiring route dividing device based on the number of partial routes satisfying the parallel condition of the line. A classifying unit that classifies each partial route into a plurality of groups, a storage unit that stores, for each group, position information and line width information of each partial route that belongs to the group classified by the classifying unit, and a wiring target section for which a wiring route has not been determined. The terminal information inputting means for inputting positional information on a plurality of terminals for identifying the wiring pattern, the input information of the terminal information inputting means, and the wiring pattern for which the wiring route is determined. Terminal selection means for selecting a terminal group in the vicinity of the wiring target section from the terminal group for which the wiring path is determined based on the information, and the terminal selected by the terminal selection means based on the information about the partial path stored in the storage means. Partial route selecting means for selecting a partial route connecting the routes, group selecting means for selecting a group to which each partial route belongs by selection of the partial route selecting means based on information about the groups stored in the storing means, and group selecting means Partial route information input means for inputting position information and line width information on the partial routes belonging to each selected group, and wiring prohibited area for each partial route based on the position information and line width information input by the partial route information input means Prohibited area setting means for setting the size of each group according to the number of partial routes, and each prohibited wiring area by the setting of the prohibited wiring area setting means It is obtained by constituting the wiring route determining apparatus according to claim that a wiring search area setting means for setting an out-area in the wiring route search region.

[0012]

According to the above-mentioned means, prior to determining the wiring route in consideration of the bus structure by the maze method or the line segment search method, a plurality of wiring routes of the wiring pattern whose wiring route has already been determined are selected according to the line length. The sub-routes are divided into a plurality of groups, and each sub-route is classified into a plurality of groups based on the line spacing and the parallel condition of the lines, and the positional information and the line width information of the sub-routes belonging to each group are stored. After these processes are performed, position information about a plurality of terminals is input to specify the wiring target section, and the wiring route is determined based on this input information and the information about the wiring pattern for which the wiring route is determined. A terminal group that is near the wiring target section and belongs to the same bus as the wiring target section is selected from the terminal group. Then, a partial route connecting the selected terminals is selected, a group to which each selected partial route belongs is selected, and position information and line width information regarding the partial routes belonging to each selected group are input. After that, set the prohibited wiring area for each partial route for each group based on the input position information and line width information, and set the allowable wiring area as the wiring route of the wiring target section around each prohibited wiring area. , A set of wiring allowable areas of each group is set as a wiring route search area. Then, the maze method or the line segment search method is applied in the set wiring route search area to determine the wiring route of the wiring pattern. As a result, the wiring route can be determined in consideration of the bus structure, and the high-density wiring design for the printed circuit board can be easily performed.

Further, prior to determining the wiring route in consideration of crosstalk noise by the maze method or the line segment search method, the wiring route of the wiring pattern whose wiring route has already been determined is divided into a plurality of partial routes according to the line length. Then, each partial route is classified into a plurality of groups based on the number of partial routes satisfying the parallel condition of the line, and the positional information and the line width information of the partial routes belonging to each group are stored. After that, position information about multiple terminals is input to specify the wiring target section, and the wiring target is selected from the terminal group for which the wiring route is determined based on this input information and the information about the wiring pattern for which the wiring route is determined. A terminal group in the vicinity of the section is selected, a partial route connecting the selected terminals is selected, and a group to which each selected partial route belongs is selected. After that, input position information and line width information about the partial routes belonging to each selected group, and based on the input position information and line width information, the wiring prohibited area for each partial route satisfies the line parallel condition for each group. Set the size according to the number of partial routes. That is, when the number of adjacent partial routes is large, the wiring prohibited area for the partial routes is increased. Then, an area outside each of the wiring prohibited areas is set as a wiring path search area, and a maze method or a line segment search method is applied to the set wiring path search area to determine the wiring path of the wiring pattern. As described above, when the number of adjacent wiring paths becomes large, the distance between the wirings is widened. Therefore, the wiring path can be determined in consideration of the crosstalk noise, and the high-speed circuit is mounted. Wiring design for the substrate can be easily performed.

[0014]

【Example】

(First Embodiment) An embodiment of a wiring route automatic determination device to which a wiring route determination method in consideration of a bus structure is applied will be described below with reference to the drawings.

FIG. 1 is a block diagram showing the structure of an automatic wiring route determining apparatus according to the present invention. In FIG. 1, the wiring route automatic determination device includes a computer 101, a board information file 102, a net information file 103, and a wiring pattern information file 104. The computer 101 includes a wiring route determination processing control unit 105, an input processing unit 106, a wiring target section extraction processing unit 107, a partial route group creation update processing unit 108, and a specific partial route group selection processing unit 10.
9, wiring prohibited area creation processing unit 110, wiring allowable area creation processing unit 111, wiring route search processing unit 112, generation route editing processing unit 113, output processing unit 114, signal information table 115, partial route information table 116, wiring target The section management table 117 and the wiring grid information table 118 are provided. The board information file 102 stores information about the structure of the wiring layers of the printed board, such as the size of the board and the number of wiring layers. The net information file 103 stores information about wiring conditions such as pin information for signals and a route width of a wiring pattern for connecting the pins to each other and a minimum conductor interval. In the wiring pattern information file 104, as the information about the wiring pattern, the position information (coordinates) of the wiring route and the information about the position information of the relay hole are stored. Various types of information stored in each of the files 102, 103 and 104 are configured to be exchanged with the computer 101 via the input processing unit 106 and the output processing unit 114. The computer 101 is configured to exchange information with each file to determine a wiring route of a wiring pattern. Each unit of the computer 101 that determines the wiring route of the wiring pattern according to the wiring route determination processing program is configured as follows.

The input processing unit 106 uses the board information file 10
2. Information is read from the net information file 103 and the wiring pattern information file 104, of the read information, information regarding signals is stored in the signal information table 115, and information regarding partial route information is stored in the partial route information table 116. Is configured. The wiring target section extraction processing unit 107 refers to the information in the signal information table 115 and creates predetermined information, for example, information about the start point and end point position information of the wiring target section, the route width, the minimum conductor interval, and the like. Information for wiring target section management table 11
It is designed to be stored in 7. The partial route group creation / update processing unit 108 refers to information in the partial route information table 116, for example, information about the identification of the partial route group and information about the partial route information, and updates the predetermined information in the table. The specific partial route group selection processing unit 109 selects the specific partial route group by referring to the information in the signal information table 115 and the partial route information table 116, and stores the information of the selected partial route group in the wiring target section management table 117. It is supposed to do. The wiring prohibited area creation processing unit 110 creates information on the wiring prohibited area by referring to predetermined information in the partial route information table 116 and the wiring target section management table 117, and creates the information on the created wiring prohibited area on the wiring grid information table. It is designed to be stored in 118. The wiring allowable area creation processing unit 111 inputs information about the wiring prohibited area created by the wiring prohibited area creation processing unit 110, and refers to predetermined information in the wiring target section management table 117 to determine the surrounding area of the wiring prohibited area. The information about the wiring allowable area allowed as the wiring route of the wiring target section is created, and the created information about the wiring allowable area is stored in the wiring grid information table 118.
The wiring route search processing unit 112 uses the wiring grid information table 11
The predetermined information in 8 is referred to and updated, and a process for setting the wiring route search area is performed. The generation route edit processing unit 113 updates the predetermined information in the partial route information table 116 with reference to the search history information and the like in the wiring grid information table 118. The output processing unit 114 uses the partial route information table 1
16 is referred to, and the referred information is output to the pattern information file 104. The activation of each of these units is performed by a command from the wiring route determination processing control unit 105.

Next, the processing procedure of the wiring route determination processing unit 105 will be described with reference to the flowchart of FIG. In FIG. 2, first, the input processing unit 106 is activated to execute the input processing (step 201). In this step, the process of creating all the information in the signal information table 115 and the process of creating the partial route information in the partial route information table 116 are performed. That is, the wiring route of the wiring pattern in which the wiring route has already been determined is divided into a plurality of partial routes according to the line length, and each partial route is classified into a plurality of groups based on the line spacing and the parallel condition of the lines, and is classified. Position information and track width information of each partial route belonging to the group are stored for each group. Next, the wiring target section extraction processing unit 107 is activated to create the signal information table 11
By referring to the predetermined information in 5, one wiring section in which the wiring processing has not been completed is taken out, and the wiring target section management table 1
Information about the start point / end point positions related to the wiring section in 17 is created (step 202). That is, position information regarding a plurality of terminals (pins) that specify a wiring target section whose wiring route is undetermined is input. Further, information on the route width of the wiring pattern connecting the wiring target sections and the minimum conductor interval is created.
After these processes are completed, the wiring process of the wiring target section is executed from step 203 to step 210.

First, in step 203, the partial route group creation / update processing unit 108 is activated, and the partial route information table 1
A process for editing a group of partial routes that are adjacent and parallel to each other among the partial routes by referring to the partial route information in 16 and creating / updating the group identification of the partial routes in this table Do. Specifically, the processing shown in FIGS. 3 and 4 is performed.

First, the partial route that is adjacent to and parallel to the route of each routed net is redivided.
That is, as shown in FIG. 3, a partial route lk (k = 1, 2, ...) In which a wiring route for each routed net is divided at least by a relay hole position or a branch position.
Among them, the adjacent parallel conditions that are wired in parallel with each other are satisfied and the adjacent distance is within the specified value δ, and further, the coordinates of the start point and the end point of the opposing partial paths are separated by the specified value θ or more. For the partial route, the partial route is divided again at an appropriate position where the coordinate difference is within the specified value θ.

Next, the created partial route lk (k = 1,
2, .........), as shown in FIG. 4, “the distance is within the specified value δ, and the difference between the coordinates (end point coordinates) of the start point and the end point of the opposing partial paths is within the specified value θ. Partial routes that are "(adjacent parallel conditions)" are collectively edited for each group. For example, in the case of the partial route shown in FIG.
The wiring route of the nets (A1, A2, A3, A4) is divided into partial routes l1, l2, l3, l4, 15 and the wiring routes of the nets (B1, B2, B3) are partial routes l6, l.
It is divided into 7, 18, and 9. In such a case, the partial route l1 is set to the first group G1 and the partial routes l2 and l6 are set.
To the second group G2, the partial routes l3 and l7 to the third group G3, and the partial routes l4 and 18 to the fourth group G4.
Then, the partial routes l5 and l9 are classified into the fifth group G5.

In the case of FIG. 4B, the partial path l1
To the first group G1, the partial routes 12 and 16 to the second group G2, the partial routes 13 to 17 to the third group G3, the partial route 15 to the fourth group G4, and the partial route 14 to the fifth group. The partial route 19 is classified into G6 and the sixth group G6. When each partial route is classified into a group (group) in this way, each partial route gij belonging to the group Gi of each partial route can always create information on the relationship satisfying the adjacent parallel condition within the distance δ. Also, the group G of partial paths
The deviation between the parallel start position and the parallel end position of each partial path gij belonging to i can be kept within the specified value θ.

Next, in step 204, the specific partial route group selection processing unit 109 is activated, while referring to the predetermined information in the partial route information table 116 and the function identification information for the signal in the signal information table 115. A process for selecting a group of specific partial routes to be adjacently parallel-run is executed by creating group information of partial routes to be adjacently parallel-run provided in the wiring target section management table 117. Specifically, the processing as shown in FIG. 5 is performed. That is, a process of selecting a group of specific partial routes to be adjacently parallel-traveled is performed for a desired wiring section from the group of adjacent partial-routes.

(1) P, P for the wiring section (P, P ')
Wiring section (Q, which is near P'and belongs to the same bus)
Q ') is taken out (however, Q and Q'are the same net).

(2) A partial path gms connecting the wiring sections (Q, Q ') is taken out.

(3) A group Gm = (gmj) of partial routes to which the partial route gms belongs is selected.

For example, in the case of FIG. 5 (a), the wiring section B1 is different from the undetermined wiring sections B1 and B2 of the wiring route.
Wiring sections A2 and A3 are taken out as wiring sections in the vicinity of B2 and belonging to the same bus. And wiring section A
Partial routes g21 and g3 as partial routes connecting 2, A3
Groups G2, G3 and G4 to which 1, g41 belong are selected. Further, in the case of FIG. 5B, the wiring sections B1 and B2 are wiring sections C1 and C2 whose wiring routes are undetermined, which are adjacent to the wiring sections C1 and C2 and belong to the same bus.
2 is taken out. Then, the partial paths g22, g32, g42 connecting the wiring sections B1, B2 are taken out. Furthermore, a group G of partial routes to which these partial routes belong
2, G3 and G4 are selected. Further, in the case of FIG. 5C, the wiring sections b2 and B3 are extracted from the wiring sections c2 and C3 whose wiring route is undetermined. Note that c2 and b2 respectively represent relay holes on the routed route. And the wiring section b
When the partial route g52 connecting the two routes B2 and B3 is taken out, the group G5 to which the partial routes g52 and g51 belong is selected. In this way, the group to which the partial route connecting the wiring target sections belongs is selected. For this reason, in the present embodiment, with respect to the routed routes that belong to the same bus, even if the routed route includes a branch, it is possible to select only the partial routes that are necessary and sufficient for the parallel traveling.

Next, the process proceeds to steps 205 and 206, and after the wiring prohibited area creation processing unit 110 is started, the wiring allowable area creation processing unit 111 is started, and the partial route information table 1
Predetermined information in 16 and wiring target section management table 11
While referring to the predetermined information in 7, the processing for setting the wiring prohibited area and the wiring allowable area on the wiring grid for the line search of the wiring section is executed. That is, as shown in FIG. 6, prior to the route search by the maze method or the line segment search method, at the same time as the setting processing of the wiring prohibited area for all the already-routed routes on the wiring grid, the identification of these already-routed routes is performed. Further, for the group of partial routes of (1), the process of setting the wiring allowable area enlarged by a certain amount outside the wiring prohibited area is executed.

Specifically, as shown in FIG. 6 (a), for example, a group G2 as a group including a specific partial route satisfying the adjacent parallel condition with respect to the wiring sections C1 and C2 whose wiring route has not been determined yet. When G3 and G4 are selected, a specific partial path g
Wiring allowance regions R2, R3, and R4 are set as regions to be adjacently parallel to the groups G2, G3, and G4 including 21, g22, g31, g32, g41, and g42. In this case, for example, regarding the setting of the wiring allowable area R3 for the group G3, two partial paths g31, g belonging to the group G3 are included.
Wiring allowance regions r31 and r32 as regions to be adjacent and parallel to 32 are obtained, and the sum of these regions is set as the wiring allowance region R3. Here, with respect to the partial route g31, the wiring allowable region r31 is determined as a region within a distance α (B) + δ (B, C) + α (C) + d from the center line of the partial route g31. That is, α (B) + δ (B, C) +
The wiring prohibited area represented by α (C) is obtained as an area enlarged by a constant width d. However, α (B): Net (B
1, B2, B3), route width (half width), α (C): route width (half width), net (C1, C2), δ (B,
C): Net (B1, B2, B3) and Net (C1, C
It is the minimum conductor spacing according to 2).

After the wiring allowable area is set, the process proceeds to step 207 to set up the wiring target section. That is, the start point / end point position of the wiring target section is stored in the wiring grid information table 118. After that, the wiring route search processing unit 112 is activated to perform the wiring route search. The route search is performed by the maze method or the line segment search method, and the route search is controlled so that the search from the wiring allowable area Ri is performed preferentially (step 208). Further, the route is executed while avoiding the wiring prohibited area, and the shortest route is searched for in the maze method among the routes that can be parallel to each other, and the route with the minimum number of bends (the route with the minimum number of relay holes) is obtained in the line segment search method. be able to. When the end point of the wiring target section is reached as a result of the route search (step 209), the route from the start point to the end point is stored in the search history information in the wiring grid information table 118, and the generated route editing process is performed based on this information. The unit 113 is activated. Then, in step 210, the information of the wiring route from the start point to the end point is edited, and the partial route information in the partial route information table 116 is updated with the wiring route obtained by this editing.

Such processing is repeated until the processing for all wiring target sections is completed. If it is determined in step 211 that the processing for all the wiring target sections is completed, the output processing unit 114 is activated, and all the obtained wiring routes are set to the wiring pattern information file 114.
, And completes all processing (step 212).

As described above, according to the present embodiment, when the wiring target section is designated, a partial route group satisfying the adjacent parallel condition with the wiring target section is created and specified from the created partial path groups. The partial route group is selected, the wiring prohibited area is created for the selected partial route group, the wiring allowable area is created, and the wiring route is searched in the wiring allowable area. Even if the wiring area cannot be separated, it is possible to automatically determine the wiring path in consideration of the bus structure, and it is possible to prevent a wasteful area from being generated by the wiring path.

(Second Embodiment) A second embodiment of the present invention will be described below with reference to FIG. 7 showing the structure of an automatic wiring route determining apparatus to which a wiring method in consideration of crosstalk is applied.

In FIG. 7, the automatic wiring route determination device comprises a computer 301, a board information file 302, a net information file 303, and a wiring pattern information file 304. The computer 301 includes a wiring route determination processing control unit 305, an input processing unit 306, a wiring target section extraction processing unit 307, a partial route group creation update processing unit 30.
8, partial route group grouping processing unit 309, wiring prohibited area creation processing unit 310, wiring route search processing unit 312, generation route editing processing unit 313, output processing unit 314, signal information table 315, partial route information table 316, wiring The target section management table 317 and the wiring grid information table 318 are provided. The board information file 302 stores information about the configuration of the wiring layers of the printed board, such as the size of the board and the number of wiring layers.
The net information file 303 stores pin information for signals and information about wiring conditions such as a route width for connecting the pins to each other and a minimum conductor interval. Further, the wiring pattern information file 304 stores information about wiring patterns such as position information (coordinates) of wiring routes and position information of relay holes. The computer 301 is configured to exchange information with each information file and determine a wiring path in consideration of crosstalk noise.

The input processing unit 306 uses the board information file 30.
2. Various information is read from the net information file 303 and the wiring pattern information file 304, predetermined information, for example, information about the minimum conductor interval for the signal is stored in the signal information table 315, and information about the partial route information is stored as the partial route information table. The data is stored in 316. The wiring target section extraction processing unit 307 refers to predetermined information in the signal information table 315, for example, pin information for the signal, and stores information about the start point / end point position as information about the wiring target section in the wiring target section management table 317. It is like this. The partial route group creation / update processing unit 308 refers to predetermined information in the partial route information table 316 and updates the predetermined information in this table. Partial route group grouping processing unit 309
Refers to predetermined information in the partial route information table 316, and stores information about a partial route group in which the partial routes according to the number of parallel running wirings are divided into a plurality of groups and stored in the partial route information table 316. There is. The wiring prohibited area creation processing unit 310 uses the partial route information table 316.
And predetermined information in the wiring target section management table 317 are referred to, a wiring prohibited area is created for each group of partial routes according to the number of parallel wirings, and information on the created wiring prohibited area is specified in the wiring grid information table 318. It is designed to be stored in the storage area. The wiring route search processing unit 312 searches for a wiring route while referring to and updating predetermined information in the wiring grid information table 318. The generation route edit processing unit 313 refers to the predetermined information in the wiring grid information table 318 and updates the predetermined information in the partial route information table 316. The output processing unit 314 refers to predetermined information in the partial route information table 316, and stores information regarding the wiring pattern in the pattern information file 304. Each of these processing units is activated in accordance with a command from the wiring route determination processing control unit 305.

Next, the processing procedure of the wiring route determination processing control unit 305 will be described with reference to the flowchart of FIG.

First, the input processing unit 306 is activated to perform input processing (step 401). That is, the process for creating all the information in the signal information table 315 is performed, and the process for creating the partial route information in the partial route information table 316 is performed. That is, the wiring route of the wiring pattern for which the wiring route has already been determined is divided into a plurality of partial routes according to the line length, and each partial route is classified into a plurality of groups based on the line spacing and the parallel condition of the lines and belongs to each group. Position information and track width information of partial routes are stored for each group. Next, the wiring target section extraction processing unit 307 is activated, the predetermined information in the created signal information table 315 is referred to, one wiring section in which the wiring processing is not completed is taken out, and the wiring target section management table 317 is obtained. The information on the start point / end point position related to the wiring section of is created. That is, position information regarding (pins) is input to a plurality of terminals in order to specify a wiring target section whose wiring route has not been determined. Further, information on the minimum conductor interval according to the route width and the number of parallel wirings regarding the wiring route connecting the wiring sections is created (step 402). After these processes are completed, the wiring process of the wiring target section is executed by steps 403 to 410.

First, in step 403, the partial route group creation / update processing unit 308 is activated to activate the partial route information table 3
By referring to the partial route information in 16 and creating / updating the group identification of the partial route in the table 316, the group of the partial routes traveling in parallel in parallel is edited. That is, by the same processing as in step 203 of the above-described embodiment, the partial route is re-divided as shown in FIG. 3 and the partial route editing process is executed as shown in FIG.

Next, in step 404, the partial route group grouping processing unit 309 is activated to activate the partial route information table 3
This table 316 while referring to the predetermined information in
By creating grouping information for the groups of partial routes provided therein, the group of partial routes is classified according to the number of wirings running in parallel. Specifically, as shown in FIG. 9, when the partial routes for the routed net are classified into groups that satisfy the adjacent parallel traveling condition, the partial route g11 belongs to the group G1 and the partial route g2 to the group G2.
1, g22 and g23 belong to the group G3, partial routes g31, g32 and g33 belong to the group G4, partial routes g41 and g42 belong to the group G4 and partial route g5 belongs to the group G5.
1, g52, g53, g54 belong, and the partial route g61 belongs to the group G6. In such a case, the number of partial routes belonging to each group is 1, 3, 3, 2, respectively.
It is 4, 1. Therefore, in this embodiment, a group of these partial routes is classified by the following method.

(1) Classification is made for each group having the same number of wires running in parallel.

(2) Classifying into a group in which the number of wirings that exceed the specified number N and run in parallel and adjacent to each other is N or less and a group in which the number is larger than N.

For example, when the classification method (1) is applied to the group of partial routes shown in FIG. 9 (a), the group of partial routes Gi is (G1, G6), (G4), ( G2, G
It can be classified into 4 groups of 3) and (G5).
Further, when the prescribed number is set to 2 by the classification method (2), the groups of partial routes are (G1, G4, G6), (G2,
G3, G5) can be classified into two groups.

As described above, if the partial route groups are grouped by any of the above-mentioned methods, in determining the wiring route for the desired wiring target section, the minimum conductor interval with the already routed route is not uniquely given, but the already routed It can be given variably according to the number of parallel runnings adjacent to the route. That is, the minimum conductor interval can be widened according to the number of wiring paths, and crosstalk noise can be reduced.

Next, in step 405, the wiring prohibited area creation processing unit 310 is activated, and the partial route information table 31
Predetermined information in 6 and wiring target section management table 317
While referring to the predetermined information in the above, the wiring prohibited area on the wiring grid for the route search of the wiring section is obtained based on the minimum conductor interval according to the number of adjacent parallel running wires, and the information on the wiring prohibited area is wired. It is stored in a predetermined storage area in the lattice information table 318. That is, step 40
With respect to the partial routes divided into the plurality of groups in the process of 4, the process of determining the wiring route is performed while individually controlling the minimum conductor spacing to be held by the wiring route of the wiring target section.

Specifically, as shown in FIG. 10, according to the classification method (2), a group (G1) in which the number of adjacent parallel wirings is 1 or less and a group (G2, G) in which the number of adjacent parallel wirings is 2 or more.
, G4, G5), the minimum conductor spacing is δ for the group (G1) having one or less adjacent parallel wirings.
1 is set, and the number of adjacent parallel wiring lines is 2 or more (G
2, G3, G4, G5), the minimum conductor spacing is δ2.
And set. These minimum conductor intervals δ1 and δ2 depend on the net attribute of the wiring target section and the net attribute of the already routed route, and can be set individually. For example, in the case of FIG. 10, the minimum conductor spacing is δ1 (D, A), δ for the net attribute of the wiring target section (D1, D2) and the net attribute of the already-routed section (A1, A4).
It can be set as 2 (D, A).

Further, in this embodiment, prior to the route search by the maze method or the line segment search method, in the wiring prohibited area setting process for all the existing wiring routes, according to the minimum conductor interval defined for each classified group. The wiring prohibition area is set. For example, for the group G1 in which the number of adjacent parallel wirings is 1 or less, the wiring prohibited area K1 is set according to the minimum conductor spacing δ1, and the group G2, G3, G4, G5 in which the number of adjacent parallel wirings is 2 or more is set. On the other hand, the wiring prohibited areas K2, K3, K4 and K5 are set according to the minimum conductor spacing δ2. Here, each prohibited area Ki is the sum of the wiring prohibited area kij for the partial route gij belonging to each group Gi. Furthermore, regarding the setting of the prohibited area kij for the partial route gij, for example, the wiring prohibited area k11 for the partial route g11 is a distance α (A) from the center line of the partial route.
It can be obtained as a region within + δ1 (A, D) + α (D). However, α (A): Net (A1, A2,
A3, A4) route width (half width), α (D): net (D1, D2) route width (half width), δ1 (A,
D): Net (A1, A2, A3, A4) and Net (D
1, D2) is the minimum conductor spacing when the number of parallel wirings is 1 or less.

The wiring prohibited area k32 for the partial route g32 is a distance α (B) + δ2 from the center line of the partial route.
It can be obtained as a region within (B, D) + α (D). However, α (B): Net (B1, B2, B3)
Route width (half width), α (D): net (D1, D
2) Path width (half width), δ2 (B, D): It is the minimum conductor spacing when the number of parallel wirings for the nets (B1, B2, B3) and the nets (D1, D2) is two or more.

Next, in step 407, the wiring target section is set up. That is, the position information of the start point / end point position of the wiring target section is input, and this position information is stored in the wiring grid information table 318. Then, the wiring route search processing unit 302 is activated to execute the wiring route search (step 408). In this case, the track is searched by the maze method or the line segment search method, and the wiring route is searched while avoiding the wiring prohibited area. That is, the wiring route is searched in the area excluding the wiring prohibited area. As a result of the search of the wiring route, when the end point of the wiring target section is reached (step 40
9), history information regarding the route from the start point to the end point of the wiring target section is stored in the wiring grid information table 318. Then, based on this information, in step 410,
Editing processing of the wiring route from the start point to the end point is performed.
When this edit processing is performed, the generation route edit processing unit 313
Is started, and the partial route information in the partial route information table 316 is updated with the wiring route obtained by the editing process.

Such processing is repeatedly performed until the processing for all wiring target sections is completed. When it is determined in step 411 that all the processing is completed, the output processing unit 314 is activated, the wiring pattern information regarding the wiring route obtained by the above processing is stored in the wiring pattern information file 304, and all the processing is performed. The process ends (step 412).

As described above, according to the present embodiment, the size of the wiring prohibited area is increased according to the number of parallel wirings. Therefore, even in a layout model in which three or more signal lines run in parallel, crosstalk occurs. It is possible to automatically determine the wiring route in consideration of noise, and easily design the wiring of the printed circuit board on which the high speed circuit is mounted.

[0050]

As described above, according to the present invention,
Divide the partial routes that satisfy the adjacent parallel running condition into multiple groups, select a group of specific partial routes that satisfy the adjacent parallel running condition from the group of partial routes for the wiring target section, and select the selected specific partial route It is difficult to separate the placement area from the wiring area because the wiring prohibited area is set for this group, the wiring allowable area is set around this wiring prohibited area, and the wiring route is searched in this wiring allowable area. Even in such a layout model, it is possible to automatically determine the wiring route in consideration of the bus structure, and it is possible to prevent a wasteful area from being generated by the wiring route.

Furthermore, since the size of the wiring prohibited area is set according to the number of adjacent parallel wirings, even in a layout model in which three or more signal lines run in parallel.
The wiring route can be automatically determined in consideration of the crosstalk noise, and the wiring route in which the crosstalk noise is reduced can be determined without deteriorating the wiring accommodation property.

[Brief description of drawings]

FIG. 1 is a block diagram of a wiring route automatic determination device showing a first embodiment of the present invention.

FIG. 2 is a flow chart for explaining the operation of the device shown in FIG.

FIG. 3 is a diagram for explaining a subdivision method of a partial route.

FIG. 4 is a diagram for explaining a method of editing a partial route.

FIG. 5 is a diagram for explaining a method of selecting a group of partial routes.

FIG. 6 is a diagram for explaining a method of setting a wiring prohibited area and a wiring allowable area.

FIG. 7 is a block diagram of a wiring route automatic determination device showing a second embodiment of the present invention.

8 is a flow chart for explaining the operation of the device shown in FIG.

FIG. 9 is a diagram for explaining a method of classifying a partial route group according to the number of wiring lines.

FIG. 10 is a diagram for explaining a method of controlling the minimum conductor spacing according to the number of wiring lines.

[Explanation of symbols]

 101, 301 Computer 102, 302 Board information file 103, 303 Net information file 104, 304 Wiring pattern information file 105, 305 Wiring route determination processing control unit 106, 306 Input processing unit 107, 307 Wiring target section extraction processing unit 108, 308 Partial route group creation / update processing unit 109 Specific partial route group selection processing unit 309 Partial route group grouping processing unit 110, 310 Wiring prohibited area creation processing unit 111 Wiring allowable area creation processing unit 112, 312 Wiring path search processing unit 113, 313 Generation route edit processing unit 114, 314 Output processing unit

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Hiroshi Mochizuki, No. 1 Horiyamashita, Hadano City, Kanagawa Prefecture, Hiritsu Manufacturing Co., Ltd., Kanagawa Factory (72) Jiro Kusuhara, No. 1, Horiyamashita, Hadano City, Kanagawa Prefecture Kanagawa factory

Claims (4)

[Claims] 1. When a wiring target section on a printed circuit board is specified by a plurality of terminals and a wiring route of a wiring pattern connecting the wiring target sections is determined by a maze method or a line segment search method, the wiring route is already determined. The wiring route of the wiring pattern is divided into a plurality of partial routes according to the line length, and each partial route is classified into a plurality of groups based on the line spacing and the parallel condition of the lines,
The position information and line width information of the partial routes belonging to each group are stored, and then the position information regarding a plurality of terminals that specify the wiring target section whose wiring route is undetermined is input, and this input information and the wiring pattern for which the wiring route is determined Based on the information about the wiring route, select a terminal group that is near the wiring target section and that belongs to the same bus as the wiring target section from the terminal group for which the wiring path is determined, and select the partial route connecting the selected terminals. Select the group to which each partial route belongs, enter the position information and line width information about the partial routes that belong to each selected group, and specify the wiring prohibited area for each partial route for each group based on the input position information and line width information. Set a wiring allowable area around each wiring prohibited area as a wiring path for the wiring target section, and search for a set of wiring allowable areas for each group. Was set in the area, the wiring route determining method characterized by determining the routing of the wiring pattern in the wiring route search area set. 2. When the wiring target section on the printed circuit board is specified by a plurality of terminals and the wiring route of the wiring pattern connecting the wiring target sections is determined by the maze method or the line segment search method, the wiring route is already determined. The wiring route of the wiring pattern is divided into multiple partial routes according to the line length, and each partial route is classified into multiple groups based on the number of partial routes that satisfy the parallel condition of the line, and the position of the partial route belonging to each group. Information and line width information are stored, then position information about multiple terminals that specify the wiring target section whose wiring route is undetermined is input, and the wiring route is determined based on this input information and the information about the wiring pattern for which the wiring route is determined. Select the terminal group near the wiring target section from the determined terminal group, select the partial route connecting the selected terminals, select the group to which each selected partial route belongs, and select it. Enter the position information and line width information about the partial routes that belong to each group, and based on the input position information and line width information, the wiring prohibited area for each partial route A wiring route is characterized by setting a size according to the above, setting a region outside each wiring prohibited region as a wiring route search region, and determining the wiring route of the wiring pattern within the set wiring route search region. Method. 3. A wiring route deciding apparatus for deciding a wiring route of a wiring pattern connecting a wiring target section on a printed circuit board by searching a wiring route searching area according to a maze method or a line segment searching method. The wiring route dividing means that divides the wiring route of the generated wiring pattern into a plurality of partial routes according to the line length, and each partial route by dividing the wiring route dividing device is classified into a plurality of groups based on the line spacing and the parallel condition of the lines. Classifying means, storage means for storing the position information and line width information of each partial route belonging to the group classified by the classifying means for each group, and the position information regarding a plurality of terminals for specifying the wiring target section whose wiring route is undecided The wiring route is determined based on the terminal information input means for inputting, and the input information of the terminal information input means and the information about the wiring pattern for which the wiring route is determined. And terminal selection means for selecting a terminal group and belonging to the same bus and wiring target section wiring target section near from the element group,
Partial route selecting means for selecting a partial route connecting terminals by selection of the terminal selecting means based on information about the partial route stored in the storing means, and partial route selecting means based on the information about the group stored in the storing means Group selection means for selecting a group to which each partial route belongs by selecting
Partial route information inputting means for inputting position information and track width information on the partial routes belonging to each group selected by the group selecting means, and for each partial route based on the position information and track width information inputted by the partial route information inputting means Wiring prohibited area setting means for setting the wiring prohibited area for each group, and a wiring allowable area for setting a wiring allowable area allowed as a wiring route of the wiring target section around each wiring prohibited area by the setting of the wiring prohibited area setting means A wiring route determination device comprising: setting means; and wiring search area setting means for setting a set of wiring allowable areas of each group set by the wiring allowable area setting means to a wiring path search area. 4. A wiring route determining device for determining a wiring route of a wiring pattern connecting a wiring target section on a printed circuit board by searching a wiring route search area according to a maze method or a line segment search method, wherein the wiring route is already determined. The wiring route dividing means that divides the wiring route of the formed wiring pattern into a plurality of partial routes according to the line length, and each partial route by dividing the wiring route dividing device based on the number of partial routes that satisfy the parallel condition of the line. A classifying unit that classifies into a plurality of groups, a storage unit that stores position information and line width information of each partial route belonging to the group classified by the classifying unit for each group, and a plurality that specifies a wiring target section whose wiring route is undetermined Terminal information inputting means for inputting position information regarding terminals, and wiring information based on the input information of the terminal information inputting means and information regarding the wiring pattern for which the wiring route is determined. Based on the information about the partial path stored in the storage means and the terminal selection means for selecting the terminal group in the vicinity of the wiring target section from the determined terminal group, the partial path connecting the terminals selected by the terminal selection means Partial route selection means to select,
Group selection means for selecting a group to which each partial route belongs by selection of the partial route selection means based on information about the group stored in the storage means, and position information and lines regarding the partial routes belonging to each group selected by the group selection means Based on the position information and line width information input by the partial route information input unit and the partial route information input unit for inputting width information, the wiring prohibited area for each partial route is set to a size corresponding to the number of partial routes for each group. A wiring route comprising: a wiring prohibited area setting unit for setting; and a wiring search region setting unit for setting a region outside each wiring prohibited region set by the wiring prohibited region setting unit as a wiring route search region. Decision device.