JPH0681501B2 - Switching circuit - Google Patents

Description

TECHNICAL FIELD The present invention relates to a switching circuit in a switching regulator or the like.

In a switching circuit that uses a switching element such as a transistor to switch a load circuit that includes an inductance such as the primary winding of a transformer, it is necessary to protect the switching element from the surge voltage that accompanies the switching. It is also desired to reduce the loss associated with switching of switching elements such as transistors.

[Conventional technology]

In a switching regulator, the current supplied to the primary winding of the transformer is switched by a switching element such as a bipolar transistor or a field effect transistor. A so-called snubber circuit in which a series circuit of a resistor and a capacitor is connected in parallel with the switching element is provided in order to suppress the surge voltage generated when the element is turned off and protect the switching element.

For example, in the conventional half-bridge converter, as shown in FIG. 4, the primary winding of the transformer 37 is controlled by the first and second switching elements 31 and 32 which are controlled to be turned on alternately. An alternating current is made to flow from the DC power supply, and the voltage induced in its secondary winding is rectified and smoothed by a rectifying and smoothing circuit (not shown) to obtain a DC output voltage. A series circuit of capacitors 33 and 34 and resistors 35 and 36 is connected in parallel to the elements 31 and 32, respectively.

In such a configuration, for example, the main switching element
When 31 is turned off, a surge voltage is generated due to the leakage inductance of the transformer 37 and is applied to both ends of the main switching element 31. This surge voltage is applied to the capacitor 33 via the resistor 35, and the charging current flows through the capacitor 33, whereby the surge voltage is suppressed. When the main switching element 31 turns on, the capacitor
The charged charge of 33 will be discharged through the resistor 35.

[Problems to be Solved by the Invention]

In the switching circuit in the switching regulator of the conventional example described above, in order to suppress the surge voltage,
Although a series circuit of capacitors 33 and 34 and resistors 35 and 36 is provided, the capacitors 33 and 34 are charged and discharged for each switching operation of the main switching elements 31 and 32, and the charging / discharging current is the resistance 35, There is a loss because it flows to 36. Therefore, as the switching frequency is increased, the loss increases and the efficiency of the switching regulator decreases.

Therefore, a circuit in which the resistors 35 and 36 are omitted and the charge stored in the capacitors 33 and 34 is transferred to another capacitor using a resonance circuit has been proposed (see, for example, Japanese Patent Application No. 62-164056).
However, since the surge voltage is applied to the capacitors 33 and 34 via the diode and the charge is transferred to other capacitors via the diode, the capacitors 33 and 34
Lead wire for connecting the main switching element 31,3 due to its lead inductance and diode forward recovery characteristics (forward current rising delay characteristics).
The surge voltage applied to 2 could not be reliably suppressed.

If the resistors 35 and 36 are simply omitted,
When the main switching circuits 31 and 32 are turned on, a discharge surge current flows from the capacitors 33 and 34, and the main switching elements 31 and 32 composed of transistors or the like are damaged. Therefore, in FIG. 4, resistors 35 and 36 are connected in series with capacitors 33 and 34.

An object of the present invention is to reduce the loss in the switching circuit including the first and second main switching elements and surely suppress the surge voltage.

[Means for Solving the Problems]

The switching circuit of the present invention controls the first and second sub-switching elements corresponding to the first and second main switching elements to release the charge stored in the surge voltage suppression capacitor. , With reference to FIG.

In order to supply alternating current from the DC power supply to the load circuit 9 including the inductance of the transformer or the like, the main switching elements 1 and 2 each including the first and second transistors are controlled to be turned on alternately. First and second capacitors 3 and 4 connected in parallel, and first and second main switching elements
Connection between the sub switching circuits 5 and 6 consisting of first and second transistors and the like and the first and second main switching circuits 1 and 2 which are controlled to turn on immediately before turning on the first and second Inductance connected between the point and the connection point of the first and second sub-switching elements 5 and 6 to release the charge stored in the first and second capacitors 3 and 4 by the resonance half cycle current. 7 and the third capacitor 8 and the first and second diodes D1 and D2 connected so as to flow the resonance half cycle current.
It consists of The diodes D3 and D4 can be parasitic diodes when the first and second main switching elements 1 and 2 are composed of field effect transistors or the like.

[Action]

When the first main switching element 1 is turned on,
The current direction to the load circuit 9 when the main switching element 2 is turned on is reversed, and an alternating current can be supplied to the load circuit 9. FIG. 2 is an operation explanatory view showing an example of the waveforms of the voltage and current of each part in FIG. 1, (a) is the terminal voltage of the second capacitor 4, (b) is the current flowing in the inductance 7, and (c) is ) Is the terminal voltage of the third capacitor 8, (d) is the second sub-switching element 6, (e) is the second main switching element 2, (f) is the first sub-switching element 5, (g). Shows ON and OFF operations of the first main switching element 1, respectively.

After the switching elements 1, 2, 5, 6 are turned off, when the second sub-switching element 6 is turned on as shown in (d) at time t1, the second capacitor 4, the inductance 7, and the third A series resonance circuit with the capacitor 8 is formed, (b)
The resonance current shown in FIG. 6 flows, the charge stored in the second capacitor 4 is transferred to the third capacitor 8, and the terminal voltage of the second capacitor 4 becomes 0 V at time t2 as shown in (a). .

Then, since the resonance current that continues to flow after time t2 passes through the diode 11, the second capacitor 4
The terminal voltage of will be maintained at 0V. The terminal voltage of the third capacitor 8 has the opposite polarity at time t3, as shown in (c). After time t3, the resonance is terminated by the reverse current blocking diode D2, and the potential of the third capacitor 8 is held constant. That is, the charge charged in the second capacitor 4 is transferred to the third capacitor 8 using the resonance half cycle current.

Therefore, when the second main switching element 2 is turned on as shown in (e) after time t2, the second capacitor 4
Since the charging charge of is zero, the discharge surge voltage does not flow. The second sub switching element 6 is turned off from the time t3 to t4 after the second main switching element 2 is turned on.

Then, when the second main switching element 2 is turned off at the time t4, the charge stored in the second capacitor 4 is 0, so that even if a surge voltage occurs, it can be surely suppressed.

Further, when the first sub-switching element 5 is turned on at time t5, a series resonance circuit of the first diode 3, the inductance 7 and the third capacitor 8 is formed, and the resonance current flowing between times t1 and t3 is generated. In the opposite direction, as shown in (b), a resonance current flows between time t5 and time t7, and this resonance current reaches its maximum at time t6.
As at t2, the terminal voltage drops to 0V and the diode 10 blocks the polarity reversal of that terminal voltage. The terminal voltage of the third capacitor 8 is also the time as shown in (c).
Reverse polarity at t7, reverse current blocking diode D1
As a result, resonance ends and the potential is held constant. Therefore, the discharge surge current does not flow even if the first main switching element 1 is turned on after the time t6. Another time t5
Then, by turning on the first sub switching element 5, the potential at the connection point of the first and second main switching elements 1 and 2 rises, and the terminal voltage of the second capacitor 4 becomes (a). Rise as shown.

Further, the surge voltage when the first main switching element 1 is turned off at time t8 is suppressed by the first capacitor 3, and the contact between the first and second main switching elements 1 and 2 is made. Since the potential at the point has the opposite polarity to the potential due to the surge voltage after time t4, the terminal voltage of the second capacitor 4 temporarily drops as shown in (a).

Therefore, by transferring the charge stored in the capacitors 3 and 4 connected in parallel to the main switching elements 1 and 2 to the third capacitor 8 using the resonant half-cycle current, the surge voltage can be reliably applied to the capacitors 3 and 4. It is possible to suppress and to eliminate loss due to charge and discharge.

〔Example〕

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 3 is a circuit diagram of an essential part of an embodiment of the present invention. Reference numerals 11 and 12 are n-channel field effect transistors corresponding to the first and second main switching elements 1 and 2, and 13 and 14 are first and first. Capacitors corresponding to the second capacitors 3 and 4, 15 and 16 are n-channel field effect transistors corresponding to the first and second sub switching elements 5 and 6, 17 is an inductance corresponding to the inductance 7, and 18 is a third Capacitor corresponding to the capacitor 8,
Reference numeral 19 is a transformer corresponding to the load circuit 9. Further, 20 and 21 are parasitic diodes of the field effect transistors 11 and 12, 22 and 23 are parasitic capacitors of the field effect transistors 11 and 12, 24 is a control circuit, 25 and 26 are rectifying diodes, and 27 and 28 are smoothing diodes. Choke coils and capacitors, 29 and 30 are reverse current blocking diodes.

This embodiment shows a case where it is applied to a half-bridge converter, the field effect transistors 11 and 12 are controlled by the control circuit 24 so as to be alternately turned on, and the primary winding of the transformer 19 is supplied from a DC power source or an AC source. An alternating current is supplied from the rectified output voltage of the power source, the voltage induced in the secondary winding is rectified by the diodes 25 and 26, smoothed by the inductance 27 and the capacitor 28, and becomes a DC output voltage. This DC output voltage is compared with a set value by the control circuit 24, and the ON periods of the field effect transistors 11 and 12 are controlled so that the DC output voltage becomes constant.

The capacitors 13 and 14 are respectively the field effect transistor 1
Directly connect between the drain and source of 1,12, that is, with the lead wire as short as possible. Further, the control circuit 24 includes a comparison circuit, a delay circuit, a pulse sub-control circuit, etc., and when the field effect transistor 11 is turned on, controls the field effect transistor 15 to be turned on immediately before the field effect transistor 11 is turned on. When turning on the transistor 12,
Immediately before that, the field effect transistor 16 is controlled to be turned on.

For example, immediately before turning on the field effect transistor 12,
The field effect transistor 16 is set to, for example, time t1 in FIG.
When turned on, a series resonance circuit of capacitor 14, inductance 17 and capacitor 18 is formed,
2 is transferred to the capacitor 18 by the resonance current as shown in FIG. 2 (b), and the terminal voltage of the capacitor 14 becomes 0V at time t2.

When the terminal voltage of such a capacitor 14 becomes 0 V, the resonance current after that flows through the parasitic diode 21 of the field effect transistor 12, so the terminal voltage of the capacitor 14 becomes
It remains at 0V. That is, the charged electric charge is completely discharged.

Then, when the field effect transistor 12 is turned on after the time t2, a current is supplied from the DC power supply to the primary winding of the transformer 19. At that time, since the charge charged in the capacitor 14 is 0, no discharge surge current flows. Further, since the resonance current ends with a half wave due to the diode 30, it suffices to turn off the field effect transistor 16 during the time t4 at the time t3. When the field effect transistor 12 is turned off at time t4 in FIG. 2, a surge voltage is generated due to the leakage inductance of the transformer 19 and the surge voltage is applied to the capacitor 14 and suppressed.

Next, when the field effect transistor 15 is turned on at time t5 in FIG. 2 immediately before the field effect transistor 11 is turned on, a series resonance circuit of the capacitor 13, the inductance 17 and the capacitor 18 is formed. Since the polarities of the terminal voltage of the capacitor 13 and the terminal voltage of the capacitor 18 are the same in the series resonance circuit, a resonance current flows and the charge charged in the capacitor 13 is transferred to the capacitor 18,
When the terminal voltage of 13 becomes 0V, the resonance current after that flows through the parasitic diode 20 and the resonance current ends in half wave by the diode 29.
It remains at 0V. That is, the charge of the capacitor 13 is completely discharged. Further, the terminal voltage of the capacitor 18 has the opposite polarity as shown in FIG.

When the field effect transistor 11 is turned on after the time t6 in FIG. 2 in which the terminal voltage of the capacitor 13 becomes 0V,
Since the charging charge of the capacitor 13 is 0, no discharge surge current flows. In addition, a current is supplied to the primary winding of the transformer 19 from the DC power source in the direction opposite to that when the field effect transistor 12 is turned on. That is, the field effect transistors 11 and 12
By alternately turning on, the alternating current can be supplied to the primary winding of the transformer 19. When the field effect transistor 11 is turned off at time t8 in FIG. 2, the surge voltage generated by the leakage inductance of the transformer 19 is added to the capacitor 13 and suppressed.

By repeating the above operation, the field effect transistors 11 and 12 are alternately turned on, and the surge voltage generated when the alternating current is supplied to the primary winding of the transformer 19 can be suppressed by the capacitors 13 and 14. Further, although the above-mentioned embodiment shows the case where it is applied to the half-bridge converter, it can also be applied to the full-bridge converter. When a switching element having no parasitic diodes 20 and 21 is used, the diodes D3 and D4 are connected in parallel with the capacitors 13 and 14, as shown in FIG.

〔The invention's effect〕

As described above, in the present invention, the first and second main switching elements 1 and 2 are connected in parallel to the first and second main switching elements 1 and 2, and the first and second main switching elements 1 and 2 are connected. 2 connection points and
A series circuit of an inductance 7 and a third capacitor 8 is connected between the connection point of the first and second sub switching elements 5 and 6 to turn on the first and second main switching elements 1 and 2. Then, immediately before, the first and second sub-switching elements 5 and 6 are turned on, and the charge stored in the first and second capacitors 3 and 4 is transferred to the series resonance circuit including the inductance 7 and the third capacitor 8. It is transferred to the third capacitor 8 by the resonance half cycle current, and since the first and second capacitors 3 and 4 can be directly connected to the first and second main switching elements 1 and 2, Since the loss due to the resistance does not occur and the suppression delay of the surge voltage due to the lead inductance and the forward recovery characteristic of the diode does not occur, the surge voltage can be surely suppressed without lowering the power efficiency. There are advantages.

Therefore, it can be applied to a switching circuit such as a switching regulator and the size of the device can be easily reduced by increasing the switching frequency.

[Brief description of drawings]

FIG. 1 is a diagram for explaining the principle of the present invention, FIG. 2 is a diagram for explaining the operation of the present invention, FIG. 3 is a circuit diagram of essential parts of an embodiment of the present invention, and FIG. 4 is a circuit diagram of essential parts of a conventional example. . 1, 2 are first and second main switching elements, 3, 4 are first and second capacitors, 5 and 6 are first and second sub switching elements, 7
Is an inductance, 8 is a third capacitor, 9 is a load circuit, and D1 and D2 are first and second diodes.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP 64-12865 (JP, A) JP 62-2858 (JP, A) JP 55-141971 (JP, A) Actual development 54- 150847 (JP, U)

Claims (1)

[Claims] 1. A switching circuit for supplying an alternating current to a load circuit (9) including an inductance by means of first and second main switching elements (1), (2) controlled to be turned on alternately. Where the first and second main switching elements (1) and (2) are respectively connected in parallel to the first and second capacitors (3),
(4) and the first and second main switching elements (1) and (2) are controlled to be turned on immediately before they are turned on.
1, a second sub-switching element (5), (6), a connection point between the first and second main switching elements (1), (2), and a first and a second sub-switching element ( 5),
An inductance (7) and a third capacitor connected between the connection point (6) and for discharging the charge stored in the first and second capacitors (3) and (4) by a resonance half-cycle current. (8) and the first and second sub-switching elements (5) and (6) connected in series so as to flow the resonant half-cycle current.
A switching circuit comprising a second reverse current blocking diode (D1), (D2).