JPH0681000B2 - Gain control circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Outline] In a gain control circuit in which a feedback loop of a variable gain amplifier circuit is composed of a plurality of switches and a resistor array, and the switches are opened / closed by a control signal, a control signal for turning on the switch. The control signal to be turned off is given a time difference to enhance the stability of the variable gain amplifier circuit.

[Industrial application field]

The present invention relates to a gain control circuit of a variable gain amplifier circuit used in a communication device or the like, and more particularly to a gain control circuit of a variable gain amplifier circuit using a plurality of switches and a resistor string in a feedback loop of the amplifier circuit. Is.

In the above-mentioned conventional gain control circuit, there is a moment that all the switches used are turned off, which causes a drawback that the variable gain amplifier circuit may enter an unstable region. There was a strong demand for improvement.

[Conventional technology]

 FIG. 4 is a diagram showing an example of a conventional gain control circuit.

In the figure, 1 is an amplifier circuit, 2a to 2n are resistors, 3a to 3n are switches, and 4a to 4n are control signals. The same symbols represent the same objects throughout the drawings.

As shown in FIG. 4, the gain control circuit of the conventional variable gain amplifier selects the resistors 2a to 2n by opening / closing the switches 3a to 3n by the control signals 4a to 4n, and the feedback resistor is changed to change the amplification circuit 1 Is controlling the gain of.

[Problems to be solved by the invention]

However, when the gain of the amplifier circuit 1 is controlled by the control signals 4a to 4n in the gain control circuit, the switches 3a to 3n are used.
There may be a time lag in the switching signal of.

5 (a) to (c) are explanatory diagrams of the operation of FIG.

That is, FIG. 5 (a) shows the waveform of the control signal 4a, and FIG. 5 (b) shows the waveform of the control signal 4b. As is clear from the figure, if there is a time lag between the two waveforms, the contact of any switch will be in the off state, the feedback loop will be open, and the output of the amplifier circuit 1 will be as shown in FIG. It becomes unstable as shown in (c).

Therefore, even if the switch 3b is closed and in the normal state, the amplifier circuit 1 continues in this unstable state, and it takes time to stabilize.

Therefore, there is a drawback that the gain cannot be switched at high speed and accurately.

An object of the present invention is to change the operating speed depending on whether the switch that sets the gain is turned on or off when the switch turns on and off, and always close the feedback loop of the amplifier circuit to obtain a stable gain at high speed. It is to provide a gain control circuit that enables switching.

[Means for solving problems]

 FIG. 1 is a principle diagram of the present invention.

As shown in FIG. 1, the switching control circuit 5 first sends the control signals 4a to 4n.
Of the control signals 4a to 4n in the switching control circuit 5, the control signal to turn on the switch is immediately input to the switch 3a to 4n.
The control signal input to 3n and turning off the switch is achieved by inputting to switches 3a to 3n after delaying for a certain time.

[Action]

According to the present invention, each control signal is input to the switching control circuit, the control signal for turning on the switch is immediately input to the switch,
Since the control signal for turning off the switch is input to the switch after a delay of a certain time, the state in which none of the switches is open does not occur, so that the variable gain amplifier circuit operates stably and at high speed.

〔Example〕

 FIG. 2 is a diagram showing an embodiment of the present invention.

FIG. 3 is an operation explanatory diagram of the present invention.

In the figure, 30a to 30d are switch circuits, 31a to 31d are D circuits, respectively.
Type flip-flops, 32a-32d are delay circuits, and 33a-3
Each 3d is an OR circuit.

It is assumed that one switch circuit 30a according to the present invention comprises a D-type flip-flop 31a, a delay circuit 32a, and an OR circuit 33a, and the control signals 4a-4d are synchronized by the clock CLK.

The switching control circuit 5 includes four sets of switch circuits 30a, 30b, 30c.
And d.

The example shown in FIG. 2 will be described for the case of four sets of switches and resistor arrays (a, b, c and d) for simplification of description, but it is not always necessary to stick to four.

Now, the switch control will be described for the case where the switch circuit 30a is turned on → off and the switch circuit 30b is turned off → on.

FIG. 3 (a) shows the waveform of the control signal 4a, and FIG. 3 (b) shows the waveform of the control signal 4b, both of which are synchronized with the clock CLK shown in FIG. 3 (c).

However, it is assumed that the control signal 4a and the control signal 4b are deviated by Δt.

The control signal 4a having such a time relationship is the switch circuit 30a.
And the control signal 4b is input to the switch circuit 30b.

When the control signal 4a (ON → OFF) shown in FIG. 3 (a) enters the switch circuit 30a, the D-type flip-flop 31a is turned off in synchronization with the clock CLK shown in FIG. 3 (c), but there is a delay. Since the circuit 32a continues to be in the on state, the output of the OR circuit 33a continues to be in the on state as shown in FIG. 3 (d), and turns off when the delay time of the delay circuit 32a elapses.

When the control signal 4b (OFF → ON) shown in FIG. 3B enters the switch circuit 30b, the D-type flip-flop 31b is turned ON in synchronization with the clock CLK shown in FIG.
It immediately turns on as shown in FIG.

Therefore, a stable output waveform of the amplifier circuit as shown in FIG. 3 (f) can be obtained. That is, although both switches may be turned on, it is possible to avoid a situation in which both switches are turned off.

This is because the control signal is re-clutched once, so that it is possible to avoid a situation where both the switches are turned off by properly setting the clock CLK even if there is a mustache such as the output of the ROM or an asynchronous output. obtain. Incidentally, ΔΦ shown in FIG. 3 (d) is determined by the delay time of the delay circuits 32a to 32n.

〔The invention's effect〕

As described in detail above, according to the present invention, since the feedback loop of the amplifier circuit can be always closed, there is a great effect that stable and high-speed gain control becomes possible.

[Brief description of drawings]

FIG. 1 is a principle diagram of the present invention. FIG. 2 is a diagram showing an embodiment of the present invention. FIG. 3 is an operation explanatory diagram of the gain control circuit according to the present invention. FIG. 4 is a diagram showing an example of a conventional gain control circuit. 5 (a) to (c) are explanatory diagrams of the operation of FIG. In the figure, 1 is an amplifier circuit, 2a to 2n are resistors, 3a to 3n are switches, 4a to 4n are control signals, 5 is a switching control circuit according to the present invention, 30a to 30d are switch circuits, and 31a to 31a. 31d is a D-type flip-flop, 32a to 32d are delay circuits,
33a to 33d are OR circuits.

Claims (1)

[Claims] 1. A feedback control loop of a variable gain amplifier circuit comprising a plurality of switches and a resistor train, wherein a switching control circuit (5) is provided in a gain control circuit for opening and closing the switches according to a control signal. A gain control, wherein a control signal for turning on the switch is immediately output to the switch by the control circuit (5), and the control signal for turning off the switch is output to the switch after a certain time delay. circuit.