JPH0679288B2 - Extended virtual memory control method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Outline] The present invention relates to an extended virtual memory control method, which expands to a logical address for the purpose of securing a large memory space instead of reducing the number of spaces while maintaining compatibility of software resources up to now. Add a virtual extension address that specifies the address of the memory space to be set, and set a mode that specifies the size of the memory space to be expanded, and compare all of the data indicating the space number with the space number Or determining which of the higher-order bits is to be used as the virtual extension address.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an extended virtual memory control method, and more specifically, to a shortage of memory space due to an increase in operating system (OS) due to the addition of functions and the enormous growth of user jobs.
The present invention relates to an extended virtual memory control method for reducing the number of spaces and securing a large memory space while maintaining the compatibility of conventional software.

The amount of recent software development is enormous, and the virtual space of the system that accommodates it is also increasing. Therefore, an extended virtual memory control method for expanding the memory space while maintaining the compatibility of conventional software resources is required.

[Prior Art] FIG. 4 is a conceptual view of a memory space by a conventional method. In the figure, the horizontal axis is the space number area and the horizontal axis is the memory area.
In the figure, 1 to n on the horizontal axis indicate the number of spaces. M1 is a common area in which the OS etc. are stored, and is an area that does not change even if the space changes. M2 is a user job that stores the user job program
An area, M3, is a job shared area, in which various data necessary to execute a job are stored. Here, each area M1
A total of 16 MB of M3 is used, and an increase in the memory space is dealt with by increasing the number of spaces n.

[Problems to be Solved by the Invention] According to such a conventional technique, it is not possible to appropriately deal with the increase in the OS area due to the progress of software year by year.
That is, when the size of the memory space is insufficient due to the increase of OS due to the addition of functions and the enormous growth of user jobs, a large memory space may be required even if the number of spaces is reduced.
There is a problem that such cases cannot be dealt with.

The present invention has been made in view of such points,
An object of the present invention is to provide an extended virtual memory control method capable of securing a large memory space at the cost of reducing the number of spaces while maintaining compatibility with conventional software resources.

[Means for Solving Problems] FIG. 1 is a flowchart showing the principle of the present invention. The present invention is an extended virtual memory control method that reduces a predetermined number of spaces and expands and increases the memory space by that amount, and adds a virtual expansion address that specifies an address of a memory space to be expanded to a logical address and Setting the mode that specifies the size of the memory space to be used (step)
And comparing all of the data indicating the space number with the space number according to the mode, or determining how many higher-order bits are used as the virtual extension address (step).

[Operation] Modes for specifying the size of the memory space to be expanded include a mode "0" in which a predetermined number (n) of space numbers remain unchanged. When this mode "0" is specified, a logical address is specified. All bits of the data indicating the space number in the real address converted by are compared with the space number. This makes it possible to maintain compatibility with conventional software.

Embodiments Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 2 is a conceptual diagram of memory space expansion by the method of the present invention. Here, it is assumed that an n space (the number of spaces n) is used for a memory space of 16 MB, and an array of 16 MB × n space corresponds to the conventional model (mode 0). And the expansion increase of memory space is 32MB × n / 2 space (mode 1), 64MB × n / 4
This is realized by setting a space (mode 2), that is, by reducing the number of spaces n and increasing the memory space accordingly.

In the present invention, the size of the memory space to be expanded is specified by the mode, but here, even when the number of spaces is left as n (16 MB × n space) as described above, the mode is “0” and the number of spaces is n. Is reduced to n / 2 to 32MB (32MB x n / 2 space) mode "1", and the number of spaces n is reduced to n / 4 to 64MB (64MB x n / 4 space) mode " 2 ".

FIG. 3 is a block diagram of the essential parts of an apparatus for implementing the method of the present invention. In the figure, 1 is a logical address (virtual address), which comprises a virtual extension address VSA1, a segment number, a page number A2, and an in-page address A3. Reference numeral 2 is an address conversion buffer memory (TLB) for inputting the segment number and page number in the logical address 1 and outputting the real address. Reference numeral 3 is a mode register in which mode data for designating the size of the memory space as mode "0", mode "1", mode "2" is set. In case of mode 0, it is completely compatible with the conventional model. In case of mode 1, the upper 1 bit of the space number is used as a virtual extension address, and in case of mode 2, the upper 2 bits of the space number are used. Is used as a virtual extension address. Reference numeral 4 is a space number register in which space number data designating a space number (1 to n) is set.
Reference numeral 5 denotes a first comparison circuit, which inputs the previous bit of the space number read from the address conversion buffer memory 2 and all the bits of the space number register 4 according to the mode set in the mode register 3. , Both signals are compared with or without including the upper 2 bits.

Reference numeral 6 denotes a second comparison circuit, which inputs the virtual extension address VSA1 in the logical address 1 and the upper 2 bits (virtual extension address) of the space number read from the address conversion buffer memory 2 and outputs the mode. Both signals are compared according to the mode set in the register 3. 7 is an OR gate,
The output signals of the first and second comparison circuits 5 and 6 are input, and the TLB fault signal is output from here.

The operation of the apparatus thus configured will be described below. First, in logical address 1, a virtual extension address of the memory space to be extended is added to virtual extension address VSA1. That is, if no expansion is needed (16
"00" for MB), "01" for expanding to 32MB,
When expanding to 64MB, add each address of "10".
Further, a mode for designating the size of the memory space to be expanded is set in the mode register 3.

When the mode “0” is set, the first comparison circuit 5 receives the signal indicating the mode “0” from the mode register 3,
All bits of the space number register 4 are compared with the space number from the address conversion buffer memory 2, and the comparison result is output as a TLB fault signal via the OR circuit 7. If they match, the space specified by the mode exists, and if they do not match, it indicates that the space does not exist, and the TLB fault signal becomes "1", indicating the absence. When the mode "1" is set, the first and second comparison circuits use the upper 1 bit of the space number as the virtual extension address according to the signal indicating the mode "1" from the mode register 3. To do. When the mode "2" is set, the upper 2 bits of the space number are used as the virtual extension address.

By the above operation, compatibility with the conventional model can be maintained in the case of mode "0". By setting mode "1" and mode "2", the memory as shown in FIG. The space can be expanded.

In the above description, the three modes "0", "1", and "2" can be set, but more modes may be set.

[Effects of the Invention] As described in detail above, according to the present invention, the lack of memory space due to the expansion of the OS, the expansion of JOB, etc. can be made compatible with the conventional software by adding the virtual expansion address and setting the mode. It can be resolved while maintaining sex.

[Brief description of drawings]

 FIG. 1 is a flow chart showing the principle of the present invention, FIG. 2 is a conceptual diagram of memory space expansion by the method of the present invention, FIG. 3 is a configuration diagram of a main part of an apparatus for realizing the method of the present invention, and FIG. It is a memory space conceptual diagram by a method. In FIG. 3, 1 is a logical address, 2 is a buffer memory for address conversion, 3 is a mode register, 4 is a space number register, and 5 and 6 are comparison circuits.

 ─────────────────────────────────────────────────── ─── Continued Front Page (72) Inventor Mitsuo Sakurai 1015 Kamiodanaka, Nakahara-ku, Kawasaki City, Kanagawa Prefecture, Fujitsu Limited (72) Inventor Ichiro Nakano 1015, Kamedotachu, Nakahara-ku, Kawasaki City, Kanagawa Prefecture, Fujitsu Limited ( 72) Inventor Shigenori Oyata 1015 Kamiodanaka, Nakahara-ku, Kawasaki City, Kanagawa Prefecture, Fujitsu Limited (72) Inventor Yoshiro Hirai, 1015, Ueodaanaka, Nakahara-ku, Kawasaki City, Kanagawa Prefecture Fujitsu Limited (72) Inventor Minoru Kitami, Kanagawa Prefecture 1015 Kamiodanaka, Nakahara-ku, Kawasaki City, Fujitsu Limited

Claims (1)

[Claims] 1. An expanded virtual memory control method for reducing a predetermined number (n) of spaces and expanding and expanding a memory space by that amount, wherein a virtual expansion address for designating an address of a memory space to be expanded is added to a logical address. And a step (step) of setting a mode for designating the size of the memory space to be expanded, and comparing all the data indicating the space number with the space number according to the mode, Is used as the virtual extended address, and the extended virtual memory control method.