JPH0671317B2 - Digital electronic still camera - Google Patents

Description

TECHNICAL FIELD The present invention relates to an electronic still camera, and more particularly to a digital electronic still camera that stores a video signal representing a still image in the form of digital data in a storage device.

BACKGROUND ART For example, in an electronic still camera described in JP-A-59-183592, a memory is detachably connected to a camera body having an image pickup optical system and a solid-state image pickup device, and a video signal representing a still image picked up by the image pickup device is transmitted. It is stored in this memory in the form of digital signals. The memory in which the video signal is stored is removed from the electronic still camera and loaded into the reproducing device, and the video signal read from the memory by the reproducing device is reproduced as a visible image on the screen of the video monitor.

When shooting with such an electronic still camera, it is necessary that the memory is accurately attached to the camera, shooting is performed after the circuit is connected to the camera, and the shot video signal is stored in the memory. However, in the conventional electronic still camera, since the circuit connection of the memory is not detected before the image pickup, even if the memory is not circuit-connected to the camera when the operator mounts the memory, I could not know. Therefore, even if the operator takes a picture of the object scene, the video signal is not stored in the memory, so there is no record of the image that should have been taken, and there is a problem that the picture is wasted.

In addition, even though the video signal is not stored in the memory, the electronic still camera captures an image of the scene, converts the video signal into a digital signal, and uses color separation information and optical information necessary for reproduction by the reproduction device. Since system distortion information and other various data are created and these signals and data are sent to the connecting means, there is a drawback that power is wasted.

Aim The present invention solves the above problems and provides a digital electronic still camera capable of performing a shooting operation only after a memory is securely connected to the electronic still camera and a video signal can be recorded. The purpose is to do.

DISCLOSURE OF THE INVENTION According to the present invention, in a digital electronic still camera to which a semiconductor memory module in which a video signal representing a still image is stored in the form of digital data is detachably connected, a semiconductor memory module is detachably connected in a circuit. An image pickup unit having a connection unit for connecting and a solid-state image pickup device, which picks up an image of a field by the solid-state image pickup device and outputs a video signal representing the field, and a digital signal corresponding to the video signal output from the image pickup unit. A signal converting means for converting into a signal and outputting the signal to the connecting means, and an image capturing means and a signal converting means are controlled to cause the image capturing means to perform image capturing, the signal converting means to perform conversion into a digital signal, and the connecting means. Control means for supplying a control signal for writing to the semiconductor memory module, the semiconductor memory module being connected by the connecting means. Therefore, the control means includes an information generating means for generating information for confirming that the semiconductor memory module is connected to the camera, and an information confirming means for confirming the information. Then, the information generated from the information generating means is sent to the semiconductor memory module,
After confirming that the information is stored in the semiconductor memory module by the information confirming means, the control is performed so as to enable the imaging operation of each functional unit of the camera.

Description of Embodiments Embodiments of a digital electronic still camera according to the present invention will be described in detail with reference to the accompanying drawings.

Referring to FIG. 1, there is shown an embodiment of a digital electronic still camera according to the present invention, which is a camera 10 having an image pickup section 12 and a memory 90 detachably connected thereto via a connector 14. Have and. In the figure, the element portion on the left side of the connector 14 is mounted in a single housing as a digital electronic still camera.

The memory 90 is, for example, an SRAM semiconductor memory integrated circuit (I
C) A rewritable digital storage device mounted in the form of a “module” such as a card or a cartridge, and has a data input / output line 92, an address, and a read / write line.
Control lines 94, including write enable, chip select, strobe, clock, etc., are connected to camera 10 via connector 14. The connector 14 may have a power supply line for the memory 90. The memory 90 stores, for example, when an image of one frame is represented by 1 M to 1.5 M bit data,
An SRAM with a memory capacity of 16 Mbits will be able to realize a 24-frame storage device with two chips.

The imaging unit 12 is necessary for capturing a still image such as an imaging lens 16, an aperture stop 18, a shutter 20, an imaging device 22, a photometry / distance measurement mechanism, a viewfinder (not shown) and their drive mechanism as shown in the figure. Has an element, the focus of the imaging lens 16,
Control of the diaphragm 18 and opening / closing of the shutter 20 are controlled by the control circuit 24 via a control line 26. As will be described later, the control circuit 24 operates the image pickup unit 12 such as the shutter 20 after confirming the electrical connection between the memory 90 and the camera 10.

As the image pickup device 22, for example, a solid-state image pickup device such as CCD or MOS is advantageously applied. Solid-state imaging device 22
A color filter is attached to the image pickup cell array 28, and the video signal color-modulated in response to a clock received from the synchronization generating circuit 30 through the drive line 32 is sequentially output to the output 34 in a dot (pixel) sequence. As the image pickup device 22, an array of photosensitive cells of the image pickup cell array 28, that is, one having an appropriate number of pixels in a photosensitive area is used, and the color segment arrangement of the color filter may be of any type.

The video signal output 34 of the imaging device 22 is connected to the input of an analog-digital converter (ADC) 36, which converts the analog-format video signal of the input 34 into corresponding digital data of 8 bits, for example. Then, it is a signal conversion circuit for outputting to the output 42. The output 42 is connected to the connector 14 via the switch circuit 192 as shown, and finally connected to the data input / output line 92 of the memory 90.

The control circuit 24 is a control function unit that controls the operation of the entire apparatus in response to an instruction signal from the operation display unit 44 through the signal line 52, and the control signal is transmitted via the control line 46 to the synchronization generation circuit 30. Connected to the image pickup unit 12 via the control line 26, to the analog / digital converter 36 via the control line 48, to the code generation circuit 184 via the control line 180, and to the code check circuit via the control line 182. Has been done. The control circuit 24 also monitors the condition of the various parts of the device by means of these control lines 46, 26 and 48.

The control circuit 24 also has the function of controlling mainly the writing of the memory 90, and includes control lines 54 including its write address, write enable, chip select and clock.
Is connected to connector 14.

The control circuit 24 uses the connection detection circuit 60 to store the memory 90 in the camera 10.
After it is detected that it has been attached to the power source, power is supplied from the power supply circuit 58 to operate.

The control circuit 24 is advantageously configured in a processing system, to which a memory 186 for storing various data and programs, for example, is connected via a bus 188. In addition to this, the memory 186 also includes information regarding the type of the imaging device 22 used in the present apparatus, for example, information regarding the number of pixels of the imaging cell array 28,
And information about the arrangement of the color segments of the color filter is held. The information relating to the number of pixels of the image pickup cell array 28 may be in the form of data representing the values of the number of horizontal pixels and the number of horizontal scanning lines, or may be in the form of a code for specifying their type. The information about the arrangement of the color segments of the color filter is advantageously in the form of a code specifying, for example, the type of those arrangements.

The code generation circuit 184 is an encoding circuit whose control input 180 is connected to the control circuit 24 and which generates at its output 190 a signal representing a code corresponding to an instruction from the control input 180. An instruction regarding the number of pixels of the imaging cell array 28 and an instruction regarding the arrangement of the color filter segments thereof are transferred from the control circuit 24 to the control input 180. Code generator 18
The output 190 of 4 is connected to a switch circuit 192 as shown. The switch circuit 192, as conceptually indicated by a dotted line 194, controls the control line 92 input to the memory 90 under the control of the control circuit 24 to include the control line 42, the control line 190, and the control line 198 shown in the figure. It is a selection circuit which selectively takes a connection position so as to connect to either one.

The synchronization generating circuit 30 is controlled from the control circuit 24 through the control line 46, and outputs to the output 32 a drive signal such as a clock or an address necessary to drive the imaging device 22 and output a video signal from its output 34. It is a synchronizing signal generating circuit for outputting.

The operation display unit 44 has a shutter release button and various manual operation buttons such as automatic / manual setting, exposure setting, white balance adjustment, etc., for inputting an operator's instruction to the apparatus, and this is input by a signal line 52. In addition to having a function to give to the control circuit 24, it has a display function to receive from the control circuit 24 from the signal line 52 showing the state of this device and display it to the operator.

The power supply circuit 58 is a power supply circuit that supplies electric power to each functional unit of the camera 10, and includes the memory 90 from the connection detection circuit 60 and the camera 10.
The supply of electric power to each functional unit of the camera 10 is started by a signal indicating that the connection with is detected. Power circuit 58 to control circuit
24 The power supply to other functional units is also turned on / off by the power switch 70 manually operated by the operator.
Therefore, when a signal indicating that the connection is detected is transmitted from the connection detection circuit 60, and when the power switch 70 is turned on by the operator, power is supplied to the control circuit 24 and other functional units of the camera 10, Each functional unit starts operation.
While the connection detection signal from the connection detection circuit 60 is not input, even if the power switch 70 is turned on, power is not supplied from the power supply circuit 58 to each functional unit, so that the camera 10 does not shoot. In the figure, a power supply line for supplying power from the power supply circuit 58 to each functional unit is omitted.

The connection detection circuit 60 is a detection circuit that detects that the memory 90 is connected to the camera 10 by the connector 66, and sends a detection signal to the power supply circuit 58 through the control line 64 when the connection is detected.

A concrete circuit example of the connection detection circuit 60 is shown in FIG.

As shown in the figure, one control line 150 that supplies electric power to the control circuit 24 is grounded, and the other control line 154 is connected to one terminal of the power switch 70. Power switch 70
The other terminal of is connected to one terminal of the connector 160 by a control line 158. The positive electrode of the power supply 58 is connected to the other terminal of the connector 160 by the control line 152, and the negative electrode of the power supply 58 is grounded by the control line 156. Further, the memory cartridge 90 presses the switch 160a so as to connect the two terminals of the connector 160 when it is mounted on the camera 10 as shown in the figure.

This circuit allows the memory cartridge 90 to
When it is attached to the connector 10, the two terminals of the connector 160 are connected to each other, so that when the operator turns on the power switch 70, power is supplied from the power source 58 to the control circuit 24, and the control circuit 24 operates. Start.

When the memory cartridge 90 is not attached to the camera 10, the two terminals of the connector 160 are not connected, so even if the operator turns on the power switch 70, the control circuit 24
Is not supplied with power from the power supply 58.

Another circuit example of the connection detection circuit 60 is shown in FIG.

Also in this circuit, one control line 150 for supplying power to the control circuit 24 is grounded, and the other control line 154 is connected to the power switch 70.
Is connected to one terminal. The other terminal of the power switch 70 is connected to a field effect transistor (FE
T) is connected to the drain of 164. The source of the FET 164 is connected to the positive electrode of the power supply 58 by the control line 172 and is also connected to one terminal of the connector 160 via the resistor 174. The gate of the FET 164 is connected to one terminal of the connector 160 via the inverter 168. The negative electrode of power supply 58 is grounded.

The two terminals 222 of the memory cartridge 90 are connected to the control line 2
Shorted by 20.

In such a circuit, when the memory cartridge 90 is mounted on the camera 10, the two short-circuited terminals 222 of the memory cartridge 90 are connected to the two terminals of the connector 160, whereby the two terminals of the connector 160 are short-circuited. Therefore, the ground level is input to the inverter 168 by the control line 170, a high level voltage is applied to the gate of the FET 164 through the control line 166, and the source and drain of the FET 164 are electrically connected. Therefore, when the operator turns on the power switch 70, the power from the power supply 58 is supplied to the control circuit 24 through the FET 164.

When the memory cartridge 90 is not attached to the camera 10, the two terminals of the connector 160 are open, so that the inverter 168 is connected to the resistor 58, the resistor 174, and the control line 170.
Positive voltage is input through the control line 166 and FET 1
A low level voltage is applied to the gate of 64. Therefore, since the source and drain of FET 164 are cut off,
Even if the operator turns on the power switch 70, the power from the power source 58 is not supplied to the control circuit 24.

With the circuit like the above example, the memory cartridge 90
Only when the camera is mounted on the camera 10, the operator turns on the power switch 70 so that the control circuit 24 is supplied with power from the power supply 58.

Returning to FIG. 1, the operation of this device will be described.

When the memory 90 is attached to the camera 10 by the connector 14,
As described above, the connection detection circuit 60 detects the mounting of the memory 90 via the connector 160. As a result, the power supply circuit 58 can be connected to the control circuit 24, so that when the operator turns on the power switch 70, power is supplied from the power supply circuit 58 to the control circuit 24.

The control circuit 24 connects the switch circuit 192 to the control line 190 via the control line 194, and sends a signal instructing the code generation circuit 184 to generate a check code through the control line 180. The code generation circuit 184 thereby generates a 1-bit check code signal. The check code signal is sent to the memory 90 through the connector 14 and the control line 92 and stored in a predetermined address of the memory 90.

Next, the control circuit 24 connects the switch circuit 192 to the control line 198 through the control line 194, and the control line 54 and the connector 1
4. A check code is read from the memory 90 by sending a control signal for instructing read and data of the address where the check code is stored to the memory 90 through the control line 94. The read check code is switch 19
2. The code is input to the code check circuit 196 through the control line 198, and the code check circuit 196 checks whether the code is the same as the code generated by the code generation circuit 184.

When the code check circuit 196 confirms that the codes are the same, it sends a check completion signal to the control circuit 24.
Send by 2. The control circuit 24 thereby connects the switch circuit 192 to the control line 190 again via the control line 194, and the information regarding the number of pixels of the imaging cell array 28, that is, the number of pixels information, and the information regarding the arrangement of the color filter segments, that is, the color separation. The code for the information and other information necessary for reproduction is generated in the code generation circuit 184, and the memory 9
Perform a store to 0.

After the storage of the code of the information necessary for reproduction in the memory 90, the control circuit 24 supplies the power from the power supply circuit 58 to each unit of the camera 10. As a result, the shutter 20 can be opened and closed by the operation of the shutter release button by the operator.

The operator operates the operation display unit 44 to perform the shooting operation of the subject. The shutter is released by operating the shutter release button.
The one-frame subject image captured by the image pickup device 22 after being opened is output from the image pickup device 22 to the output 34 in the form of a dot-sequential video signal in accordance with a clock supplied from the synchronization generation circuit 30 through the clock line 32. At that time, the control circuit 24 connects the switch circuit 192 to the control line 42 via the control line 194.

The control circuit 24 energizes the analog / digital converter 36 in accordance with the synchronization signal generated by the synchronization generation circuit 30. Therefore, the dot-sequential video signal is converted into corresponding digital data by the analog / digital converter 36 and its output 42
Is output to the connector 14 through the switch circuit 192.

The control circuit 24 also carries the memory 90 through the control line 54.
It outputs control signals such as write address, write enable, chip select, and clock. In synchronization with this, the video signals input to the data line 92 are sequentially written in the sequential storage positions of the memory 90. In this way, the video signal data of the image of one frame is accumulated in the storage area of the memory 90.

The video signal stored in the memory 90 in the device of this embodiment is reproduced by the reproducing device 12 having the structure as shown in FIG.
Played at 0. The reproducing device 120 has a connector 122 to which the memory 90 is detachably connected, so that its read data line 96 is connected to the input 202 of the signal processing circuit 200. Further, the control line 98 is connected to the control circuit 128 via the connector 122.

The signal processing circuit 200 color-separates the digital video signal of the input 202, performs necessary video signal processing such as white balance adjustment and gradation (γ) correction, and outputs this to its output 204. It is a signal processing circuit. Data for appropriately performing the video signal processing, for example, pixel number information and color separation information of the imaging device 22 for performing color separation are set in the signal processing circuit 200 from the control circuit 128 via the control line 206. The circuit 200 performs video signal processing based on this. The output 204 is connected to a digital-to-analog converter (DAC) 124.

The digital-analog converter 124 is a signal conversion circuit that converts the video signal of the output 204 of the signal processing circuit 200 into a corresponding analog signal and outputs the analog signal to the output 126. Output 126 is
It is connected to the NTSC processing circuit 130. NTSC processing circuit 130
Is a matrix and encoder that converts the analog signal output from the digital-analog converter 124 into a luminance signal and a color difference signal, converts this into a NTSC composite video signal together with the synchronization signal from the control circuit 128, and outputs it to the device output 132. is there. The device output 132 includes, for example, a video monitor 134.
An image output device such as a printer and / or a printer is connected so that the composite video signal at the output 132 is output as a visible image.

Each element of the reproducing device 120 is controlled by the control circuit 128. An operation display unit 136 and a data file 208 are connected to the control circuit 128 as shown in the figure, and are advantageously configured in a processing system. The operation display unit 136 has various manual operation buttons such as a reproduction button, a frame designation button, white balance adjustment, and gradation adjustment, and inputs an operator's instruction to the apparatus and controls this with a signal line 210. In addition to having a function of giving to the circuit 128, it has a display function of receiving a signal indicating the state of the present device from the control circuit 128 from the signal line 210 and displaying it to the operator.

The data file 208 is a storage device that holds various data necessary for the operation of the control circuit 128, such as a ROM.
Composed of. The data held in the data file 208 includes, for example, pixel number information and color separation information of the image pickup device 22 regarding the video signal stored in the memory 90.

The control circuit 128 supplies a control signal for reading to the control line 94 of the memory 90 according to a predetermined fundamental frequency in response to an instruction from the operator input from the operation display unit 136. As a result, the video signal data of the designated frame and the code indicating the pixel number information and the color separation information of the image pickup device 22 are read from the memory 90 to the signal processing circuit 200.

A code indicating the pixel number information and the color separation information is fetched from the signal processing circuit 200 to the control circuit 128 through the control line 206. The control circuit 128 searches the data file 208 with this code, and retrieves pixel number data and color separation data. The control circuit 128, according to the retrieved data, outputs the signal processing circuit 200 and the digital-analog converter 124.
It determines the rate of control signals, such as clocks, to be supplied to. In accordance therewith, the data for appropriately performing the video signal processing, for example, the pixel number information and the color separation information of the image pickup device 22 before the color separation are set through the control line 206.

The control circuit 128 then reads the video signal of the designated frame from the memory 90, and this is input to the signal processing circuit 200. The signal processing circuit 200 converts the dot-sequential video signal obtained at the input 202 into respective color signals, for example, red (R), green (G) and blue (B), according to a pixel clock received from the control circuit 128 through the control line 206. To separate. This color separation is performed according to the number of pixels and the color separation information set in the signal processing circuit 200, that is, according to the number of pixels of the imaging cell array 28 of the imaging device 22 used in the camera 10 and the segment arrangement of the color filters. Therefore, the reproducing device 120 can cope with any type of pixel arrangement and color filter segment arrangement.

The signal processing circuit 200 further corrects the deviation of the white balance due to the color temperature of the light source when the imaging device 22 takes an image, and the deviation of the gradation due to the non-linear characteristics of the imaging device 22. The video signal data output from the signal processing circuit 200 is converted into an analog signal by the digital-analog converter 124, a luminance signal and a color difference signal are obtained by the NTSC processing circuit 130, and the device output in the form of an NTSC composite video signal.
It is output to 132. Finally, for example, the video monitor 134
And / or reproduced as a visible image on a printer or the like. In this embodiment, the processing circuit 130 processes the NTSC signal, but of course the processing circuit 130
May be configured to process other standard television signal formats such as PAL format and SECAM, as well as NTSC.

As described above, according to the present embodiment, after the connection detection circuit 60 detects the mounting of the memory 90, the operator turns on the power switch 70.
Power is supplied from the power supply circuit 58 to the control circuit 24 by operating. Therefore, memory 90
If it is not detected that the
Since power is not supplied from the power supply circuit 58 even if 70 is operated, shooting is not performed without the memory 90 being properly mounted. Therefore, as in the past, memory 90
It is possible to prevent a situation in which the operator performs a shooting operation and the image on which the shooting operation has been performed cannot be stored in the memory 90 even though the is not attached.

Further, when it is confirmed that the memory 90 is attached, first, the code generation circuit 184 generates information necessary for reproduction such as color separation information and writes it in the memory 90, and after this writing is completed, the shutter 20 is operated by operating the shutter release button. It is designed so that it can be opened and closed. As described above, since the photographing operation is possible after the information necessary for reproduction is written in the memory 90 in advance, it is possible to prevent the information necessary for reproduction from being stored in the memory 90. Further, since the color separation information and the like are written in the memory 90 in advance, the control circuit 24 performs the same as the writing of the video signal in the memory 90, for example, in the case of writing the color separation information and the like in the blanking period of the video signal. It is possible to eliminate the burden of controlling these writing operations.

According to the present embodiment, the power is supplied after detecting the mounting of the memory 90.
It is possible to supply power from the 58 to the control circuit 24, and after writing the color separation information and the like to the memory 90, the shutter can be opened and closed, so that power is not supplied before the memory 90 is properly mounted, The power necessary for shooting is not supplied before shooting is possible. Therefore, it is possible to prevent a decrease in the capacity of the power supply due to useless power consumption.

Effect According to the present invention, since the power is not supplied from the power source when the mounting of the memory is not detected in this manner, it is possible to prevent a photographing error due to a defective connection of the memory. Also, after writing the code that checks the connection of the memory to the memory and detecting that this information has been written to the memory, it is possible to shoot, so it is possible to prevent the situation where the shot video signal cannot be recorded in the memory, It is possible to prevent unnecessary power consumption.

Furthermore, since the shooting operation is possible after the information necessary for reproduction is written in the memory in advance, it is possible to prevent the information necessary for reproduction from being stored in the memory.

[Brief description of drawings]

FIG. 1 is a functional block diagram showing an embodiment of a digital electronic still camera according to the present invention, FIG. 2 is a circuit diagram showing a concrete example of the connection detecting circuit of FIG. 1, and FIG. FIG. 4 is a functional block diagram showing a configuration example of a reproducing apparatus for reproducing the video signal stored in the memory according to the embodiment shown in FIG. Description of main part symbols 12 …… Imaging unit 22 …… Solid-state imaging device 24 …… Control circuit 28 …… Imaging cell array 30 …… Synchronization generation circuit 36 …… Analog / digital converter 58 …… Power supply circuit 60 …… Connection Detection circuit 90 …… Memory 120 …… Reproduction device 160 …… Connector 164 …… FET 168 …… Inverter 184 …… Code generation circuit 192 …… Switch circuit 196 …… Code check circuit

Claims (4)

[Claims] 1. A digital electronic still camera to which a semiconductor memory module, in which a video signal representing a still image is stored in the form of digital data, is detachably connected. And a video signal output from the imaging means, the imaging means having a solid-state imaging device, imaging the field with the solid-state imaging device, and outputting a video signal representing the field. To a corresponding digital signal and outputting the digital signal to the connecting means, and controlling the image capturing means and the signal converting means to cause the image capturing means to perform image capturing, and the signal converting means to convert the digital signal into the digital signal. And a control means for performing conversion and supplying a control signal for writing to the semiconductor memory module to the connecting means. Means include information generating means for generating information for confirming that the semiconductor memory module is circuit-connected to the camera by the connecting means, and information confirming means for confirming the information. When the semiconductor storage module is mounted on the camera, the control means sends the information generated by the information generation means to the semiconductor storage module, and the information confirmation means causes the information to be stored in the semiconductor storage module. The digital electronic still camera is characterized in that after confirming that the image has been accumulated, control is performed so as to enable the photographing operation of each functional unit of the camera. 2. The digital camera according to claim 1, wherein the information generated by the information generating means is a check code having a bit number equal to the number of data input / output terminals. Electronic still camera. 3. The camera according to claim 1, wherein the information generated by the information generating means includes information necessary for reproducing the still image stored in the semiconductor storage module. Digital electronic still camera characterized by. 4. The camera according to claim 1, wherein the camera has mounting detection means for detecting that the semiconductor storage module is mounted in the camera, and the mounting detection means is the semiconductor. A digital electronic still camera, characterized in that when the mounting of a storage module is detected, the control means is supplied with electric power from a power source means of the camera to enable the control means to operate.