JPH0666152U - FSK demodulation circuit - Google Patents

FSK demodulation circuit

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Publication number
JPH0666152U
JPH0666152U JP1455592U JP1455592U JPH0666152U JP H0666152 U JPH0666152 U JP H0666152U JP 1455592 U JP1455592 U JP 1455592U JP 1455592 U JP1455592 U JP 1455592U JP H0666152 U JPH0666152 U JP H0666152U
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JP
Japan
Prior art keywords
circuit
demodulation
frequency
fsk
demodulation circuit
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1455592U
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JP2585610Y2 (en
Inventor
重人 塙
Original Assignee
八重洲無線株式会社
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Priority to JP1992014555U priority Critical patent/JP2585610Y2/en
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Abstract

(57)【要約】 【目的】 FSK受信回路の復調回路の調整や回路構成
の部品点数を削減し、生産上の簡易化を計るとともに省
電力化をも可能にする回路の提供を目的とする。 【構成】 C・MOS−INVICを用いて高周波増幅
を行なうとともに、復調波形の増幅、波形整形、基準電
圧発生を全て1チップICにて行なう。なおFSK復調
にセラミックディスクリミネータを用いて無調整化を計
るとともにインピーダンス整合のバッファ増幅器を設け
た構成である。
(57) [Abstract] [Purpose] It is an object of the present invention to provide a circuit that enables adjustment of the demodulation circuit of the FSK receiving circuit and reduction of the number of parts of the circuit configuration, simplification in production, and power saving. . [Structure] High-frequency amplification is performed using a C-MOS-INVIC, and demodulation waveform amplification, waveform shaping, and reference voltage generation are all performed by a single-chip IC. Note that the FSK demodulation uses a ceramic discriminator to perform no adjustment, and an impedance matching buffer amplifier is provided.

Description

【考案の詳細な説明】[Detailed description of the device]

【0001】[0001]

【産業上の利用分野】[Industrial applications]

本考案はデータ通信等に利用するFSK変調通信におけるFSK復調回路に関 するものである。 The present invention relates to an FSK demodulation circuit in FSK modulation communication used for data communication and the like.

【0002】[0002]

【従来の技術】[Prior art]

データ通信には1と0のデータをFSK(Frequency Shift Keying)変調して通信する方式で行こなわれている。通常の無線通信によ る場合の受信機は、高周波増幅、中間周波数への変換および増幅して復調回路で 復調するものと、ごく近距離通信においては受信機は高周波増幅のみで、中間周 波数変換もBPF(帯域濾波器)も通さず直接復調回路で復調するものとがある が、FSK復調に関しては前記いずれも同じ方法で復調される。 The data communication is performed by a method of performing FSK (Frequency Shift Keying) modulation on data of 1 and 0 and performing communication. In the case of ordinary wireless communication, the receiver uses high-frequency amplification, conversion to an intermediate frequency, and amplification and demodulation with a demodulation circuit.In short-distance communication, the receiver only uses high-frequency amplification and the intermediate frequency Some demodulation is performed directly by a demodulation circuit without passing through conversion or BPF (bandpass filter), but with respect to FSK demodulation, both are demodulated by the same method.

【0003】 FSK復調方式の一方法として図3に示すクオードラチャ検波回路がある。こ の図3の動作を簡単に説明すると、1,0の信号に適当な周波数を付与して、付 与した周波数によって搬送波をFS変調して送信する。その送信電波を受信する とIF IN端子から復調用ICに入力される。この復調用ICには信号1の周 波数で変調された周波数の直接または中間周波数変換された周波数が同調する同 調回路が設けられている。そのため、同調した周波数だけがハイレベルとなり、 その他の周波数はローレベルとして出力端子から出力される。この信号を増幅し 、復調することによって1,0信号を取り出すものである。この為この同調回路 の調整と、温度保償対策等が必要となっていた。As one method of the FSK demodulation method, there is a quadrature detection circuit shown in FIG. The operation of FIG. 3 will be briefly described. An appropriate frequency is given to the 1 and 0 signals, and the carrier wave is FS modulated by the given frequency and transmitted. When the transmitted radio wave is received, it is input to the demodulation IC from the IF IN terminal. The demodulation IC is provided with a modulation circuit for tuning the frequency directly or at the intermediate frequency of the frequency modulated by the frequency of the signal 1. Therefore, only the tuned frequency becomes high level, and the other frequencies are output as low level from the output terminal. By amplifying and demodulating this signal, the 1,0 signal is extracted. For this reason, it was necessary to adjust this tuning circuit and take measures for temperature compensation.

【0004】[0004]

【考案が解決しようとする課題】[Problems to be solved by the device]

しかし、上述のような従来技術においては、IF用IC等の特定のICを用い なければならず、また低ゲインの周波数アンプ、FSK復調器及び、波形整形の みの単機能、並びに低コストを要求される回路に用いるうえで、部品点数の削減 と低電流化は困難なものであった。 However, in the conventional technology as described above, a specific IC such as an IF IC must be used, and a low gain frequency amplifier, an FSK demodulator, and a single function only for waveform shaping, and low cost. It was difficult to reduce the number of parts and lower the current when using it for required circuits.

【0005】 更にページャー用等、波形整形回路も含めて構成されたICでは、内部コンパ レータの基準電圧の立上がり時間に遅れがあるため、FS復調信号の出力に遅れ を生ずる欠点があつた。 本考案は従来知られているFSK復調回路のこのような欠点を改良する目的で なされたものである。Further, in an IC including a waveform shaping circuit for a pager or the like, the rise time of the reference voltage of the internal comparator has a delay, which causes a delay in the output of the FS demodulation signal. The present invention has been made for the purpose of ameliorating such drawbacks of the conventionally known FSK demodulation circuit.

【0006】[0006]

【課題を解決するための手段】[Means for Solving the Problems]

入力信号を増幅する高周波回路と、その出力を復調回路に整合させる整合回路 と、基準電圧を一定値に保つ基準電圧回路の出力で基準電圧を設定したセラミッ クディスクリミネータによる前記復調回路と、復調された信号を増幅する低周波 増幅回路とその出力波形を整形する波形整形回路とが縦続接続した回路のうち前 記整合回路と、復調回路以外は1個のICにより構成する。 A high-frequency circuit that amplifies the input signal, a matching circuit that matches its output with the demodulation circuit, and the demodulation circuit with a ceramic discriminator that sets the reference voltage with the output of the reference voltage circuit that maintains the reference voltage at a constant value. Of the circuits in which a low-frequency amplifier circuit for amplifying the demodulated signal and a waveform shaping circuit for shaping the output waveform thereof are connected in series, the matching circuit described above and a circuit other than the demodulation circuit are configured by one IC.

【0007】[0007]

【作用】[Action]

FSK復調回路における基準電圧値は、基準電圧回路を設けて、その出力を供 給して一定電圧にすることでFSK復調回路の接地電位を等価的に持ち上げるの で、復調波形の立ち上がりの早い安定したFSK復調信号が得られる。 The reference voltage value in the FSK demodulation circuit is equivalent to the ground potential of the FSK demodulation circuit raised by providing a reference voltage circuit and supplying its output to a constant voltage. The FSK demodulated signal is obtained.

【0008】[0008]

【実施例】【Example】

図1は本考案の一実施例を示す回路図である。図面に基づいて説明する。図中 1は高周波増幅回路でQ,Qは夫々インバータである。2はエミッタから出 力するトランジスタ回路のバッファ増幅器であって、次段復調回路とのインピー ダンス整合も行う整合回路を兼ねている。3はセラミックディスクリミネータ( CD)による復調回路である。復調回路3はコンデンサCで高周波的に設置さ れている。4は復調回路3の基準電位を発生させる基準電圧回路である。5は復 調された信号を増幅する低周波増幅回路で、6は信号波形を整形する波形整形回 路である。FIG. 1 is a circuit diagram showing an embodiment of the present invention. It will be described with reference to the drawings. In the figure, 1 is a high frequency amplifier circuit, and Q 1 and Q 2 are inverters. Reference numeral 2 is a buffer amplifier of a transistor circuit that outputs from the emitter, and also serves as a matching circuit that also performs impedance matching with the next-stage demodulation circuit. Reference numeral 3 is a demodulation circuit using a ceramic discriminator (CD). The demodulation circuit 3 is installed at a high frequency with a capacitor C 4 . Reference numeral 4 is a reference voltage circuit for generating the reference potential of the demodulation circuit 3. Reference numeral 5 is a low-frequency amplifier circuit for amplifying the demodulated signal, and 6 is a waveform shaping circuit for shaping the signal waveform.

【0009】 上記の回路からその動作を説明する。アンテナから入力された受信信号は高周 波増幅回路1により増幅される。この高周波増幅回路は、インバータQ及びQ からなりBPF回路を持たない増幅器である。ここで増幅された受信信号はバ ッファ増幅器2のトランジスタQで増幅されてエミッタホロワで出力される。 このエミッタホロワ出力は次段の復調回路3とのインピーダンス整合を目的とし たものである。The operation of the above circuit will be described. The received signal input from the antenna is amplified by the high frequency amplifier circuit 1. This high frequency amplifier circuit is an amplifier which includes inverters Q 1 and Q 2 and does not have a BPF circuit. The received signal amplified here is amplified by the transistor Q 3 of the buffer amplifier 2 and output by the emitter follower. This emitter follower output is intended for impedance matching with the demodulation circuit 3 in the next stage.

【0010】 復調回路3は、例えば商品名SFD455S4のセラミックディスクリミネー タの検波特性図を図2に示す。即ち周波数455KHzを中心に低い周波数であ れば(+)直流出力電圧となり、高い周波数であれば(−)直流出力電圧の特性 をもっている。また、このセラミックディスクリミネータには前述とは逆に中心 周波数より高い周波数で(−)直流出力電圧、低い周波数では(+)直流出力電 圧となるものもある。又、中心周波数はスペシャルオーダーにより異なる周波数 のものも可能である。The demodulation circuit 3 shows, for example, a detection characteristic diagram of a ceramic discriminator with a trade name of SFD455S4 in FIG. That is, if the frequency is low centering on the frequency of 455 KHz, the (+) DC output voltage is obtained, and if the frequency is high, the (-) DC output voltage is obtained. On the contrary, some ceramic discriminators have a (−) DC output voltage at a frequency higher than the center frequency and a (+) DC output voltage at a lower frequency than the center frequency. The center frequency may be different depending on the special order.

【0011】 従って、この実施例の場合の高周波FSK送信周波数は455KHzを中心に して1と0に対応した周波数だけ両側にシフトされた周波数であることが解る。Therefore, it can be understood that the high frequency FSK transmission frequency in the case of this embodiment is a frequency shifted to both sides by a frequency corresponding to 1 and 0 centered at 455 KHz.

【0012】 上記復調回路3は基準電圧回路4で電源電圧の1/2の電圧が生成される。こ れはインバータICを用いることで簡単に出力できる。この基準電圧回路4の出 力電圧をセラミックディスクリミネータ(CD)に基準電位として供給する事で セラミックディスクリミネータ(CD)の接地電位と分離してFSK復調の1/ 2基準点を保つため、1,0の信号の立ち上りの遅れを解消して安定した復調信 号が得られる。復調回路3の出力は低周波増幅回路4で必要なレベル迄増幅され 、その出力信号は波形整形回路6で整形されてFSK信号を得られるものである 。In the demodulation circuit 3, the reference voltage circuit 4 generates a voltage half the power supply voltage. This can be easily output by using an inverter IC. By supplying the output voltage of the reference voltage circuit 4 to the ceramic discriminator (CD) as a reference potential, it is separated from the ground potential of the ceramic discriminator (CD) to maintain the 1/2 reference point of FSK demodulation. A stable demodulated signal can be obtained by eliminating the rising delay of the signals of 1, 1, 0. The output of the demodulation circuit 3 is amplified to a required level by the low frequency amplification circuit 4, and the output signal is shaped by the waveform shaping circuit 6 to obtain the FSK signal.

【0013】 以上のように復調回路にセラミックディスクリミネータ(CD)を用いる事に よって復調回路3に同調回路を設けて同調調整を行う必要がない。又、受信回路 を含めた全回路にはバッファ増幅兼整合回路(3)のトランジスタと復調回路4 のセラミックディスクリミネータ(CD)以外は1個のC・MOSインバータI Cで足りるので小形化と製作コストの低減及び省電力化が可能であり、また実施 例では受信周波数を455KHz附近としたが、通常の無線機によるデータ通信 であればSHF.UHF.VHF帯を問わず中間周波数を455KHz附近に迄 変換する事で本願考案の復調回路を使用できる事は云う迄もない。By using the ceramic discriminator (CD) in the demodulation circuit as described above, it is not necessary to provide a tuning circuit in the demodulation circuit 3 to perform tuning adjustment. Further, all the circuits including the receiving circuit need only one C / MOS inverter IC except for the transistor of the buffer amplification / matching circuit (3) and the ceramic discriminator (CD) of the demodulation circuit 4, so that the circuit is downsized. The manufacturing cost can be reduced and the power consumption can be saved. In the embodiment, the reception frequency is close to 455 KHz, but in the case of data communication by a normal radio, the SHF. UHF. It goes without saying that the demodulation circuit of the present invention can be used by converting the intermediate frequency up to around 455 KHz regardless of the VHF band.

【0014】[0014]

【考案の効果】[Effect of device]

本考案による復調回路にセラミックディスクリミネータを用い、その基準電位 を基準電圧回路により供給する事でFSK信号の立上り特性の遅れを解消して波 形のくずれをおさえる事と、バッファ増幅器の整合回路以外の能動素子を1チッ プC・MOSインバータICで構成できるので従来の回路に比べて部品点数を大 幅に削減できる上に、小形化と製作の簡易化及び省電力化が可能となる実用上の 効果が大きい。 By using a ceramic discriminator in the demodulation circuit according to the present invention and supplying the reference potential thereof by the reference voltage circuit, the delay of the rising characteristic of the FSK signal is eliminated and the waveform collapse is suppressed, and the matching circuit of the buffer amplifier. Other active elements can be configured with a 1-chip C / MOS inverter IC, so the number of parts can be greatly reduced compared to the conventional circuit, and it is possible to reduce size, simplify manufacturing, and save power. The above effect is great.

【図面の簡単な説明】[Brief description of drawings]

【図1】本考案の一実施例を示すFSK復調回路図FIG. 1 is an FSK demodulation circuit diagram showing an embodiment of the present invention.

【図2】セラミックディスクリミネータの特性図[Figure 2] Characteristic diagram of ceramic discriminator

【図3】従来の復調回路の略図FIG. 3 is a schematic diagram of a conventional demodulation circuit.

【符号の説明】[Explanation of symbols]

1 高周波増幅回路 2 バッファ増幅器 3 復調回路 4 基準電圧回路 5 低周波増幅回路 6 波形整形回路 1 high frequency amplifier circuit 2 buffer amplifier 3 demodulation circuit 4 reference voltage circuit 5 low frequency amplifier circuit 6 waveform shaping circuit

Claims (2)

【実用新案登録請求の範囲】[Scope of utility model registration request] 【請求項1】 受信並びに復調回路を高周波増幅回路
1、次段復調回路とのインピーダンス整合を行うバッフ
ァ増幅器2、セラミックディスクリミネータの復調回路
3、低周波増幅回路5、および波形整形回路6を縦続接
続する構成とし、前記セラミックディスクリミネータの
基準電位には基準電圧回路4を設けてその出力電圧が供
給されて接地電位を等価的に上げたことを特徴とするF
SK復調回路。
1. A high frequency amplifier circuit 1 for receiving and demodulating circuit, a buffer amplifier 2 for impedance matching with a next stage demodulating circuit, a demodulator circuit 3 of a ceramic discriminator, a low frequency amplifier circuit 5, and a waveform shaping circuit 6. A cascade connection is adopted, and a reference voltage circuit 4 is provided for the reference potential of the ceramic discriminator and its output voltage is supplied to raise the ground potential equivalently.
SK demodulation circuit.
【請求項2】 前記高周波増幅回路1、低周波増幅回路
4、波形整形回路6および基準電圧回路4を1チップの
C・MOS−ICで構成したFSK復調回路。
2. An FSK demodulation circuit in which the high-frequency amplification circuit 1, the low-frequency amplification circuit 4, the waveform shaping circuit 6, and the reference voltage circuit 4 are formed by a one-chip C-MOS-IC.
JP1992014555U 1992-02-17 1992-02-17 FSK demodulation circuit Expired - Fee Related JP2585610Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1992014555U JP2585610Y2 (en) 1992-02-17 1992-02-17 FSK demodulation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1992014555U JP2585610Y2 (en) 1992-02-17 1992-02-17 FSK demodulation circuit

Publications (2)

Publication Number Publication Date
JPH0666152U true JPH0666152U (en) 1994-09-16
JP2585610Y2 JP2585610Y2 (en) 1998-11-25

Family

ID=11864402

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1992014555U Expired - Fee Related JP2585610Y2 (en) 1992-02-17 1992-02-17 FSK demodulation circuit

Country Status (1)

Country Link
JP (1) JP2585610Y2 (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6266745A (en) * 1985-09-18 1987-03-26 Toshiba Corp Demodulator

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6266745A (en) * 1985-09-18 1987-03-26 Toshiba Corp Demodulator

Also Published As

Publication number Publication date
JP2585610Y2 (en) 1998-11-25

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