JPH0661426A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To provide a semiconductor integrated circuit wherein a diffused-layer fixed potential body is formed in a hybrid semiconductor integrated circuit as in a prior art, the influence of a noise between circuit groups is prevented and the performance and the reliability of the circuit groups are enhanced. CONSTITUTION:A hybrid semiconductor integrated circuit on which an analog circuit group 20 and another circuit group are mounted in a mixed manner is provided with a structure wherein a diffused-layer fixed potential body 2 is formed between the circuit groups and the diffused-layer fixed potential body 2 is connected to a substrate potential for a semiconductor substrate 1 by means of a metal interconnection connected to a subcontact 18. Thereby, it is possible to prevent the influence of a noise generated by the circuit groups, and the performance and the circuit reliability of each of the circuit groups.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure of a semiconductor integrated circuit, and more particularly to noise and the like acting between circuit groups in a semiconductor integrated circuit in which analog circuit groups and digital circuit groups are mixedly mounted. The present invention relates to a semiconductor integrated circuit having an isolation region for preventing the above.

[0002]

2. Description of the Related Art In recent years, with the miniaturization of electronic circuit devices as a whole, in order to increase the degree of integration of electronic circuits, analog circuit groups, memory circuit groups, etc. are mixedly mounted in one chip adjacent to a digital signal processing circuit. Attention has been paid to the development of hybrid molded semiconductor integrated circuits.

[0003]

In such a hybrid type semiconductor integrated circuit, electromagnetic induction noise or the like caused by the circuit operation between different types of circuit groups interferes with adjacent circuit groups, and the entire semiconductor integrated circuit is affected. The characteristics may be adversely affected. For example, even if an LSI configured only with digital circuits satisfies the required performance, if other circuit groups such as analog circuits and memory circuits are mixed in this digital circuit group, the circuit operation of the digital circuit group There is a problem that the characteristics of the analog circuit group are deteriorated and the operation of the memory circuit group becomes abnormal due to the influence of noise generated by the electromagnetic waves generated by the electromagnetic wave.

Further, there is an increasing demand for miniaturization and speeding up of the digital circuit group, and along with this increase in the generation of noise, it is becoming difficult to realize a high performance hybrid semiconductor integrated circuit.

An object of the present invention is to form a diffusion layer fixed potential body in order to solve the problems such as the deterioration of the performance and reliability due to the influence between the respective circuit groups, which is the conventional problem. (EN) Provided is a semiconductor integrated circuit which prevents influence between circuit groups and improves performance and reliability of each circuit group.

[0006]

A first solution of the present invention for solving the above problems is a semiconductor integrated circuit in which an analog circuit group and a digital circuit group are mixedly mounted on a semiconductor substrate. A diffusion layer fixed potential body is provided immediately above and between the analog circuit group and the digital circuit group and is connected to the substrate potential of the semiconductor substrate by a metal wiring.

A second solution of the present invention for solving the above problems is a semiconductor integrated circuit in which an analog circuit group and a digital circuit group are mixedly mounted on a semiconductor substrate. A diffusion layer fixed potential body which is formed so as to surround the circuit group or the digital circuit group and is connected to the substrate potential of the semiconductor substrate by a metal wiring is characterized.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings.

FIG. 1 is a sectional view of a semiconductor integrated circuit according to an embodiment of the present invention, showing a sectional view of an isolation region 19 and one transistor included in an analog circuit group 20. 2 is a top view of a hybrid semiconductor integrated circuit including the analog circuit group 20 and the digital circuit 21, and FIG.
FIG. 3 is a top view of a hybrid semiconductor integrated circuit of a digital circuit 21 and another circuit group 22.

In FIG. 1, an analog circuit group 20 is formed on a P ⁻ type semiconductor substrate 1, and a separation region 19 is provided between the analog circuit group 20 and another type of circuit group (not shown) adjacent thereto. A P ⁺ -type diffusion layer fixed potential body 2 is formed on. One transistor formed in the analog circuit group 20 is composed of an N ⁺ type collector region 3, a P ⁺ type base region 4, and a P ⁺ type emitter region 5, and these collector regions 3 , Holes are made in the oxide film on the base region 4 and the emitter region 5, respectively, to deposit metal, whereby the emitter electrode 15 is formed on the emitter region 5 and the base electrode 14 is formed on the base region 4. , 16 have collector electrodes 1 on the collector region 3.
7 is formed. Further, the transistors formed on the semiconductor substrate 1 are separated by the oxide films 8, 12 and 13, and between the oxide films 8 and 12 and the semiconductor substrate 1 there is a P ⁺ type that prevents signal leakage. Channel stoppers 6 and 7 are formed.

An isolation region 19 having a P ⁺ type diffusion layer fixed potential body 2 surrounded by oxide films 12 and 13 is formed between the analog circuit group 20 and another circuit group adjacent thereto. . Further, after forming a hole in the oxide film on the diffusion layer fixed potential body 2, metal is vapor-deposited and the sub-contact 1 is formed.
8 is formed. Then, if necessary, this sub-contact 18 is connected to the substrate potential of the semiconductor substrate 1 by a metal wiring. This substrate potential is not connected to the substrate potential of any circuit group such as the analog circuit group 20. This separation area 1
9 prevents the analog circuit group 20 from being affected by noise such as electromagnetic interference generated in adjacent digital circuit groups. In other words, the diffusion layer fixed potential body 2 serves as a shield of the analog circuit group 20 against noise from other circuit groups.

2, 3 and 4 show the relative positional relationship of another circuit group in the isolation region 19 formed in this way as seen from above the semiconductor integrated circuit. In FIG. 2, a separation region 19 is provided around the analog circuit group 20. Further, in FIG. 3, a separation region 19 is provided around the digital circuit 21.
The state in which is provided is shown. 2 and 3, the isolation region 19 may be provided in a part of the periphery of the circuit groups 20 and 21,
The isolation region 19 is included in at least a portion including the boundary between the circuit groups.
Need to be formed. FIG. 4 shows a hybrid semiconductor integrated circuit in which three or more types of circuit groups are mixedly mounted in one chip. In FIG. 3, a separation region 19 is provided in a region sandwiched between the analog circuit group 20, the digital circuit 21 and the other circuit group 22. Also, FIGS.
As described above, the isolation region 19 may be provided around each circuit group. In the above embodiment, the P ⁻ type semiconductor substrate 1 is shown, but it is clear that the same effect can be obtained also for the N ⁻ type semiconductor substrate by using the N ⁺ type diffusion layer fixed potential body.

[0013]

As described above, according to the semiconductor integrated circuit of the present invention, it is a hybrid semiconductor integrated circuit in which analog circuit groups and other memory circuits, digital circuits and the like are mixed, and between the circuit groups. A diffusion layer fixed potential body is provided in
By connecting to the substrate potential, it is possible to prevent the influence of the circuit groups from each other, and it is possible to improve the performance and reliability of each circuit group.

[Brief description of drawings]

FIG. 1 is a cross-sectional view of a hybrid semiconductor integrated circuit according to an embodiment of the present invention.

FIG. 2 is a diagram schematically showing a pattern arrangement of the hybrid molding semiconductor integrated circuit shown in FIG.

FIG. 3 is a diagram schematically showing a pattern arrangement of a hybrid-molded semiconductor integrated circuit according to another embodiment of the present invention.

FIG. 4 is a diagram schematically showing a pattern layout of a hybrid-molded semiconductor integrated circuit according to another embodiment of the present invention.

[Explanation of symbols]

 1 semiconductor substrate 2 diffusion layer fixed potential body 3 collector region 4 base region 5 emitter region 6, 7 channel stopper 8 to 13 oxide film 14, 16 base electrode 15 emitter electrode 17 collector electrode 18 sub-contact 19 separation region 20 analog circuit group 21 Digital circuit 22 Other circuit groups

Claims (2)

[Claims] 1. A semiconductor integrated circuit in which an analog circuit group and a digital circuit group are mixedly mounted on a semiconductor substrate, the semiconductor integrated circuit being formed directly on the semiconductor substrate and between the analog circuit group and the digital circuit group. A semiconductor integrated circuit comprising a diffusion layer fixed potential body connected to a substrate potential of a substrate by a metal wiring. 2. A semiconductor integrated circuit in which an analog circuit group and a digital circuit group are mixedly mounted on a semiconductor substrate, the semiconductor integrated circuit being formed directly on the semiconductor substrate and surrounding the analog circuit group or the digital circuit group. A semiconductor integrated circuit comprising a diffusion layer fixed potential body connected to a substrate potential of a semiconductor substrate by a metal wiring.