JPH065763A - Ceramic circuit board - Google Patents

Ceramic circuit board

Info

Publication number
JPH065763A
JPH065763A JP16267792A JP16267792A JPH065763A JP H065763 A JPH065763 A JP H065763A JP 16267792 A JP16267792 A JP 16267792A JP 16267792 A JP16267792 A JP 16267792A JP H065763 A JPH065763 A JP H065763A
Authority
JP
Japan
Prior art keywords
circuit board
ceramic
terminal connecting
metal
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16267792A
Other languages
Japanese (ja)
Other versions
JP3194791B2 (en
Inventor
Yutaka Komorida
裕 小森田
Kazuo Matsumura
和男 松村
Kazuo Ikeda
和男 池田
Takayuki Naba
隆之 那波
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP16267792A priority Critical patent/JP3194791B2/en
Priority to US07/911,713 priority patent/US5328751A/en
Priority to EP92111918A priority patent/EP0523598B1/en
Priority to DE69217285T priority patent/DE69217285T2/en
Publication of JPH065763A publication Critical patent/JPH065763A/en
Application granted granted Critical
Publication of JP3194791B2 publication Critical patent/JP3194791B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124Aluminium (Al) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19107Disposition of discrete passive components off-chip wires

Abstract

PURPOSE:To ensure sufficient high reliability in the bonding of metallic circuit board even under a state where thermal stress due to heat cycle or mechanical stress is exerted for a long time. CONSTITUTION:A metallic circuit board 2 is bonded through a brazing material layer 3 containing active metal to the main surface 1a of a ceramic board 1. The metallic circuit board 2 has a plurality of circuit parts including a terminal connecting part 5. The terminal connecting part 5 has such structure as a gap 6 is provided partially between the metallic circuit board 2 and the ceramic board 1.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、セラミックス回路基板
に関する。
FIELD OF THE INVENTION The present invention relates to a ceramic circuit board.

【0002】[0002]

【従来の技術】近年、パワートランジスタモジュール用
基板やスイッチング電源モジュール用基板等の回路基板
として、セラミックス基板上に銅板等の金属板を接合し
たものが用いられている。また、上記セラミックス基板
としては、電気絶縁性を有すると共に、熱伝導性に優れ
た窒化アルミニウム基板、窒化ケイ素基板、炭化ケイ素
基板等が注目されている。
2. Description of the Related Art In recent years, as a circuit substrate such as a substrate for a power transistor module or a substrate for a switching power supply module, a ceramic substrate on which a metal plate such as a copper plate is bonded has been used. Further, as the ceramic substrate, an aluminum nitride substrate, a silicon nitride substrate, a silicon carbide substrate and the like, which have electrical insulation properties and are excellent in thermal conductivity, are attracting attention.

【0003】上述したような銅板等で回路を構成したセ
ラミックス基板は、例えばセラミックス基板上に銅板を
直接接合する、いわゆるDBC法(ダイレクト・ボンデ
ィング・カッパー法)や、4A族元素や5A族元素のような
活性金属を含むろう材を用いて、セラミックス基板上に
銅板等を接合する方法(活性金属ろう付け法)等によっ
て作製している。また、具体的な回路の形成方法として
は、予めプレス加工やエッチング加工によりパターニン
グした銅板を用いたり、接合後にエッチング等の手法に
よりパターニングする等の方法が知られている。
A ceramic substrate having a circuit formed of a copper plate or the like as described above includes, for example, a so-called DBC method (direct bonding copper method) in which a copper plate is directly bonded onto the ceramic substrate, or a 4A group element or a 5A group element. The brazing material containing such an active metal is used to produce a copper plate or the like on a ceramic substrate by a method (active metal brazing method) or the like. Further, as a concrete method of forming a circuit, a method of using a copper plate patterned in advance by press working or etching, or patterning by a technique such as etching after joining is known.

【0004】上記したDBC法や活性金属ろう付け法に
より得られるセラミックス回路基板は、いずれも単純構
造であるため、小型高実装化が可能であり、またマウン
ト工程も短縮できる等の利点を有している。また、活性
金属ろう付け法は、種々のセラミックス材料に直接使用
することができると共に、DBC法に比べて微細なパタ
ーンの再現性に優れる等の利点を有することから、一部
では活性金属接合法が多用されるようになってきてい
る。
The ceramic circuit boards obtained by the above-mentioned DBC method and active metal brazing method each have a simple structure, and therefore have the advantages that they can be made compact and highly mounted, and that the mounting process can be shortened. ing. In addition, the active metal brazing method can be directly used for various ceramic materials, and has an advantage of excellent reproducibility of fine patterns as compared with the DBC method. Is becoming popular.

【0005】ところで、半導体チップが搭載された、上
記活性金属ろう付け法によるセラミックス回路基板を、
パワートランジスタモジュール等に組み込む際には、銅
回路板等による回路の一部に端子をはんだ付けすること
によって、電源との導通を確保している。このようなモ
ジュールにおいては、電源スイッチのオン・オフにより
温度差が生じ、長時間にわたって上記温度差が繰り返し
付加されると、銅板とセラミックス基板との熱膨脹差に
よって、セラミックス基板側にクラックが生じるおそれ
がある。特に、セラミックス基板として窒化アルミニウ
ム基板を用いた場合には、他のセラミックスに比べて機
械的強度が低いことから、クラックが生じやすい。ま
た、端子は電源のオン・オフに伴って移動するため、機
械的な応力も印加される。上記した温度差による熱応力
や機械的な応力がさらに長時間印加されると、クラック
の部分からへき開破壊を起こし、セラミックス基板から
銅回路板が剥離して、モジュール自体の熱抵抗が上昇し
たり、さらには動作不良を招く等の問題があった。
By the way, a ceramic circuit board on which a semiconductor chip is mounted by the above-mentioned active metal brazing method is
When incorporated into a power transistor module or the like, a terminal is soldered to a part of a circuit made of a copper circuit board or the like to ensure continuity with a power supply. In such a module, a temperature difference is caused by turning the power switch on and off, and if the temperature difference is repeatedly applied for a long time, the thermal expansion difference between the copper plate and the ceramic substrate may cause a crack on the ceramic substrate side. There is. In particular, when an aluminum nitride substrate is used as the ceramic substrate, the mechanical strength is lower than that of other ceramics, and thus cracks are likely to occur. Further, since the terminals move with the turning on / off of the power source, mechanical stress is also applied. If thermal stress or mechanical stress due to the above temperature difference is applied for a longer period of time, cleavage cracks will occur from the cracked part, the copper circuit board will peel off from the ceramic substrate, and the thermal resistance of the module itself will rise. Further, there is a problem that it causes a malfunction.

【0006】[0006]

【発明が解決しようとする課題】上述したように、従来
の活性金属ろう付け法によるセラミックス回路基板にお
いては、電源スイッチのオン・オフにより生じる熱応力
や機械的な応力が印加されることによって、セラミック
ス基板側にクラックが生じたり、さらには金属回路板が
剥離する等の問題があった。
As described above, in the conventional ceramic circuit board by the active metal brazing method, thermal stress and mechanical stress generated by turning on / off the power switch are applied, There have been problems such as cracks on the ceramic substrate side and peeling of the metal circuit board.

【0007】本発明は、このような課題に対処するため
になされたもので、熱サイクルによる熱応力や機械的応
力が長時間にわたって印加されるような状況において
も、金属回路板の十分な接合信頼性を確保し得るセラミ
ックス回路基板を提供することを目的としている。
The present invention has been made in order to solve such a problem, and can sufficiently bond metal circuit boards even in a situation where thermal stress or mechanical stress due to a thermal cycle is applied for a long time. It is an object of the present invention to provide a ceramics circuit board that can ensure reliability.

【0008】[0008]

【課題を解決するための手段】本発明のセラミックス回
路基板は、セラミックス基板と、このセラミックス基板
の主面に活性金属を含むろう材層を介して接合され、端
子接続部を含む複数の回路部を有する金属回路板とを具
備するセラミックス回路基板において、前記金属回路板
の端子接続部は、前記セラミックス基板との間に一部間
隙が設けられた構造を有していることを特徴としてい
る。
A ceramics circuit board of the present invention is joined to a ceramics board through a brazing material layer containing an active metal on the main surface of the ceramics board, and a plurality of circuit parts including terminal connecting parts. In the ceramic circuit board including a metal circuit board having :, the terminal connection portion of the metal circuit board has a structure in which a gap is provided between the terminal connection portion and the ceramic board.

【0009】[0009]

【作用】本発明のセラミックス回路基板において、金属
回路板のうち端子接続部は、セラミックス基板との間に
間隙(未接合部)を有する構造とされている。このよう
な間隙を設けることにより、その上部の金属板がバネ的
な機能を有することになる。よって、モジュール作製時
に接続される端子の動きに伴う機械的な応力を緩和する
ことができると共に、端子からの温度サイクルが直接接
合部に付加されることを防止することができる。これら
によって、端子接続部の信頼性が大幅に向上する。
In the ceramic circuit board of the present invention, the terminal connecting portion of the metal circuit board has a gap (unbonded portion) with the ceramic substrate. By providing such a gap, the metal plate above it has a spring-like function. Therefore, it is possible to alleviate the mechanical stress associated with the movement of the terminals connected during the manufacture of the module and prevent the temperature cycle from the terminals from being directly applied to the joint. By these, the reliability of the terminal connection portion is significantly improved.

【0010】[0010]

【実施例】以下、本発明の実施例について図面を参照し
て説明する。
Embodiments of the present invention will be described below with reference to the drawings.

【0011】図1は、本発明の一実施例のセラミックス
回路基板の構成を示す断面図である。同図において、1
はセラミックス基板である。このセラミックス基板1の
材質は、特に限定されるものではなく、酸化アルミニウ
ム焼結体、ムライト焼結体(3Al2 O 3 −2SiO2 )等の酸
化物系焼結体から、窒化アルミニウム焼結体、窒化ケイ
素焼結体、炭化ケイ素焼結体等の非酸化物系焼結体ま
で、各種のセラミックス材料を適用することができる。
ただし、パワートランジスタや高周波トランジスタ等の
ように、発熱量が大きい半導体チップを搭載する場合に
は、熱伝導性に優れた窒化アルミニウム焼結体、窒化ケ
イ素焼結体、炭化ケイ素焼結体等を用いることが好まし
い。
FIG. 1 is a sectional view showing the structure of a ceramics circuit board according to an embodiment of the present invention. In the figure, 1
Is a ceramic substrate. The material of the ceramic substrate 1 is not particularly limited, and may be an oxide-based sintered body such as an aluminum oxide sintered body or a mullite sintered body (3Al 2 O 3 −2SiO 2 ), or an aluminum nitride sintered body. Various ceramic materials can be applied to non-oxide type sintered bodies such as a silicon nitride sintered body and a silicon carbide sintered body.
However, when mounting semiconductor chips that generate large amounts of heat, such as power transistors and high-frequency transistors, use aluminum nitride sintered bodies, silicon nitride sintered bodies, and silicon carbide sintered bodies that have excellent thermal conductivity. It is preferable to use.

【0012】上記セラミックス基板1の一方の主面1a
上には、所望のパターン形状を有する金属回路板2が、
活性金属を含むろう材(以下、活性金属ろう材と記す)
層3を介して接合されている。この金属回路板2の材質
としては、種々の金属材料を使用することが可能である
が、熱伝導性等を考慮して、銅または銅合金を用いるこ
とが好ましい。また、上記活性金属ろう材としては、 A
g-Cu共晶ろう材やCu系ろう材等に、活性金属としてTi、
Zr、Hf、Nb等の4A族元素や5A族元素を添加したものであ
り、例えば金属回路板とは Ag-Cuの共晶等を利用して、
またセラミックス基板とは活性金属とセラミックス基板
の成分元素との反応(例えば AlN基板であれば NとTi等
との反応)を利用して接合を行うものである。
One main surface 1a of the ceramic substrate 1
Above the metal circuit board 2 having a desired pattern shape,
Brazing material containing active metal (hereinafter referred to as active metal brazing material)
It is joined via the layer 3. As the material of the metal circuit board 2, various metal materials can be used, but it is preferable to use copper or a copper alloy in consideration of thermal conductivity and the like. As the active metal brazing material, A
g-Cu eutectic brazing filler metal, Cu-based brazing filler metal, etc.
Zr, Hf, Nb and other 4A group elements and 5A group elements are added, for example, using a eutectic of Ag-Cu with the metal circuit board,
In addition, the ceramics substrate is used for bonding by utilizing the reaction between the active metal and the constituent elements of the ceramics substrate (for example, the reaction between N and Ti in the case of AlN substrate).

【0013】上記金属回路板2には、所望形状にパター
ニングすることによって、複数の回路部が設けられてお
り、そのうちの回路部4は半導体チップ搭載部、回路部
5は端子接続部とされている。ここで、上記端子接続部
5となる金属板には、端子の接続位置に相当する部分
に、金属板の元厚の1/20〜 18/20程度の深さ、より好ま
しくは 1/4〜 1/2程度の深さの凹部6が設けられてい
る。そして、上記凹部6が形成された面側が接続面とさ
れ、凹部6を除く部分が活性金属ろう材層3を介して接
合されて端子接続部5が形成されている。
The metal circuit board 2 is provided with a plurality of circuit parts by patterning into a desired shape. Among them, the circuit part 4 is a semiconductor chip mounting part and the circuit part 5 is a terminal connecting part. There is. Here, the metal plate serving as the terminal connecting portion 5 has a depth of about 1/20 to 18/20 of the original thickness of the metal plate, more preferably 1/4 to A recess 6 having a depth of about 1/2 is provided. The surface side on which the concave portion 6 is formed serves as a connecting surface, and the portion excluding the concave portion 6 is joined via the active metal brazing material layer 3 to form the terminal connecting portion 5.

【0014】すなわち、金属回路板2の回路部のうち端
子接続部5は、セラミックス基板1との間に凹部6によ
り形成された間隙(未接合部)を有する構造とされてい
る。上記間隙6を有する端子接続部5は、モジュール作
製時に接続される端子の動き(電源スイッチのオン・オ
フに伴う移動)を、間隙6上部の金属板5aのバネ的な
働きにより緩和すると共に、端子からの温度サイクルが
直接接合部(活性金属ろう材層3による接合部)に付加
されることを、間隙6により防止するものである。な
お、他の回路部4は活性金属ろう材層3を介して一様に
接合されている。また、上記セラミックス基板1の他方
の主面1b上にも、活性金属ろう材層3を介して、接続
部やヒートシンク等となる金属板7、例えば銅板が接合
されている。これらによって、この実施例のセラミック
ス回路基板8が構成されている。上記したような構成を
有するセラミックス回路基板8は、例えば以下のように
して作製される。
That is, the terminal connecting portion 5 of the circuit portion of the metal circuit board 2 has a gap (unjoined portion) formed by the concave portion 6 with the ceramic substrate 1. The terminal connecting portion 5 having the gap 6 reduces the movement of the terminals connected during the module fabrication (movement associated with on / off of the power switch) by the spring-like action of the metal plate 5a above the gap 6, and The gap 6 prevents the temperature cycle from the terminals from being directly applied to the joint (the joint by the active metal brazing material layer 3). The other circuit parts 4 are evenly bonded through the active metal brazing material layer 3. Further, on the other main surface 1b of the ceramic substrate 1, a metal plate 7 such as a copper plate serving as a connecting portion, a heat sink, etc. is joined via the active metal brazing material layer 3. The ceramic circuit board 8 of this embodiment is constituted by these. The ceramic circuit board 8 having the above-described structure is manufactured, for example, as follows.

【0015】まず、セラミックス基板1例えば窒化アル
ミニウム基板に、設計回路パターンに応じて、ペースト
状の活性金属ろう材、例えばAg-Cu-Ti系ろう材(重量比
でAg:Cu:Ti=70.6:27.4:2.0) をスクリーン印刷等によっ
て塗布する。この際、端子接続部5の間隙6に相当する
部分を含めて、金属板の未接合部となる部分には、Ag-C
u-Ti系ろう材ペーストを塗布しない。
First, a paste-like active metal brazing material, for example, Ag—Cu—Ti based brazing material (weight ratio Ag: Cu: Ti = 70.6: 27.4: 2.0) is applied by screen printing or the like. At this time, Ag-C is included in the unbonded part of the metal plate, including the part corresponding to the gap 6 of the terminal connection part 5.
Do not apply u-Ti brazing paste.

【0016】一方、金属板例えば銅板にエッチング処理
やプレス加工を施して、所望のパターンを有する銅回路
板2を作製する。この際、端子接続部5となる部分につ
いては、所望形状の凹部6を形成する。この凹部6の深
さは、あまり浅いとバネ的機能や熱拡散効果を十分に得
ることができず、またあまり深くしすぎると電流容量を
十分に確保することができなくなるため、金属板の元厚
にもよるが、上述したように金属板の元厚の1/20〜 18/
20程度、さらには 1/4〜 1/2程度とすることが好まし
い。
On the other hand, a metal plate, for example, a copper plate is subjected to etching treatment or press working to produce a copper circuit board 2 having a desired pattern. At this time, a recess 6 having a desired shape is formed in a portion which will be the terminal connecting portion 5. If the depth of the recess 6 is too shallow, the spring function and the heat diffusion effect cannot be sufficiently obtained, and if it is too deep, the current capacity cannot be sufficiently secured. Although it depends on the thickness, it is 1/20 to 18 / of the original thickness of the metal plate as described above.
It is preferably about 20 and more preferably about 1/4 to 1/2.

【0017】次に、Ag-Cu-Ti系ろう材ペーストを塗布し
た窒化アルミニウム基板1上に、上記銅回路板2を配置
すると共に、窒化アルミニウム基板1の裏面側にも銅板
7を配置し、 1×104 Torr程度の真空中にて 850℃前後
に加熱し、その温度で10分間程度保持することにより、
窒化アルミニウム基板1と銅回路板2および銅板7をそ
れぞれ接合し、目的とするセラミックス回路基板8を得
る。
Next, the copper circuit board 2 is placed on the aluminum nitride substrate 1 coated with the Ag-Cu-Ti-based brazing material paste, and the copper plate 7 is also placed on the back surface side of the aluminum nitride substrate 1. By heating to around 850 ° C in a vacuum of about 1 × 10 4 Torr and holding at that temperature for about 10 minutes,
The aluminum nitride substrate 1, the copper circuit board 2 and the copper plate 7 are bonded to each other to obtain a desired ceramics circuit board 8.

【0018】なお、パターンの形成方法としては、Ag-C
u-Ti系ろう材ペーストを端子接続部5の間隙6に相当す
る部分を除いて塗布し、凹部6を有する銅板を配置して
加熱接合した後、エッチング処理によってパターンを形
成する方法を採用することも可能である。また、Ag-Cu-
Ti系ろう材はペースト状のものに限らず、箔として介在
させることも可能である。
The pattern forming method is Ag-C
A method of applying a u-Ti-based brazing material paste excluding a portion corresponding to the gap 6 of the terminal connecting portion 5, arranging a copper plate having a concave portion 6 and performing heat bonding, and then forming a pattern by etching is adopted. It is also possible. Also, Ag-Cu-
The Ti-based brazing material is not limited to the paste-like one, and it is possible to interpose it as a foil.

【0019】次に、上記セラミックス回路基板(窒化ア
ルミニウム回路基板)8を用いたパワートランジスタモ
ジュールについて、図2を参照して述べる。
Next, a power transistor module using the ceramic circuit board (aluminum nitride circuit board) 8 will be described with reference to FIG.

【0020】図2は、この実施例のパワートランジスタ
モジュールの要部を示す図であり、窒化アルミニウム回
路基板8における半導体チップ搭載部7には、パワート
ランジスタ9がAuハンダ10等によって接合搭載されて
いる。また、銅回路板2の端子接続部5には、その間隙
6の上方に相当する位置に、電源回路等に接続された端
子11がはんだ層12により接合されている。半導体チ
ップ搭載部7と端子接続部5、またパワートランジスタ
9と半導体チップ搭載部7の回路とは、それぞれAlワイ
ヤ13により電気的に接続されている。
FIG. 2 is a diagram showing a main part of the power transistor module of this embodiment. A power transistor 9 is bonded and mounted on a semiconductor chip mounting portion 7 of an aluminum nitride circuit board 8 by Au solder 10 or the like. There is. Further, to the terminal connection portion 5 of the copper circuit board 2, a terminal 11 connected to a power supply circuit or the like is joined by a solder layer 12 at a position corresponding to above the gap 6. The semiconductor chip mounting portion 7 and the terminal connecting portion 5, and the power transistor 9 and the circuit of the semiconductor chip mounting portion 7 are electrically connected by Al wires 13.

【0021】このように、パワートランジスタ9が搭載
され、かつ端子11が接合された窒化アルミニウム回路
基板8は、窒化アルミニウム基板1の裏面側の銅板7を
介して、ヒートシンク14にはんだ付け(はんだ層1
5)されており、これらによってパワートランジスタモ
ジュール16の要部が構成されている。
In this way, the aluminum nitride circuit board 8 on which the power transistor 9 is mounted and the terminals 11 are joined is soldered to the heat sink 14 (solder layer) via the copper plate 7 on the rear surface side of the aluminum nitride board 1. 1
5) and the main part of the power transistor module 16 is configured by these.

【0022】上述したようなパワートランジスタモジュ
ール16においては、銅回路板2の回路部のうち、端子
接続部5が窒化アルミニウム基板1との間に間隙6を有
する構造とされているため、電源回路のオン・オフに伴
って端子11が移動(図中、矢印Aで示す)したとして
も、間隙6上部の金属板5aのバネ的な働きにより、上
記端子11の移動による機械的応力を緩和することがで
きる。また、電源回路のオン・オフに伴って端子11か
ら温度サイクルが付加されても、間隙6により直接的に
接合部に熱が加わることを防止することができる。これ
らにより、端子接続部5の信頼性が大幅に向上し、よっ
て信頼性の高いモジュールを提供することが可能とな
る。
In the power transistor module 16 as described above, since the terminal connecting portion 5 of the circuit portion of the copper circuit board 2 has the gap 6 between the terminal connecting portion 5 and the aluminum nitride substrate 1, the power supply circuit is provided. Even if the terminal 11 moves (indicated by an arrow A in the figure) due to turning on and off, the metal plate 5a above the gap 6 acts like a spring to relieve the mechanical stress caused by the movement of the terminal 11. be able to. Further, even if a temperature cycle is applied from the terminal 11 as the power supply circuit is turned on and off, it is possible to prevent heat from being directly applied to the joint portion by the gap 6. As a result, the reliability of the terminal connecting portion 5 is significantly improved, and it is possible to provide a highly reliable module.

【0023】また、上記構成のパワートランジスタモジ
ュール(窒化アルミニウム基板1と銅回路板2(板厚
0.3mm、凹部深さ0.15mm))を実際に作製し、電源スイ
ッチのオン・オフを 10000サイクル繰り返し行った後、
端子接続部5の窒化アルミニウム基板1との接合面を観
察したところ、クラック等は一切観察されず、良好な状
態が保たれていた。これに対して、端子接続部5を一様
に接合する以外は、上記実施例と同様にして作製したパ
ワートランジスタモジュール(比較例)では、5000サイ
クル後に窒化アルミニウム基板1にクラックが生じ、さ
らに 10000サイクル後には銅回路板(端子接続部5)が
剥がれ、熱抵抗が大幅に増大した。
Further, the power transistor module having the above structure (the aluminum nitride substrate 1 and the copper circuit board 2 (the plate thickness
0.3mm, recess depth 0.15mm)) was actually manufactured, and the power switch was turned on and off repeatedly for 10000 cycles.
When the joint surface of the terminal connecting portion 5 with the aluminum nitride substrate 1 was observed, cracks and the like were not observed at all, and a good state was maintained. On the other hand, in the power transistor module (comparative example) manufactured in the same manner as in the above-described example except that the terminal connecting portions 5 were uniformly joined, the aluminum nitride substrate 1 was cracked after 5000 cycles, and further 10000 After the cycle, the copper circuit board (terminal connecting portion 5) was peeled off, and the thermal resistance was significantly increased.

【0024】次に、本発明の他の実施例について図3を
参照して説明する。図3は、この実施例のセラミックス
回路基板21を、上述した実施例と同様に、パワートラ
ンジスタモジュールに組み込んだ状態の要部を示してい
る。
Next, another embodiment of the present invention will be described with reference to FIG. FIG. 3 shows a main part of a state in which the ceramics circuit board 21 of this embodiment is incorporated in a power transistor module as in the above-mentioned embodiments.

【0025】この実施例のセラミックス回路基板21
は、金属回路板2における端子接続部22の一側面22
aから端子接続領域にかけて、活性金属ろう材層3を未
塗布とすることにより、未接合部(間隙23)が設けら
れている。すなわち、端子接続部22は、セラミックス
基板1との間に、活性金属ろう材の未塗布部分により形
成された間隙23を有する構造とされている。このよう
に、端子接続部22の一側面22aから端子接続領域に
かけて、未接合部すなわち間隙23を形成することによ
り、間隙23上の金属板がバネ的な機能を示し、前述し
た実施例と同様に、モジュール作製時に接続される端子
11の動きや、電源回路のオン・オフに伴う端子11か
らの温度サイクルを緩和することができる。これによっ
て、セラミックス回路基板21、さらにはパワートラン
ジスタモジュール等の信頼性を大幅に向上させることが
可能となる。
The ceramic circuit board 21 of this embodiment
Is one side surface 22 of the terminal connection portion 22 of the metal circuit board 2.
An unbonded portion (gap 23) is provided by not applying the active metal brazing material layer 3 from a to the terminal connection region. That is, the terminal connecting portion 22 has a structure having a gap 23 formed between the ceramic substrate 1 and an uncoated portion of the active metal brazing material. In this way, by forming the unbonded portion, that is, the gap 23 from the one side surface 22a of the terminal connection portion 22 to the terminal connection region, the metal plate on the gap 23 exhibits a spring-like function, similar to the above-described embodiment. In addition, the movement of the terminal 11 connected at the time of manufacturing the module and the temperature cycle from the terminal 11 due to the on / off of the power supply circuit can be alleviated. This makes it possible to greatly improve the reliability of the ceramic circuit board 21 and further the power transistor module and the like.

【0026】[0026]

【発明の効果】以上説明したように、本発明のセラミッ
クス回路基板によれば、電源スイッチのオン・オフによ
る熱サイクルや端子の移動による機械的応力が長時間に
わたって印加されるような状況においても、金属回路板
の接合信頼性を十分に確保することができる。よって、
信頼性に優れた各種モジュールを作製することが可能と
なる。
As described above, according to the ceramic circuit board of the present invention, even in a situation where a mechanical stress due to a thermal cycle due to on / off of a power switch or movement of terminals is applied for a long time. It is possible to sufficiently secure the joining reliability of the metal circuit board. Therefore,
It is possible to manufacture various modules with excellent reliability.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例によるセラミックス回路基板
の構造を示す断面図である。
FIG. 1 is a sectional view showing a structure of a ceramics circuit board according to an embodiment of the present invention.

【図2】図1に示すセラミックス回路基板をパワートラ
ンジスタモジュールに適用した一例の要部を示す断面図
である。
FIG. 2 is a cross-sectional view showing a main part of an example in which the ceramic circuit board shown in FIG. 1 is applied to a power transistor module.

【図3】本発明の他の実施例によるセラミックス回路基
板を用いたパワートランジスタモジュールの構造を示す
断面図である。
FIG. 3 is a sectional view showing a structure of a power transistor module using a ceramics circuit board according to another embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1……セラミックス基板 2……金属回路板 3……活性金属ろう材層 5……端子接続部 6……間隙 8……セラミックス回路基板 1 ... Ceramics substrate 2 ... Metal circuit board 3 ... Active metal brazing material layer 5 ... Terminal connection part 6 ... Gap 8 ... Ceramics circuit board

───────────────────────────────────────────────────── フロントページの続き (72)発明者 那波 隆之 神奈川県横浜市鶴見区末広町2の4 株式 会社東芝京浜事業所内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Takayuki Namba 4-4, 2 Suehiro-cho, Tsurumi-ku, Yokohama-shi, Kanagawa Toshiba Keihin Office

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 セラミックス基板と、このセラミックス
基板の主面に活性金属を含むろう材層を介して接合さ
れ、端子接続部を含む複数の回路部を有する金属回路板
とを具備するセラミックス回路基板において、 前記金属回路板の端子接続部は、前記セラミックス基板
との間に一部間隙が設けられた構造を有していることを
特徴とするセラミックス回路基板。
1. A ceramic circuit substrate comprising a ceramic substrate and a metal circuit board having a plurality of circuit portions including terminal connecting portions, which is joined to a main surface of the ceramic substrate via a brazing material layer containing an active metal. The ceramic circuit board according to claim 1, wherein the terminal connecting portion of the metal circuit board has a structure in which a gap is provided between the terminal connecting portion and the ceramic board.
JP16267792A 1991-07-12 1992-06-22 Ceramic circuit board Expired - Fee Related JP3194791B2 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP16267792A JP3194791B2 (en) 1992-06-22 1992-06-22 Ceramic circuit board
US07/911,713 US5328751A (en) 1991-07-12 1992-07-10 Ceramic circuit board with a curved lead terminal
EP92111918A EP0523598B1 (en) 1991-07-12 1992-07-13 Ceramics circuit board
DE69217285T DE69217285T2 (en) 1991-07-12 1992-07-13 Ceramic circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16267792A JP3194791B2 (en) 1992-06-22 1992-06-22 Ceramic circuit board

Publications (2)

Publication Number Publication Date
JPH065763A true JPH065763A (en) 1994-01-14
JP3194791B2 JP3194791B2 (en) 2001-08-06

Family

ID=15759197

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16267792A Expired - Fee Related JP3194791B2 (en) 1991-07-12 1992-06-22 Ceramic circuit board

Country Status (1)

Country Link
JP (1) JP3194791B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007165588A (en) * 2005-12-14 2007-06-28 Omron Corp Power module structure, and solid-state relay using same

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102378938B1 (en) * 2016-08-10 2022-03-25 주식회사 아모센스 Manufacturing Method of Substrate for High Frequency

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007165588A (en) * 2005-12-14 2007-06-28 Omron Corp Power module structure, and solid-state relay using same

Also Published As

Publication number Publication date
JP3194791B2 (en) 2001-08-06

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