JPH0656850B2 - Semiconductor device - Google Patents

Description

The present invention relates to a semiconductor device in which an overvoltage breakdown preventing element is added to a semiconductor circuit to which an overvoltage may be applied.

[Conventional technology]

The conventional semiconductor circuit is formed of a transistor and a resistor as seen in the example of Japanese Patent Laid-Open No. 56-79463, and its structure is more complicated than that of the present invention.

[Problems to be solved by the invention]

Therefore, the conventional overvoltage breakdown preventing element has a problem that it has a complicated structure and is easily affected by defects in the wiring and diffusion process, and has a high defect rate and a large variation in characteristics.

If an overvoltage destruction prevention element is not added to the semiconductor circuit, if an overvoltage is applied between the external input terminal of the semiconductor circuit and the power supply line or between the external input terminal and the ground line due to static electricity or lightning, etc. However, there is a problem that internal elements are destroyed.

[Means for solving problems]

In order to solve the above problems, a semiconductor device according to the present invention comprises a TTL circuit having an external terminal, a positive power supply line and a ground line, and a multi-collector type PNP transistor for preventing overvoltage breakdown. The collector-type PNP transistor is formed on a p-type semiconductor substrate and functions as a base region, an n-type semiconductor region formed in the n-type semiconductor region and functioning as an emitter region, and the n-type semiconductor region. A p-type semiconductor region formed in the type semiconductor region and functioning as a first collector region, and a p-type semiconductor formed so as to separate the n-type semiconductor region from other elements and functioning as a second collector region. A region, the first collector region is connected to a positive power supply line of the TTL circuit, and the second collector region is provided via the p-type semiconductor substrate. Connected to the ground line of the serial TTL circuit, connecting the emitter region to an external terminal of said TTL circuit, characterized in that the said base region and an open state.

[Action]

During normal operation of the TTL circuit, the base of the multi-collector type PNP transistor is in an open state.
When the overvoltage is not applied to the external terminal, the current does not flow in the PNP transistor in a steady state, but when the overvoltage is applied to the external terminal due to static electricity or the like, the emitter-base junction of the PNP transistor becomes conductive, whereby the PNP transistor becomes It is turned on, and the overvoltage charge is discharged from the external terminal to the positive power supply line through the emitter and the first collector, and the overvoltage charge is also discharged to the ground line from the external terminal through the emitter and the second collector. When there is a large amount of overvoltage charge, breakdown occurs between the emitter and collector of the PNP transistor and discharge is completed.

On the other hand, during the manufacture of the TTL circuit, overvoltage charges may be applied to the positive power supply line and the ground line in the floating state. At this time, if the external terminal is grounded, the overvoltage charge is conventionally discharged to the external terminal through the inside of the TTL circuit. However, according to the present invention, the multi-collector PNP transistor is used without passing through the inside of the TTL circuit. The overvoltage charge is discharged from the first and second collectors, which are respectively connected to the positive power supply line and the ground line, through the emitter to the external terminal. In this case, the collector of the PNP transistor acts as the emitter and the emitter acts as the collector. In this way, overvoltage breakdown of the internal elements of the TTL circuit is prevented.

In addition, the PNP transistor is generally characterized in that it is easy to bring the forward transistor characteristic and the reverse transistor characteristic close to each other, and the characteristics as a transistor can be maintained even if the collector and the emitter are used in reverse. Therefore, it is possible to easily combine the elements, thereby reducing the area occupied by the PNP transistor as the protection element.

〔Example〕

 Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a circuit diagram of a semiconductor device according to an embodiment of the present invention. In this embodiment, as an example of a semiconductor circuit, a TTL (Tran
sistor Transistor Logic) circuit is adopted. In the figure, overvoltage breakdown preventing elements P ₁ , P ₂ , P ₃ and P ₄
Are respectively connected between the input terminal I and the power supply line Vcc, between the input terminal I and the ground line GND, between the output terminal O and the power supply line Vcc, and between the output terminal O and the ground line GND. ing. Each overvoltage breakdown prevention element is composed of a PNP transistor Q, the emitter of which is connected to the input terminal I or the output terminal O, the collector of which is connected to the power supply line Vcc or the ground line GND, and the base of which is open.

When a pulse with a large amplitude due to a sharp rise due to static electricity or lightning is applied to the input terminal I or the output terminal O, a current for charging up the base flows between the emitter and base of the PNP transistor Q, and this is the PNP transistor. Q
, The PNP transistor Q is turned on. Due to the ON current of the PNP transistor, the overvoltage charge on the input terminal I or the output terminal O is discharged to the power supply line Vcc or the ground line GND. Therefore, the internal element of the TTL circuit, in the figure, the input diode D ₁ , the clamp Diode D
_{2. The} output transistor T _{1 and the} like are prevented from being damaged by overvoltage.

In the normal use state, the input terminal I or the output terminal O
Between the power line Vcc and the power line Vcc as shown in the figure.
Before the provision of ₁ and P ₃ , the overvoltage charge is discharged to the ground line GND through the overvoltage destruction prevention elements P ₂ and P ₄ , but during the manufacture of the TTL circuit, both the ground line and the power line are electrically connected. Since it is in the floating state, the overvoltage breakdown preventing elements P ₁ and P ₃ are provided in consideration of the discharge to the power supply line Vcc.

FIG. 2 is a diagram showing an example of one sectional structure of the PNP transistor Q in the circuit of FIG. In FIG. 2, an epitaxial layer 2 having a concentration of n ⁻ is formed on a P-type substrate 1 having a concentration of P ⁻ , and a diffusion layer 3 having a concentration of P ⁺ is formed in the epitaxial layer 2. Is the concentration P
It is isolated from other elements by the ⁺ isolation region 4. The epitaxial layer 2 is the base region of the PNP transistor, the P ⁺ diffusion layer 3 is the emitter region, and the P ⁺ isolation region 4
Is a collector region. Since the isolation region 4 is grounded via the P ^{− type} substrate 1, the structure of FIG. ₂ is applicable only to the devices P ₂ and P ₄ of FIG.

FIG. 3 is a diagram showing a sectional structure of an element applicable to the elements P ₁ and P ₃ of FIG. In FIG. 3, P ^{+ type} diffusion layers 31 and 32 are provided in the epitaxial layer 2, and the other structure is the same as that in FIG. 2. According to the structure shown in FIG. 3, the emitter region of the PNP transistor is the P ^{+ type} diffusion region 31, the collector region is the P ^{+ type} diffusion region 32, and the grounded substrate and the collector region are electrically separated. , The collector can be connected to the power line Vcc.

FIG. 4 is a circuit diagram of a PNP transistor as an overcurrent breakdown preventing element according to another embodiment of the present invention. In FIG. 4, a multi-collector PNP transistor Q ₁ is adopted, which is an overvoltage breakdown preventing element P _{1 to} P _{4 of} FIG.
Can be used instead of.

FIG. 5 is a diagram showing a cross-sectional structure of the device of FIG. Fifth
In the figure, the P ^{+ -type} diffusion layer 3 is formed in the epitaxial layer 2.
4 and 35 are provided, and other structures are the same as those in FIG. With the structure shown in FIG. 5, the first of the PNP transistor Q ₁ is
The collector is grounded via the P ^{+ -type} isolation region 4 and the P ^{− -type} substrate, the P ^{+ -type} diffusion layer 34 becomes the emitter region, the P ^{+ -type} diffusion layer 35 becomes the second collector region, and the n ⁻ -type epitaxial layer 2 becomes It becomes the base area.

As is clear from the cross-sectional structures shown in FIGS. 2, 3, and 5, the PNP transistors Q and Q ₁ can have their emitters acting as collectors and their collectors acting as emitters. . Therefore, FIGS. 1 and 4
Even if the collectors of the PNP transistors Q and Q ₁ shown in the figure are designated as emitters and the emitters are designated as collectors, they are within the scope of the present invention.

〔The invention's effect〕

As described above, according to the present invention, since the base of the PNP transistor is opened as the overvoltage destruction prevention element, the current does not flow to the overvoltage destruction prevention element in the steady state where the overvoltage is not applied, so that the power is not wasted. If the overvoltage due to static electricity is applied to the external terminal of the semiconductor circuit, the charge that causes the overvoltage is discharged to the power supply line or the ground line through the overvoltage destruction prevention element. It is possible to prevent destruction of the element due to overvoltage.

Further, as is clear from the element structure, the PNP transistor has a characteristic that the characteristics as a transistor can be maintained even if the collector and the emitter are used in reverse, in other words, the forward direction transistor characteristic and the reverse direction transistor characteristic are similar. Since it has the feature that it is easy to combine the elements, it is possible to reduce the area occupied by the protection circuit (that is, the PNP transistor as the protection element).

Although the TTL circuit is adopted in the above-mentioned embodiment,
The present invention is not limited to this, and can be applied to any semiconductor circuit. For example, when applied to an ECL circuit, the overvoltage charge is O
It is discharged to the V power line and the negative voltage power line.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a semiconductor device according to an embodiment of the present invention,
FIG. 2 is a diagram showing an example of one sectional structure of the PNP transistor in the circuit of FIG. 1, and FIG. 3 is a PNP in the circuit of FIG.
FIG. 4 is a diagram showing another example of one sectional structure of a transistor, FIG. 4 is a circuit diagram of a PNP transistor as an overvoltage breakdown preventing element according to another embodiment of the present invention, and FIG. 5 is a sectional view of the element of FIG. It is a figure which shows a structure. Q ...... PNP transistor, I ...... input terminal, O ...... output _{terminals, P 1, P 2, P} 3, P 4 ...... overvoltage breakdown prevention device, Vcc ...... power supply line, GND ...... ground line.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Akinori Tahara 1015 Kamiodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Within Fujitsu Limited (56) References JP-A-56-79463 (JP, A) JP-A-58-159370 (JP, A) JP-A-53-58777 (JP, A)

Claims (1)

[Claims] 1. A TTL circuit having an external terminal (I, O), a positive power supply line (Vcc) and a ground line (GND), and a multi-collector type PNP transistor (Q ₁ ) for preventing overvoltage breakdown, The multi-collector PNP transistor is formed on a p-type semiconductor substrate (1) and functions as a base region, and an n-type semiconductor region (2), and is formed in the n-type semiconductor region and functions as an emitter region. a p-type semiconductor region (34) and a first formed in the n-type semiconductor region.
P-type semiconductor region (35) functioning as a collector region of
And a p-type semiconductor region (4) formed so as to separate the n-type semiconductor region from other elements and functioning as a second collector region, and the first collector region (35) is included in the first collector region (35). The second collector region (4) is connected to the ground line of the TTL circuit via the p-type semiconductor substrate, and the emitter region (34) is connected to the outside of the TTL circuit. A semiconductor device, characterized in that it is connected to a terminal and the base region (2) is opened.