JPH065611A - Manufacture of silicon wafer - Google Patents

Abstract

PURPOSE:To provide a silicon wafer manufacturing method by which a completely mirror-faced IG silicon wafer can be obtained. CONSTITUTION:A silicon single crystal rod, which is pulled up by CZ method, is sliced (S11) into wafers of 650mum in thickness, for example. After a chamfering process has been conducted on these silicon wafers, for example, the silicon wafers are lapped (S12) to remove the strain caused by machining. After the distortion by lapping has been removed by etching (S13), the silicon wafers are washed (S14) and the etching solution is removed completely. At this point, an IG heat treatment is conducted on the silicon wafers by a known method (S15). After the heat treatment, mirror face is obtained on the IG wafer by polishing (S16). Further, after washing (S17), the wafers are sent to the next device process (S18).

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention forms a gettering layer, which is a high density defect region, inside a silicon wafer.
The present invention relates to a method for manufacturing a silicon wafer that has been subjected to G (intrinsic gettering) heat treatment.

[0002]

2. Description of the Related Art As shown in FIG. 2, a silicon wafer is manufactured by slicing a silicon single crystal (S21), lapping a sliced silicon wafer (S22), etching a lap surface (S23), and mirror-finishing by polishing (S23). S
24), the cleaning of the mirror surface (S25) is performed by a silicon maker in this order. Then, the silicon wafer thus manufactured is subjected to IG heat treatment (S27) after cleaning (S26) in the device maker. As a result, a defect-free layer (DZ) is formed on the surface of this silicon wafer and a gettering layer is formed inside it. Then, a desired device is formed on this IG wafer through a predetermined process (S28).

As the IG heat treatment method for this silicon wafer, high temperature heat treatment at 1000 to 1150 ° C., 950
The low temperature heat treatment at 1000C and the low temperature heat treatment at 1000 ° C are performed. The first-stage high-temperature heat treatment is to out-diffuse oxygen from the surface of the silicon wafer to form a DZ (defect-free layer) on the surface of the wafer to a thickness of, for example, 20 to 50 μm. The second-stage low-temperature heat treatment is for forming a high-density defect region (gettering layer) inside the wafer, and is for forming a nucleus to become this defect. Further, the temperature of the third stage precipitation heat treatment is higher than that of the second stage heat treatment and the temperature is maintained to accelerate the growth of the defects.

[0004]

However, in such a conventional manufacturing method, a predetermined I after the mirror polishing is performed.
Since G heat treatment was applied to the silicon wafer,
There has been a problem that the surface integrity is impaired due to handling scratches and the like during this heat treatment process.

Therefore, the present invention provides a method for manufacturing a silicon wafer which can obtain an IG silicon wafer having a perfect mirror surface state by performing the IG heat treatment before the mirror polishing and after the etching step. The purpose is to do.

[0006]

According to a first aspect of the present invention, a high temperature heat treatment and a low temperature heat treatment are performed to form a defect-free layer on the surface of a silicon wafer and a gettering layer inside thereof. In a method for manufacturing a silicon wafer including an IG heat treatment step for a silicon wafer, the above IG heat treatment step is performed on the silicon wafer after the lapping etching step, and then the silicon wafer is mirror-polished.

[0007]

According to the present invention, a silicon wafer obtained by slicing a single crystal is subjected to a lapping step, an etching step, an IG heat treatment step, and then a mirror polishing step. Therefore, the defects generated on the surface of the silicon wafer by the IG heat treatment step can be easily removed by mirror polishing. Alternatively, when a large defect such as SF (stacking fault) is generated by the IG heat treatment,
By discarding the silicon wafer, it is possible to prevent defects in subsequent device steps in advance. Also, the dielectric strength of the oxide film is better than that of the conventional product.

[0008]

Embodiments of the present invention will be described below with reference to FIG. FIG. 1 is a flowchart showing a method for manufacturing a silicon wafer according to the present invention. As shown in this figure, a silicon single crystal ingot pulled up by, for example, the CZ method is sliced to have a thickness of, for example, 650 μm (S11), chamfered, and then wrapped (S12). Then, this silicon wafer is etched and then washed (S1
3, S14), where the silicon wafer is subjected to IG heat treatment (S15). After that, this IG wafer is polished (S16) and further washed (S1).
7), which is sent to the next device step (S18).
In the device process, for example, a DZ is further formed on the silicon wafer by heat treatment during the process such as CMOS,
The desired device can be built into the DZ layer.

In the IG heat treatment (S15), after the high temperature heat treatment at, for example, 1150 ° C. is performed as the first stage heat treatment,
The second stage low temperature heat treatment is performed. The second stage heat treatment is a ramping heat treatment with a starting temperature of 350 to 650 ° C. Furthermore, the third stage precipitation heat treatment after this is 900-
It was carried out at 1100 ° C. The first high-temperature heat treatment out-diffuses oxygen from the surface of the silicon wafer and forms a DZ (defect-free layer) on the surface of the wafer, for example, 20 to 50 μm.
It is formed to a thickness of m. The low-temperature heat treatment in the second stage forms a high-density defect region (gettering layer) inside the wafer, and therefore forms a nucleus to become this defect. Further, the temperature of the third stage precipitation heat treatment is higher than that of the second stage heat treatment and the temperature is maintained, and the fine defect nuclei are grown to form fine defects centering on oxygen precipitates.

The silicon wafer used in the above treatment is
A silicon wafer produced from a crystal stopped for 2 hours by pulling, having a diameter of 5 inches, P type, <100> orientation, specific resistance of 10 Ω · cm, and oxygen concentration of 9 × 10 ¹⁷ atoms / cm 3.
³ to 18 × 10 ¹³ atoms / cm ³ (JEIDA).

As an inspection method after the completion of the wafer,
After the evaluation heat treatment at 1000 ° C. for about 5 hours, Secco etching (selective etching) is performed, so that the DZ layer and the IG layer can be easily confirmed.

[0012]

According to the method of the present invention, it is possible to obtain a silicon wafer which has been subjected to IG heat treatment and has no handling scratches or the like on its surface. Further, a silicon wafer having a serious defect on the surface due to the IG heat treatment step can be discarded and such a defective wafer is not sent to the device step. Also, a good breakdown voltage of the oxide film can be obtained.

[Brief description of drawings]

FIG. 1 is a flowchart showing a method for manufacturing a silicon wafer according to the present invention.

FIG. 2 is a flowchart showing a conventional method for manufacturing a silicon wafer.

Claims (1)

[Claims] 1. A method of manufacturing a silicon wafer, comprising: a high temperature heat treatment followed by a low temperature heat treatment to form a defect-free layer on a surface of the silicon wafer and to form a gettering layer therein, the IG heat treatment step of the silicon wafer. In the method for manufacturing a silicon wafer, the IG heat treatment step is performed on the silicon wafer after the lapping etching step, and then the silicon wafer is mirror-polished.