JPH06310517A - Semiconductor substrate and its manufacture - Google Patents

Abstract

PURPOSE:To reduce faults of a wafer surface and to improve gettering ability by performing heat treatment at a specified temperature for a fixed time in oxygen atmosphere, by further performing heat treatment at a specified temperature for a specified time and by making an average BMD density from a substrate surface to a specified depth during BMD observation within a specified range thereafter. CONSTITUTION:(ST1): Si crystal is formed by CZ method. (ST2): A CZ wafer is prepared. (STY): Heat treatment is performed in nonoxide atmosphere at 1150 deg.C or higher and for at least 30 minutes. (ST4): Heat treatment is performed for the wafer at 780 deg.C for 3 hours in oxygen atmosphere. (ST5): Successively, heat treatment is performed similarly at 1000 deg.C for 16 hours in oxygen atmosphere. Thereafter, a semiconductor substrate whose average BMD density from a substrate surface to a depth of 10mum during BMD observation is 5X10<2> to 5X10<6>cm<-3> is prepared. Thereby, it is possible to make an area near a wafer surface free from fault and to realize enough gettering ability.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor substrate and a method of manufacturing the same, and more particularly to controlling the generation of oxygen precipitates formed on the surface of a silicon (Si) wafer to reduce device defects and the like. It is used to obtain a semiconductor substrate that improves the manufacturing yield.

[0002]

2. Description of the Related Art Conventionally, an IG (Intrin) in which a BMD (Bulk Micro Defect) is formed inside a substrate to reduce device defects.
sic Gettering) substrate is used. BMD is an oxygen precipitate. According to this IG substrate, the metal impurities are gettered by the BMD, absorbed in the defect center existing in a place unrelated to the device characteristics, generation of crystal defects due to contamination on the wafer surface, and P-N junction. Device defects such as leaks can be reduced.

Since the IG effect increases in proportion to the BMD density, it is desirable that the BMD be contained in a large amount inside the substrate.

Usually, this IG substrate is subjected to a heat treatment at about 1200 ° C. in an oxidizing atmosphere to form a DZ (Denuded zone) layer as a defect-free layer on the substrate surface, and then 800 ° C. for the substrate. Low temperature heat treatment of about 100
BMD is formed only inside the substrate by performing a medium temperature heat treatment at about 0 ° C.

[0005]

However, although it was said that the inside of the DZ layer was defect-free, as a result of detailed examination of the DZ layer, BMD was present in this DZ layer at a considerable density.

FIG. 3A illustrates a depth-wise profile of BMD density in a conventional substrate. The solid line is C
A CZ substrate made of a crystal grown by the Z (CZochralski) method and a broken line are shown for the IG substrate, respectively. In CZ, a low temperature heat treatment of about 800 ° C. and a medium temperature heat treatment of about 1000 ° C. are made to reveal BMD. It has been processed. As shown in this figure, even in the IG substrate, 10 ⁷ to 18 ⁸ c are formed in a region from the surface to be the DZ layer to a depth of 10 μm.
It can be seen that BMD of m ^-3 is present.

Further, FIG. 3B illustrates a BMD distribution state observed when a conventional IG substrate is subjected to a predetermined process and a cross section in the depth direction thereof is taken and observed with a microscope. Reference numeral 31 is a substrate surface, and 32 is a BMD. As shown in this figure, it can be seen that many BMDs are present on the wafer surface.

Then, it has become clear that the BMD in the DZ layer, which is said to be defect-free, causes device failure.

As mentioned above, in order to improve the IG effect, BM
It is desirable to increase the D density and getter capability, but by increasing the BMD density inside the substrate, the B in the DZ layer is increased.
Since MD also increases, there is a practical limit to improving the getter ability.

As the miniaturization of LSI progresses, demands for improvement of such problems are increasing.

The present invention has been made in view of such circumstances, and an object of the present invention is to provide a semiconductor substrate and a manufacturing method thereof in which defects near the wafer surface are reduced and at the same time getter capability is improved. Especially.

[0012]

The semiconductor substrate of the present invention comprises:
After performing heat treatment at 780 ° C. for 3 hours in an oxygen atmosphere, and subsequently performing heat treatment at 1000 ° C. for 16 hours in an oxygen atmosphere, a BMD observation was performed up to a depth of 10 μm from the substrate surface. Average BMD density is 5 × 10 ^{2 to} 5
It is × 10 ⁶ cm ^-3 .

The BMD density of the layer having a depth of 20 μm or more from the surface is 5 × 10 ⁷ cm ⁻³ or more.

Further, the semiconductor substrate of the present invention comprises a step of immersing a single crystal semiconductor seed crystal in a molten semiconductor and pulling it up to obtain a semiconductor crystal having an orientational arrangement of the seed crystal, and the semiconductor crystal. It can be prepared by a manufacturing method including a step of molding a crystal body into a substrate shape and a step of subjecting the substrate-shaped molded body to a heat treatment at 1150 ° C. or higher for 30 minutes or longer in a non-oxidizing atmosphere.

In the heat treatment step, H ₂ , CO, CO ₂ ,
The substrate-shaped compact may be heat-treated in at least one non-oxidizing atmosphere of Ar, He, Ne, Kr, and Xe.

[0016]

According to the semiconductor substrate of the present invention, the depth from the surface of the substrate is 5 × 10 ⁷ cm ⁻³ or more in the inside of 20 μm or more, and 5 × 10 ^{2 to} 5 × in the shallow layer near the substrate surface.
It has a BMD density profile in the depth direction of 10 ⁶ cm ^−3, and a BMD density of 5 × 10 ^{2 to} 5 × 16 ⁶ cm ⁻³ near the surface is negligible to the device characteristics, and A sufficient getter capability can be realized according to the BMD density of the internal BMD layer. Therefore, it is possible to obtain a semiconductor substrate with improved getter capability while reducing defects near the wafer surface.

The BMD density of the internal BMD layer having a depth of 20 μm or more from the surface is 5 × 1 from the boundary with the layer near the surface.
Since it becomes 0 ⁷ cm ⁻³ or more and becomes sharply higher, the high density internal BMD layer can be brought close to the wafer surface, and the getter effect can be obtained more reliably.

[0018]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows an embodiment of a method for manufacturing a semiconductor substrate according to the present invention.

In this figure, first, Si is formed by the CZ method.
A crystal is grown (stage ST1), and then, for example, a rod-shaped crystal body made of the Si crystal is cut into a thin plate shape by a cutting device such as a diamond cutter, and one surface of each thin plate is polished like a mirror. A CZ wafer is created by performing processing such as forming the wafer surface (stage ST2).

Here, the Czochralski method will be described. First, silicon, which is a material for crystals, is put into a crucible such as quartz, heated to melt the silicon, and kept at a temperature slightly higher than the melting point of silicon. A single crystal seed crystal is immersed in the melted silicon, and then slowly pulled up to obtain a large columnar silicon single crystal having the orientation of the seed crystal.

One of the modifications of the Czochralski method is continuous C
There is a Z (CCZ) method, and a silicon single crystal is grown by adding a silicon raw material to the crucible by various methods.

Another modification is a magnetic CZ (MCZ) method, which controls the flow of molten silicon in a crucible by applying a constant magnetic field on the molten silicon.

As a further modification, a two-layer CZ (DLC
There is a Z) method, in which a molten silicon layer is laminated on a solid silicon layer in a crucible, the temperature distribution in the crucible is controlled, and the solid silicon layer is melted while the seed crystal is dropped and pulled up.

Except for the DLCZ method, the CZ method is described in Materials Science and Engineering, B4 (1989) p.
1-10 Status and Future of Silicon Grystal Gro
Wth (Werner Zulehner).

The CZ wafer produced as described above is subjected to a heat treatment at 1150 ° C. or higher for 30 minutes or longer in a non-oxidizing atmosphere (stage ST3). This can take the form of heat treatment at 1200 ° C. for 1 hour in 100% hydrogen gas, for example.

By the above stages ST1 to ST3,
As shown in FIG. 2A, the depth from the surface 21 is 20 μm.
5 × 10 ⁷ cm ⁻³ or more in the inside of m or more, and 5 × 10 ^{2 to} 5 × 10 ⁶ cm in the shallow layer near the surface 21.
A wafer having a BMD density profile in the depth direction of ⁻³ is created.

This BMD density profile can be visually confirmed by a microscope or the like in a state as shown in FIG. 2B by subjecting this wafer to the following processing.

That is, first, the wafer is heat-treated at 780 ° C. for 3 hours in an oxygen atmosphere (stage ST4). Then, in the same oxygen atmosphere, 100
Heat treatment is performed at 0 ° C. for 16 hours (stage ST5). As a result, the BMD nuclei formed on the stage ST4 become large, and the state shown in FIG. 2B is obtained.

As a result, the wafer can be evaluated. Actually, as the stage ST3, the above-mentioned 100
A heat treatment was performed at 1200 ° C. for 1 hour in a% H ₂ gas, and the produced wafer was evaluated as a sample.
At this time, for comparison, with respect to the CZ wafer as the first conventional example and the CZ wafer as the second conventional example, N ₂ /
I was heat-treated at 1200 ° C. for 4 hours in an O ₂ atmosphere I
The G wafer was simultaneously evaluated as a sample.

At this time, of course, each wafer was subjected to the heat treatment of the stages ST4 and ST5.

By observing the BMD densities of the wafer prepared according to the present invention and the conventional CZ wafer and IG wafer by the infrared tomography method, it is shown in FIG.
A clear DZ layer is observed as shown in FIG. The CZ wafer, which is the first conventional example, has a surface B as shown in FIG.
The MD density was also high, and BMD was observed almost uniformly in the depth direction. IG wafer as a second conventional example In FIG. 3 (B), the lowering of the surface BMD is seen as compared with the CZ wafer as shown in FIG. 3 (A), but it is larger than that of this embodiment in FIG. 2 (A). Therefore, a moderate increase in BMD is seen toward the inside of the wafer.

Furthermore, the stages ST1 to ST3 of this embodiment
Using the wafers thus prepared and the wafers of the first and second conventional examples, 16MDRAM was prototyped and the device characteristics were examined. As a result, the manufacturing yield was Example> Second conventional example> First conventional example. .

Incidentally, according to the present embodiment, the manufacturing yield was improved by 10%. It was confirmed that this was due to a decrease in P-N junction leak defects due to crystal defects on the surface portion and pause defects indicating the data retention capacity of the capacitor. It was also confirmed that the internal BMD density can be made higher than that of the conventional example, so that destabilization of the manufacturing yield due to contamination in the device process could be prevented.

Further, the wafer of this embodiment, the first conventional example wafer, and the second conventional example wafer were each subjected to the heat treatment of the stages ST4 and ST5, and the average BMD density of the surface of each wafer to 10 μm, and 20μ
When the BMD density after m was evaluated, it was confirmed that this example satisfies the conditions of the present invention as shown in Table 1. In addition, SMD (Surface Micro Defed), which is a type of surface defect, time resistance of oxide film breakdown voltage and dielectric breakdown of oxide film, T
The random failure rate in the DDB (Time Dependent Dielectric Breakdown) test was evaluated. Table 2 shows each evaluation result.

With respect to SMD, ammonia: hydrogen peroxide: water = 1: 1 to 2: 5 to 5 in the RCA cleaning proposed by the American RCA Company in 1970 for each wafer.
The post-evaluation was performed using the SC-1 solution of No. 7 (hereinafter referred to as SC-1 cleaning).

[0036]

[Table 1]

[0037]

[Table 2] As can be seen from Table 2, in the wafer of this embodiment, the SMD, which is a crystal defect other than BMD on the surface of the substrate, has a lower density than those of the first conventional example and the second conventional example. It was confirmed that the withstand voltage failure and TDDB accidental failure can be significantly reduced.

When performing the heat treatment of the stage ST3, H ₂ , CO, CO ₂ , Ar, He, Ne, Kr,
It has been confirmed that similar effects can be obtained in a single non-oxidizing atmosphere such as Xe or in an atmosphere in which the above gases are mixed. Unless the heat treatment temperature and time are 1150 ° C or higher and 30 minutes or longer, oxygen out of solution in the Si substrate cannot be sufficiently out-diffused and sufficient crystal defects near the wafer surface cannot be reduced. The heat treatment temperature and time of 30 minutes or more are required. However, in the heat treatment of stage ST3, when the temperature becomes 1415 ° C. or higher, silicon is melted. Therefore, the heat treatment temperature is 1150 ° C. or higher,
It is less than 1415 ° C.

[0039]

As described above, according to the present invention, when the depth from the wafer surface is 20 μm or more, 5 × 1
0 ⁷ cm ^-3 or more, 5 in the shallow layer near the surface
A semiconductor substrate having a BMD density profile in the depth direction of x10 ^{2 to} 5x10 ⁶ cm ^-3 is created, and the vicinity of the wafer surface can be made virtually defect-free, while at the same time a sufficient gettering capability is obtained. Can be realized.

B from the wafer surface to 10 μm
Surface BMD when MD density is more than 5 × 10 ⁶ cm ^-3
This causes a device defect such as a P-N junction leak defect, which is a problem. This case corresponds to the second conventional example, and the more extreme case is the first conventional example. On the other hand, in the present invention, B
The MD density profile becomes steep. In addition, the substance of BMD is that oxygen dissolved in the Si substrate is precipitated as SiO ₂ , and the increase in the volume of BMD as the BMD grows exceeds the decrease in the volume of the host Si crystal. For this reason, lattice strain occurs as the BMD grows, and the lattice strain further increases in the steep BMD density profile of the present invention. For this reason, if the lattice strain due to BMD is too large, S due to thermal stress in the thermal process during the device manufacturing process.
Dislocations occur in the i-wafer, and the dislocations cause device defects such as PN junction defects. As a countermeasure, relief of thermal stress in the thermal process during the process can be considered first. However, since this lowers the throughput of the device manufacturing process, in the present invention, the BMD density from the surface to 10 μm is 5%.
The problem of lattice distortion due to the BMD density profile was solved without drastically reducing the throughput of the device manufacturing process by setting it to be 10 ² cm ^-3 or more. Also,
BMD density from wafer surface to 10μm is 5 × 10
^If it is less than ² cm ⁻³ , the BMD density inside the substrate becomes 5 × 10 ⁷ cm ⁻³ or less by the current Si crystal growth method,
From this viewpoint, it is necessary to set the BMD density from the surface to 10 μm to 5 × 10 ² cm ⁻³ or more because sufficient gettering ability cannot be obtained in the device manufacturing process and device failure occurs. Actually BM inside 20 μm or more
When the D density is 5 × 10 ⁷ cm ⁻³ or less, crystal defects (OSFs, dislocations) occur on the wafer surface due to metal contamination during the device manufacturing process due to insufficient getter capability, resulting in device defects such as PN junction leak defects. 16 MDRA to occur
Confirmed with M and gate array, 20μ from the surface
It was confirmed that the internal BMD density of m or more was required to be 5 × 10 ⁷ cm ⁻³ or more.

[Brief description of drawings]

FIG. 1 is a block diagram showing a flow of a manufacturing process according to an embodiment of the present invention.

FIG. 2 is an explanatory view showing a BMD density profile of a wafer produced by the manufacturing method shown in FIG. 1 by a graph (A) and an enlarged sectional view (B).

FIG. 3 is a graph (A) (CZ, IG) and an enlarged sectional view (B) (I) showing the BMD density profile of a conventional wafer.
Explanatory drawing shown by G).

[Explanation of symbols]

ST1 Si growth stage by Czochralski (CZ) method ST2 Wafer forming stage ST3 Heat treatment stage for BMD density profile formation ST4 Heat treatment stage for BMD nucleation formation ST5 B Heat treatment stage for BMD nucleus expansion ST6 BMD evaluation stage 21 Device Formation surface (wafer surface) 22 BMD

Claims (4)

[Claims] 1. A heat treatment is performed in an oxygen atmosphere at 780 ° C. for 3 hours, and subsequently in an oxygen atmosphere at 1000 ° C. for 16 hours.
The average BMD density from the substrate surface to the depth of 10 μm is 5 × when the BMD observation is performed after the heat treatment for a time.
A semiconductor substrate having a size of 10 ^{2 to} 5 × 16 ⁶ cm ⁻³ . 2. The semiconductor substrate according to claim 1, wherein the BMD density in the layer having a depth of 20 μm or more from the substrate surface is 5 × 10 ⁷ cm ⁻³ or more. 3. A step of immersing a single crystal semiconductor seed crystal in a molten semiconductor and pulling it up to obtain a semiconductor crystal having an orientational arrangement of the seed crystal, and molding a crystal body of the semiconductor crystal into a substrate shape. Process and the substrate-shaped compact in a non-oxidizing atmosphere at 1150 ° C
As described above, the method for manufacturing a semiconductor substrate includes the step of performing heat treatment for 30 minutes or more. 4. The heat treatment step comprises: H ₂ , CO, CO ₂ ,
4. The method of manufacturing a semiconductor substrate according to claim 3, wherein the substrate-shaped compact is heat-treated in at least one non-oxidizing atmosphere of Ar, He, Ne, Kr, and Xe.