JPH0655437A - Simultaneous double surface lapping method - Google Patents

Abstract

PURPOSE:To provide a new double surface lapping technique which can omit a single surface lapping process on the occasion of lapping a wafer which has been cut off by a simultaneous surface grinding slicer. CONSTITUTION:On the occasion of lapping both the surfaces of a wafer by means of an upper and a lower level plate the number of revolution of which is different with each other after the wafer has been cut off by a simultaneous surface grinding slicer so as to be held by a carrier, a lapping operation is divided into two steps, in the first half, the level plate faced to the grinding surface of the wafer is rotated to the direction of the revolving motion of the wafer carrier, and in the latter half, the upper and lower level plates are respectively rotated in such a way as to be identical in relative speed to the wafer carrier. In this case, in the lapping operation in the first half, it is desirable that the relative speed of the level plate faced to each grinding surface of the carrier and the wafer is less than 1/5 of the relative speed of the level plate faced to each slicing surface of the carrier and the wafer.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for lapping a wafer, particularly a wafer cut by a simultaneous surface grinding slicer.

[0002]

2. Description of the Related Art In the production of semiconductor wafers, an inner peripheral edge slicer is generally used as a slicer used for cutting a wafer from a pulled crystal. The cutting of large-diameter wafers with the inner-edge blade slicer is performed under very delicate blade control, and the wafer accuracy is greatly influenced by the skill of the operator.

With the further increase in device integration, G
The required warpage accuracy of the aAs wafer is 5 μm and 3 μm when completed for a 3-inch wafer, and it is becoming impossible to satisfy this value with a normal inner peripheral blade slicer.

The sledge referred to here is the difference in partial cutting resistance at the cut portion depending on the state of the blade (rigidity / flatness of the base metal), the state of the cutting edge (shape / wear / clogging) and the state of the coolant. Occurs, and is formed by being carved as the shape of the surface of the blade.

Although the generation of warpage has been suppressed by controlling only the blade, it has almost reached the limit, so a slicer with simultaneous surface grinding has been devised.

Tension head for inner peripheral blade slicer (blade attachment capable of applying tension to the blade)
This is a processing method in which a cup-type surface grinding wheel having vertical and rotating mechanisms is added inside, the surface is ground in the ingot state, and immediately after that, cutting is performed by the inner peripheral blade. (Fig. 2) The surface that has been surface ground is in the state of a semiconductor ingot that has not been thinned, and the end surface is ground with a rigid cup-shaped diamond grindstone instead of a thin blade that bends easily like an inner peripheral blade. The ground surface is stable and has high precision. This ground surface serves as a reference surface for the lapping process in the subsequent process. By adhering the grinding surface to a lapping plate and processing only the sliced surface having irregularities, the sliced surface also becomes a surface similar to the grinding surface (transfer), and a wafer having both flat surfaces and good parallelism can be obtained.

After this, a finished product is obtained through a double-sided lap polishing process as usual.

FIG. 3 shows a process of processing a wafer cut by a conventional simultaneous grinding slicer. Since it is desired to use the ground surface with good processing accuracy as a reference, a single-sided lapping step and an operation of attaching and removing the wafer to and from the surface plate accompanying this are added.

Wax is adhered to the surface plate by using wax, but it is necessary to have a high level of technology to adhere the wafer uniformly on the order of microns, and a chlorine-based organic solvent is used to remove the wax. Therefore, there is a safety problem.

In addition to the above problem, an additional process is added, so that the required man-hour is increased.

[0011]

SUMMARY OF THE INVENTION It is an object of the present invention to provide a novel double-sided lapping technique which eliminates the above-mentioned drawbacks of the conventional technique and can omit the single-sided lapping step.

[0012]

The above objects can be achieved by the double-sided simultaneous lapping method of the present invention. That is,
In the method of holding the wafer in the carrier and simultaneously lapping both sides by the upper and lower surface plates having different rotation speeds, in the case of the wafer cut by the simultaneous surface grinding slicer,
The lapping work is divided into two stages, and the surface plate facing the ground surface of the wafer in the first half is in the same direction as the revolution movement of the wafer carrier.
This is a double-sided simultaneous lapping method characterized in that the surface plate facing the sliced surface of the wafer is rotated in the opposite direction, and in the latter half, the wafer carrier and the upper and lower surface plates are rotated so as to have the same relative speed.

Here, in the first half of the lapping operation of the double-sided simultaneous lapping method of the present invention, the relative speed of the surface plate facing the grinding surface of the carrier and the wafer is the relative speed of the surface plate facing the slice surface of the carrier and the wafer. It is preferably one-fifth or less.

The gist of the present invention is to change the speeds of the upper surface plate and the lower surface plate with respect to the wafer carrier in the initial stage of the double-sided simultaneous lapping work, thereby increasing the lapping speed on the slice surface side to thereby warp the wafer. Is greatly reduced.

The present invention is applicable to semiconductors such as GaAs and S
It can also be applied to the manufacture of wafers such as i.

In the lapping method of the present invention, if the relative speed of the surface plate facing the ground surface of the wafer in the first half is greater than one fifth of the speed ratio with the relative speed of the surface plate facing the sliced surface of the wafer, grinding is performed. The amount of lapping on the surface side is increased, so that the warpage is deteriorated.

[0017]

EXAMPLES Examples of the present invention will be described below. However, the present invention is not limited to the examples below.

(Embodiment 1) As a lapping apparatus, a 2-way type apparatus having upper and lower surface plates made of glass having a diameter of 1000 mm and comprising a sun gear and an internal gear for rotating and revolving a wafer carrier for holding a wafer Was used.

The wafer was a 4-inch GaAs wafer, which was cut with an inner peripheral blade slicer with grinding. The wafer carrier used was a 10-inch wafer carrier capable of holding four 4-inch GaAs wafers.

The polishing liquid used was a mixture of alumina powder of about 6 μm and deionized water in a weight ratio of 1: 4.

The wafer was set so that the upper side was a sliced surface and the lower side was a ground surface. In the first half of lapping, a pressure of 50 g / cm ² is applied to the wafer, and the upper platen is turned clockwise by 10
Lapping was performed under the following conditions: rpm, the revolution speed of the carrier was 10 rpm counterclockwise, and the lower platen was 10 rpm counterclockwise. At this time, the rotation movement of the wafer is not performed.

When the thickness of the substrate is changed from 800 μm to 780 μm, that is, when the lapping amount of both the front and back sides reaches 20 μm, the conditions are switched to 1 wafer.
A pressure of 59 g / cm ² is applied, and the upper surface plate rotates clockwise for 30 r.
Lapping was performed under the conditions of pm, the revolving speed of the carrier was 20 rpm in the clockwise direction, and the lower surface plate was in the clockwise direction of 10 rpm until the substrate thickness reached 700 μm.

The sled was measured using a stylus type measuring machine. As a result, the conventional one-side lapping process has a flatness of 2 to 5 μm, and the present method has a flatness of 3 to 5 μm.

For reference, the sledge of which the double-sided wrapping work was performed as usual without the single-sided lap being 7 to 7
It is about 15 μm.

[0025]

By adopting the double-sided simultaneous lapping method of the present invention, the single-sided lapping step, which is indispensable in the prior art, can be omitted, and there is an advantage in terms of reduction of man-hours and safety.

This is because the lapping amount on the grinding surface side of the wafer is reduced and the lapping surface is lapped on the basis of the grinding surface, whereby the same effect as the single-sided lapping can be obtained.

[Brief description of drawings]

FIG. 1 shows a wafer cut by a simultaneous grinding slicer,
The operation chart of the processing process of the present invention is shown.

FIG. 2 is a schematic diagram of processing when processing a simultaneous grinding slicer.

FIG. 3 is for a wafer cut by a simultaneous grinding slicer,
The work chart of the conventional processing process is shown.

[Explanation of symbols]

 1 Semiconductor ingot 2 Blade 3 Cup grinding wheel for simultaneous grinding

Claims (2)

[Claims] 1. A method of holding a wafer on a carrier and simultaneously lapping both surfaces by upper and lower surface plates having different rotational speeds. In the case of a wafer cut by a simultaneous surface grinding slicer, a lapping operation is divided into two stages. In the first half, the surface plate facing the grinding surface of the wafer is rotated in the same direction as the revolution of the wafer carrier, and the surface plate facing the slice surface of the wafer is rotated in the opposite direction. In the latter half, the wafer carrier and the upper and lower surface plates are at the same relative speed. Double-sided simultaneous lapping method, characterized by rotating so that 2. In the first half lapping operation, the relative speed of the surface plate facing the ground surface of the carrier and the wafer is one fifth or less of the relative speed of the surface plate facing the slice surface of the carrier and the wafer. The double-sided simultaneous lapping method according to claim 1.