JPH0654983B2 - Image signal processor - Google Patents

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image signal processing device, and more particularly to an image signal processing device suitable for use as an in-vehicle circle video system.

2. Description of the Related Art Currently, an on-vehicle surveillance camera is attached to the back of a large-sized bus or the like, and a background image is reproduced on a monitor with a 3: 4 aspect ratio when the vehicle is moved backwards, and this is monitored and confirmed.

Problems to be Solved by the Invention However, in an image having an aspect ratio of 3: 4 as in the above-described conventional example, an empty portion is reproduced more than necessary as a vertical scene. This part occupies a large area though it is not a very important scene part for driving confirmation,
It makes it difficult to check the target object.

In view of this, the present invention makes it possible to widen the lateral viewing angle in the rear direction when the vehicle is moving backward, for example, so that the following vehicle can be easily checked, and the vertical image density in the reproduced image after the angle of view conversion can be improved. It is an object of the present invention to provide an image signal processing device capable of smoothing the inclination, improving resolution after vertical resolution, and having a simple circuit configuration.

Means for Solving Problems The technical means of the present invention for solving the above problems are a converter configured by n scanning lines and for analog-digital converting an image signal forming one screen. , A field memory circuit for extracting and storing a part of the digital signal converted by this converter, and each scanning line data stored in this field memory circuit is read twice in synchronization with a horizontal drive pulse for scanning. Means, a line memory circuit for storing one scanning line data read by the reading means, an average calculation for obtaining an average value of the first scanning line read data from the field memory circuit and the data sequentially read from the line memory circuit. Circuit, a converter for converting the data from this averaging circuit to digital-analog, and an analog signal from this converter. And a means for outputting the second scanning line read data from the field memory circuit to the line memory circuit and at the same time outputting the data directly via the digital-analog converter.

Action The action and effect of the above technical means are as follows. That is,
The image signal is digitally converted by an analog-digital converter, and a part of the n scanning lines constituting this digitally converted screen is extracted and stored in the field memory circuit. Then enter the data in the next field
The average value of the first read data and the data read from the line memory circuit is obtained by the averaging circuit, converted into an analog signal by the digital-analog converter, and output. The second data is written into the line memory circuit and simultaneously converted into an analog signal by the digital-analog converter and output.

By performing this for each field, the reproduced image is delayed by one field image with respect to the input image, but can be converted into an angle of view suitable for vehicle mounting and can be used as a real-time image.

Examples Hereinafter, examples of the present invention will be described in detail with reference to the drawings.
FIG. 1 is a block circuit diagram of an embodiment of the present invention implemented in an on-vehicle video system.

In FIG. 1, reference numeral 1 is a television camera input signal terminal by scanning 525 lines with a 3: 4 angle of view, and 2 is an analog-digital converter (hereinafter referred to as A / D converter) for analog-digital converting an image signal from the input signal terminal 1. 3) A
A first 1/2 field (odd field) memory circuit for storing 1/2 scanning line segments constituting the screen, which is digitally converted by the / D converter 2, and 4 similarly stores 1/2 scanning line segments. A second 1/2 field (even field) memory circuit, 5 is a line memory circuit for storing one scan line data stored in the 1/2 field memory circuits 3 and 4, and 6 is the above 1/2 field memory circuit. First scan line read data from 3 and 4 and line memory circuit 5
An average calculation circuit for obtaining the average value of the read data,
Reference numeral 7 is a gate circuit, 8 is a digital-analog converter (hereinafter referred to as a D / A converter), and 9 is an output signal terminal having an aspect ratio of 3: 8. Reference numeral 10 is a sync separation circuit for extracting the sync signal portion from the input signal terminal 1, 11 is a clock signal generation circuit which outputs the signal from the sync separation circuit 10, and the signal is A / D converter 2, D / A conversion And the address control circuits 12 and 13, which will be described later, and the operation control pulse generation means 14. 12 and 13 are clock signal generation circuits 1
The first and second memory-address control circuits which operate by the output of 1 and the operation control pulse generating means 14 which operates by the output of the clock signal generating circuit 11.

FIG. 2 shows the signal processing procedure of the present embodiment for interpolating using the original scanning line in the case of an odd field as an example. FIG. 2 (a) shows the horizontal driving pulse for reading the scanning line data. (B) is a schematic diagram of read data from the 1/2 field memory circuit 3, (c) is a schematic diagram of data of the line memory circuit 5, (d) is a data read driving pulse of the line memory circuit 5, (e) is the arithmetic output data of the average arithmetic circuit 6, (f) is the data that is directly input from the 1/2 field memory circuit 3 to the D / A converter 8, (g) is the same.
Is data after interpolation of the output of the D / A converter 8.

FIG. 3 is an explanatory diagram of a reproduced image obtained by processing with the image signal processing device shown in FIG. 1, and FIG. 3 (a) is an input image diagram of 525 scanning lines with a 3: 4 field angle, FIG. ) Is an explanatory diagram of a state in which 1/2 scanning line for the central image of FIG. 9A is stored via the A / D converter 2, and FIG. It is a line-scan image figure reproduced as a converted aspect ratio 3: 8 angle of view.

Next, the processing order of the image signals will be specifically described. The input signal terminal 1 shown in FIG. 1 has a 525 aspect ratio of 3: 4.
When the image signal of the TV camera by main scanning is input,
This signal is converted into an 8-bit digitized signal by the A / D converter 2. Here, the sync separation circuit 10 extracts the sync signal portion from the input signal and outputs VD (vertical drive pulse) and HD (horizontal drive pulse) signals. The HD signal is the clock signal generation circuit 1 for driving the pixel signal of each scanning line.
1, the first and second address control circuits 12 and 13 and the operation control pulse generation means 14 are provided, and the output of the clock signal generation circuit 11 is the other operation control pulse generation means 14 of the address control circuits 12 and 13. A / D converter 2, D / A
It is added to the converter 8 as well, and the pulse generator 14 for arithmetic control is used.
Is output to the line memory circuit 5, the average calculation circuit 6 and the gate circuit 7. Thus, the output signal of the sync separation circuit 10 is input to the first and second address control circuits 12 and 13, and the output signal is applied to the first and second 1/2 field memory circuits 3 and 4. It As a result, first, A
1/2 in the first field (solid line scanning line group shown in FIG. 3 (a) (for an input image of 525 scanning lines with an aspect ratio of 3: 4) of the input image data from the / D converter 2 The central image signal of the scanning line segment is stored in the first 1/2 field memory circuit 3. Next, the central image signal of the 1/2 scanning line in the second field (the group of dotted scanning lines shown in FIG. 3A) is stored in the second 1/2 field memory circuit 4.

On the other hand, during the second field period, the same data is read from the first 1/2 field memory circuit 3 twice in synchronization with the horizontal drive pulse (HD) of FIG. 2 (a) (see FIG. 2).
(b)). First, the scanning line data 1 is read by the first HD pulse, and the data 0 of the line memory circuit 5 is read while the averaging circuit 3 calculates (0 + 1) / 2. This operation data is output from the output signal terminal 9 via the gate circuit 7 and the D / A converter 8. Data 1 is read again from the 1/2 field memory circuit 3 in synchronization with the next second HD pulse, and is written to the data 1 line memory circuit 5 and, at the same time, directly input to the D / A converter 8 via the gate circuit 7. And output from the output signal terminal 9. Next 3rd HD
In synchronization with the pulse, the first 1/2 field memory circuit 3
The data 2 is read by the line memory circuit 5 at the same time.
The data 1 read out by (1+
2) / 2 data is generated and output from the output signal terminal 9 via the gate circuit 7 and the D / A converter 8 as shown in FIG. 2g, and an interpolated signal is obtained. Data 2 is read from the 1/2 field memory circuit 4 in synchronization with the next 4th HD pulse, and this data 2 is written to the line memory circuit 5 and immediately input to the D / A converter 8 via the gate circuit 7. And output from the output signal terminal 9.

When this process is repeated and the processing for each data in the first 1/2 field memory circuit 3 is completed, the data is similarly read from the second 1/2 field memory circuit 4 during the third field period. The result of averaging is inserted between the signals shown in FIG. This makes the third
As shown in FIG. 7C, the input image with the aspect ratio of 3: 4 is the output image with the aspect ratio of 3: 8 in real time, which is the same as the original scanning line.
It is reproduced as the number of scanning lines of five frames. That is, Fig. 3
The frame image shown in (a) has a frame scanning line number n = 525.
It is input by a book, and n / 2 = 525 = 2 of these are input to the first and second 1/2 field memory circuits 3 and 4 shown in FIG.
Are sequentially stored in each field. Further, each field is complemented by a calculation operation and finally output as a 525-scan image with a 3: 8 field angle.
As shown in FIG. 3C, the image is reproduced on a TV monitor having an aspect ratio of 3: 8.

According to the present invention, the number of scanning lines is not changed at the time of conversion into an aspect ratio of 3: 8, and it is possible to meet the conventional TV scanning standard and to transmit with high image quality. Therefore, if a monitor with an angle of view of 3: 8 is prepared, it can be connected to an existing TV device, and the field of use can be expanded to display character information.

In addition, if the processing is performed so as to have two screens when the angle of view is converted,
Cameras are mounted on both sides of the vehicle body for rearward imaging, and playback can be performed easily with left and right turns by playing back with the aspect ratio of 3: 4. Also, the camera used in the system can be applied without changing the conventional specifications based on the Japanese standard system.

As is apparent from the above description, according to the present invention, the image signal is digitally converted by the analog-digital converter, and a part of the n scanning lines forming the digitally converted screen is extracted. Then, the data is stored in the field memory circuit, the data is read twice in the next field, the average value of the data read from the first time data and the data read from the line memory circuit is calculated by the averaging circuit, and the analog value is converted by the digital-analog converter. The data is converted into a signal and output as an interpolation signal, and the second data is written into the line memory circuit and simultaneously converted into an analog signal and output. Therefore, it has the following effects.

(1) An image signal having an aspect ratio of 3: 4 can be reproduced by converting the angle of view to an aspect ratio of 3: 8, and by using it in a vehicle-mounted video system, it is possible to easily perform a confirmation work behind the vehicle body.

(2) The density gradient of the vertical image becomes smooth in the reproduced image after the angle of view conversion.

(3) The vertical resolution can be improved.

(4) Since the interpolation signal can be output by providing the means for repeatedly reading twice and the line memory circuit, the circuit configuration becomes simple.

[Brief description of drawings]

FIG. 1 is a block circuit diagram showing an embodiment of an image signal processing apparatus of the present invention, FIG. 2 is an explanatory view of a signal processing procedure, and FIG.
(a) to FIG. 3 (c) are explanatory diagrams of image reproduction. 1 ... Input signal terminal, 2 ... A / D converter, 3 ... 1 /
2 field memory circuit, 4 ... 1/2 field memory circuit, 5 ... line memory circuit, 6 ... averaging circuit, 7 ... gate circuit, 8 ... D / A converter, 9 ... output signal terminal 10 ... Sync separation circuit, 11 ... Clock signal generation circuit, 12, 13 ... Address control circuit, 14
...... Pulse generation means for arithmetic control.

Claims (1)

[Claims] Claim: What is claimed is: 1. An analog-to-digital conversion of an image signal which is composed of n scanning lines and constitutes one screen
Digital converter and part of digital signal converted by this converter are extracted and stored for each field 2
For each of the field memory circuits, each of the field memory circuits, each scanning line data stored therein is read out twice for each line in synchronization with the horizontal scanning pulse for scanning, and one scanning data read by this reading means. A line memory circuit for storing the data, an average arithmetic circuit for obtaining an average value of the first scan line read data from the field memory circuit and the data sequentially read from the line memory circuit, and the data from this average arithmetic circuit A converter for analog conversion, a means for outputting an analog signal from the converter, a second scanning line read data from the field memory circuit is written into the line memory circuit, and at the same time, directly via a digital-analog converter. Image signal processing characterized by comprising means for outputting Apparatus.